xref: /OK3568_Linux_fs/u-boot/include/configs/tbs2910.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Configuration settings for the TBS2910 MatrixARM board.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __TBS2910_CONFIG_H
10*4882a593Smuzhiyun #define __TBS2910_CONFIG_H
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include "mx6_common.h"
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /* General configuration */
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define CONFIG_MACH_TYPE		3980
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define CONFIG_SYS_HZ			1000
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /* Physical Memory Map */
23*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS		1
24*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE		MMDC0_ARB_BASE_ADDR
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
27*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
28*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \
29*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
30*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \
31*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(128 * 1024 * 1024)
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
36*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END \
37*4882a593Smuzhiyun 	(CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define CONFIG_SYS_BOOTMAPSZ		0x10000000
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* Serial console */
42*4882a593Smuzhiyun #define CONFIG_MXC_UART
43*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE		UART1_BASE /* select UART1/UART2 */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define CONFIG_CONS_INDEX		1
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /* Filesystems / image support */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun /* MMC */
50*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM	3
51*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC4_BASE_ADDR
52*4882a593Smuzhiyun #define CONFIG_SUPPORT_EMMC_BOOT
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /* Ethernet */
55*4882a593Smuzhiyun #define CONFIG_FEC_MXC
56*4882a593Smuzhiyun #define CONFIG_FEC_MXC
57*4882a593Smuzhiyun #define CONFIG_MII
58*4882a593Smuzhiyun #define IMX_FEC_BASE			ENET_BASE_ADDR
59*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE		RGMII
60*4882a593Smuzhiyun #define CONFIG_ETHPRIME			"FEC"
61*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR		4
62*4882a593Smuzhiyun #define CONFIG_PHY_ATHEROS
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* Framebuffer */
65*4882a593Smuzhiyun #ifdef CONFIG_VIDEO
66*4882a593Smuzhiyun #define CONFIG_VIDEO_IPUV3
67*4882a593Smuzhiyun #define CONFIG_IPUV3_CLK		260000000
68*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_RLE8
69*4882a593Smuzhiyun #define CONFIG_IMX_HDMI
70*4882a593Smuzhiyun #define CONFIG_IMX_VIDEO_SKIP
71*4882a593Smuzhiyun #endif
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /* PCI */
74*4882a593Smuzhiyun #ifdef CONFIG_CMD_PCI
75*4882a593Smuzhiyun #define CONFIG_PCI_SCAN_SHOW
76*4882a593Smuzhiyun #define CONFIG_PCIE_IMX
77*4882a593Smuzhiyun #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /* SATA */
81*4882a593Smuzhiyun #ifdef CONFIG_CMD_SATA
82*4882a593Smuzhiyun #define CONFIG_DWC_AHSATA
83*4882a593Smuzhiyun #define CONFIG_SYS_SATA_MAX_DEVICE	1
84*4882a593Smuzhiyun #define CONFIG_DWC_AHSATA_PORT_ID	0
85*4882a593Smuzhiyun #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
86*4882a593Smuzhiyun #define CONFIG_LBA48
87*4882a593Smuzhiyun #define CONFIG_LIBATA
88*4882a593Smuzhiyun #endif
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun /* USB */
91*4882a593Smuzhiyun #ifdef CONFIG_CMD_USB
92*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
93*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
94*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
95*4882a593Smuzhiyun #ifdef CONFIG_CMD_USB_MASS_STORAGE
96*4882a593Smuzhiyun #define CONFIG_USBD_HS
97*4882a593Smuzhiyun #define CONFIG_USB_FUNCTION_MASS_STORAGE
98*4882a593Smuzhiyun #endif /* CONFIG_CMD_USB_MASS_STORAGE */
99*4882a593Smuzhiyun #ifdef CONFIG_USB_KEYBOARD
100*4882a593Smuzhiyun #define CONFIG_PREBOOT \
101*4882a593Smuzhiyun 	"usb start; " \
102*4882a593Smuzhiyun 	"if hdmidet; then " \
103*4882a593Smuzhiyun 		"run set_con_hdmi; " \
104*4882a593Smuzhiyun 	"else " \
105*4882a593Smuzhiyun 		"run set_con_serial; " \
106*4882a593Smuzhiyun 	"fi;"
107*4882a593Smuzhiyun #endif /* CONFIG_USB_KEYBOARD */
108*4882a593Smuzhiyun #endif /* CONFIG_CMD_USB      */
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /* RTC */
111*4882a593Smuzhiyun #ifdef CONFIG_CMD_DATE
112*4882a593Smuzhiyun #define CONFIG_RTC_DS1307
113*4882a593Smuzhiyun #define CONFIG_SYS_RTC_BUS_NUM		2
114*4882a593Smuzhiyun #endif
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /* I2C */
117*4882a593Smuzhiyun #ifdef CONFIG_CMD_I2C
118*4882a593Smuzhiyun #define CONFIG_SYS_I2C
119*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC
120*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
121*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
122*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
123*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED		100000
124*4882a593Smuzhiyun #define CONFIG_I2C_EDID
125*4882a593Smuzhiyun #endif
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun /* Environment organization */
128*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV		2 /* overwritten on SD boot */
129*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART		1 /* overwritten on SD boot */
130*4882a593Smuzhiyun #define CONFIG_ENV_SIZE			(8 * 1024)
131*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(384 * 1024)
132*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
135*4882a593Smuzhiyun 	"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
136*4882a593Smuzhiyun 	"bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
137*4882a593Smuzhiyun 			"video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
138*4882a593Smuzhiyun 	"bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
139*4882a593Smuzhiyun 	"bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
140*4882a593Smuzhiyun 			"${bootargs_mmc3}\0" \
141*4882a593Smuzhiyun 	"bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
142*4882a593Smuzhiyun 			"rdinit=/sbin/init enable_wait_mode=off\0" \
143*4882a593Smuzhiyun 	"bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
144*4882a593Smuzhiyun 			"mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
145*4882a593Smuzhiyun 	"bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
146*4882a593Smuzhiyun 	"bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
147*4882a593Smuzhiyun 			"run bootargs_upd; " \
148*4882a593Smuzhiyun 			"bootm 0x10800000 0x10d00000\0" \
149*4882a593Smuzhiyun 	"console=ttymxc0\0" \
150*4882a593Smuzhiyun 	"fan=gpio set 92\0" \
151*4882a593Smuzhiyun 	"set_con_serial=setenv stdout serial; " \
152*4882a593Smuzhiyun 			"setenv stderr serial;\0" \
153*4882a593Smuzhiyun 	"set_con_hdmi=setenv stdout serial,vga; " \
154*4882a593Smuzhiyun 			"setenv stderr serial,vga;\0" \
155*4882a593Smuzhiyun 	"stderr=serial,vga;\0" \
156*4882a593Smuzhiyun 	"stdin=serial,usbkbd;\0" \
157*4882a593Smuzhiyun 	"stdout=serial,vga;\0"
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \
160*4882a593Smuzhiyun 	"mmc rescan; " \
161*4882a593Smuzhiyun 	"if run bootcmd_up1; then " \
162*4882a593Smuzhiyun 		"run bootcmd_up2; " \
163*4882a593Smuzhiyun 	"else " \
164*4882a593Smuzhiyun 		"run bootcmd_mmc; " \
165*4882a593Smuzhiyun 	"fi"
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun #endif			       /* __TBS2910_CONFIG_H * */
168