xref: /OK3568_Linux_fs/u-boot/include/configs/snapper9g45.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Bluewater Systems Snapper 9G45 module
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * (C) Copyright 2011 Bluewater Systems
5*4882a593Smuzhiyun  *   Author: Andre Renaud <andre@bluewatersys.com>
6*4882a593Smuzhiyun  *   Author: Ryan Mallon <ryan@bluewatersys.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef __CONFIG_H
12*4882a593Smuzhiyun #define __CONFIG_H
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /* SoC type is defined in boards.cfg */
15*4882a593Smuzhiyun #include <asm/hardware.h>
16*4882a593Smuzhiyun #include <linux/sizes.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE		0x73f00000
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* ARM asynchronous clock */
21*4882a593Smuzhiyun #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
22*4882a593Smuzhiyun #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* CPU */
25*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
26*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS
27*4882a593Smuzhiyun #define CONFIG_INITRD_TAG
28*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* SDRAM */
31*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS		1
32*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS6
33*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_SIZE		(128 * 1024 * 1024) /* 64MB */
34*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR		(ATMEL_BASE_SRAM + 0x1000 - \
35*4882a593Smuzhiyun 					 GENERATED_GBL_DATA_SIZE)
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /* Mem test settings */
38*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
39*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* NAND Flash */
42*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECC_BASE	ATMEL_BASE_ECC
43*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE	1
44*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE		ATMEL_BASE_CS3
45*4882a593Smuzhiyun #define CONFIG_SYS_NAND_DBW_8
46*4882a593Smuzhiyun #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21) /* AD21 */
47*4882a593Smuzhiyun #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22) /* AD22 */
48*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PC14
49*4882a593Smuzhiyun #define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PC8
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /* Ethernet */
52*4882a593Smuzhiyun #define CONFIG_MACB
53*4882a593Smuzhiyun #define CONFIG_RMII
54*4882a593Smuzhiyun #define CONFIG_NET_RETRY_COUNT		20
55*4882a593Smuzhiyun #define CONFIG_RESET_PHY_R
56*4882a593Smuzhiyun #define CONFIG_AT91_WANTS_COMMON_PHY
57*4882a593Smuzhiyun #define CONFIG_TFTP_PORT
58*4882a593Smuzhiyun #define CONFIG_TFTP_TSIZE
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* MMC */
61*4882a593Smuzhiyun #define CONFIG_GENERIC_ATMEL_MCI
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /* LCD */
64*4882a593Smuzhiyun #define CONFIG_ATMEL_LCD
65*4882a593Smuzhiyun #define CONFIG_GURNARD_SPLASH
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun #define CONFIG_ATMEL_SPI
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun /* GPIOs and IO expander */
70*4882a593Smuzhiyun #define CONFIG_ATMEL_LEGACY
71*4882a593Smuzhiyun #define CONFIG_AT91_GPIO
72*4882a593Smuzhiyun #define CONFIG_AT91_GPIO_PULLUP		1
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /* UARTs/Serial console */
75*4882a593Smuzhiyun #define CONFIG_ATMEL_USART
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /* Boot options */
78*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR		0x23000000
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTFILESIZE
81*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTPATH
82*4882a593Smuzhiyun #define CONFIG_BOOTP_GATEWAY
83*4882a593Smuzhiyun #define CONFIG_BOOTP_HOSTNAME
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun /* Environment settings */
86*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(512 << 10)
87*4882a593Smuzhiyun #define CONFIG_ENV_SIZE			(256 << 10)
88*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun #define	CONFIG_EXTRA_ENV_SETTINGS	\
91*4882a593Smuzhiyun 	"ethaddr=00:00:00:00:00:00\0" \
92*4882a593Smuzhiyun 	"serial=0\0" \
93*4882a593Smuzhiyun 	"stdout=serial_atmel\0" \
94*4882a593Smuzhiyun 	"stderr=serial_atmel\0" \
95*4882a593Smuzhiyun 	"stdin=serial_atmel\0" \
96*4882a593Smuzhiyun 	"bootlimit=3\0" \
97*4882a593Smuzhiyun 	"loadaddr=0x71000000\0" \
98*4882a593Smuzhiyun 	"board_rev=2\0" \
99*4882a593Smuzhiyun 	"bootfile=/tftpboot/uImage\0" \
100*4882a593Smuzhiyun 	"bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \
101*4882a593Smuzhiyun 	"nfsroot=/export/root\0" \
102*4882a593Smuzhiyun 	"boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \
103*4882a593Smuzhiyun 	"boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \
104*4882a593Smuzhiyun 	"boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \
105*4882a593Smuzhiyun 	"boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \
106*4882a593Smuzhiyun 	"boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \
107*4882a593Smuzhiyun 	"bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \
108*4882a593Smuzhiyun 	"altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /* Console settings */
111*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP
112*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING
113*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun /* U-Boot memory settings */
116*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(1 << 20)
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /* Command line configuration */
119*4882a593Smuzhiyun #define CONFIG_CMD_PING
120*4882a593Smuzhiyun #define CONFIG_CMD_DHCP
121*4882a593Smuzhiyun #define CONFIG_CMD_MII
122*4882a593Smuzhiyun #define CONFIG_CMD_MMC
123*4882a593Smuzhiyun #define CONFIG_CMD_CACHE
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun #endif /* __CONFIG_H */
126