1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Configuration settings for the SAMA5D4EK board. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2014 Atmel 5*4882a593Smuzhiyun * Bo Shen <voice.shen@atmel.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __CONFIG_H 11*4882a593Smuzhiyun #define __CONFIG_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include "at91-sama5_common.h" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* SDRAM */ 16*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 17*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS 18*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_SIZE 0x20000000 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD 21*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR 0x218000 22*4882a593Smuzhiyun #else 23*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 24*4882a593Smuzhiyun (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 25*4882a593Smuzhiyun #endif 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #ifdef CONFIG_CMD_SF 30*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED 30000000 31*4882a593Smuzhiyun #endif 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* NAND flash */ 34*4882a593Smuzhiyun #ifdef CONFIG_CMD_NAND 35*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 36*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 37*4882a593Smuzhiyun /* our ALE is AD21 */ 38*4882a593Smuzhiyun #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 39*4882a593Smuzhiyun /* our CLE is AD22 */ 40*4882a593Smuzhiyun #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 41*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 42*4882a593Smuzhiyun #endif 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* LCD */ 45*4882a593Smuzhiyun #define LCD_BPP LCD_COLOR16 46*4882a593Smuzhiyun #define LCD_OUTPUT_BPP 18 47*4882a593Smuzhiyun #define CONFIG_LCD_LOGO 48*4882a593Smuzhiyun #define CONFIG_LCD_INFO 49*4882a593Smuzhiyun #define CONFIG_LCD_INFO_BELOW_LOGO 50*4882a593Smuzhiyun #define CONFIG_ATMEL_HLCD 51*4882a593Smuzhiyun #define CONFIG_ATMEL_LCD_RGB565 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #ifdef CONFIG_SYS_USE_SERIALFLASH 54*4882a593Smuzhiyun /* override the bootcmd, bootargs and other configuration for spi flash env*/ 55*4882a593Smuzhiyun #elif CONFIG_SYS_USE_NANDFLASH 56*4882a593Smuzhiyun /* override the bootcmd, bootargs and other configuration for nandflash env*/ 57*4882a593Smuzhiyun #elif CONFIG_SYS_USE_MMC 58*4882a593Smuzhiyun /* override the bootcmd, bootargs and other configuration for sd/mmc env */ 59*4882a593Smuzhiyun #endif 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* SPL */ 62*4882a593Smuzhiyun #define CONFIG_SPL_FRAMEWORK 63*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE 0x200000 64*4882a593Smuzhiyun #define CONFIG_SPL_MAX_SIZE 0x18000 65*4882a593Smuzhiyun #define CONFIG_SPL_BSS_START_ADDR 0x20000000 66*4882a593Smuzhiyun #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 67*4882a593Smuzhiyun #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 68*4882a593Smuzhiyun #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define CONFIG_SYS_MONITOR_LEN (512 << 10) 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #ifdef CONFIG_SYS_USE_MMC 73*4882a593Smuzhiyun #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 74*4882a593Smuzhiyun #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #elif CONFIG_SYS_USE_NANDFLASH 77*4882a593Smuzhiyun #define CONFIG_SPL_NAND_DRIVERS 78*4882a593Smuzhiyun #define CONFIG_SPL_NAND_BASE 79*4882a593Smuzhiyun #endif 80*4882a593Smuzhiyun #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 81*4882a593Smuzhiyun #define CONFIG_SYS_NAND_5_ADDR_CYCLE 82*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 83*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_COUNT 64 84*4882a593Smuzhiyun #define CONFIG_SYS_NAND_OOBSIZE 224 85*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 86*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #elif CONFIG_SYS_USE_SERIALFLASH 89*4882a593Smuzhiyun #define CONFIG_SPL_SPI_LOAD 90*4882a593Smuzhiyun #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #endif 93*4882a593Smuzhiyun #endif 94