xref: /OK3568_Linux_fs/u-boot/include/configs/s32v234evb.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:     GPL-2.0+
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Configuration settings for the Freescale S32V234 EVB board.
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __CONFIG_H
10*4882a593Smuzhiyun #define __CONFIG_H
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD
13*4882a593Smuzhiyun #include <config_distro_defaults.h>
14*4882a593Smuzhiyun #endif
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <asm/arch/imx-regs.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define CONFIG_S32V234
19*4882a593Smuzhiyun #define CONFIG_DM
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* Config GIC */
22*4882a593Smuzhiyun #define CONFIG_GICV2
23*4882a593Smuzhiyun #define GICD_BASE 0x7D001000
24*4882a593Smuzhiyun #define GICC_BASE 0x7D002000
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define CONFIG_REMAKE_ELF
27*4882a593Smuzhiyun #undef CONFIG_RUN_FROM_IRAM_ONLY
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define CONFIG_RUN_FROM_DDR1
30*4882a593Smuzhiyun #undef CONFIG_RUN_FROM_DDR0
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* Run by default from DDR1  */
33*4882a593Smuzhiyun #ifdef CONFIG_RUN_FROM_DDR0
34*4882a593Smuzhiyun #define DDR_BASE_ADDR		0x80000000
35*4882a593Smuzhiyun #else
36*4882a593Smuzhiyun #define DDR_BASE_ADDR		0xC0000000
37*4882a593Smuzhiyun #endif
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define CONFIG_MACH_TYPE		4146
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /* Config CACHE */
44*4882a593Smuzhiyun #define CONFIG_CMD_CACHE
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define CONFIG_SYS_FULL_VA
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /* Enable passing of ATAGs */
49*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /* SMP Spin Table Definitions */
52*4882a593Smuzhiyun #define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /* Generic Timer Definitions */
55*4882a593Smuzhiyun #define COUNTER_FREQUENCY               (1000000000)	/* 1000MHz */
56*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ERRATUM_A008585
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /* Size of malloc() pool */
59*4882a593Smuzhiyun #ifdef CONFIG_RUN_FROM_IRAM_ONLY
60*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1 * 1024 * 1024)
61*4882a593Smuzhiyun #else
62*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
63*4882a593Smuzhiyun #endif
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define CONFIG_DM_SERIAL
66*4882a593Smuzhiyun #define CONFIG_FSL_LINFLEXUART
67*4882a593Smuzhiyun #define LINFLEXUART_BASE		LINFLEXD0_BASE_ADDR
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #define CONFIG_DEBUG_UART_LINFLEXUART
70*4882a593Smuzhiyun #define CONFIG_DEBUG_UART_BASE		LINFLEXUART_BASE
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* Allow to overwrite serial and ethaddr */
73*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE
74*4882a593Smuzhiyun #define CONFIG_SYS_UART_PORT		(1)
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #undef CONFIG_CMD_IMLS
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC
79*4882a593Smuzhiyun #define CONFIG_FSL_USDHC
80*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC_BASE_ADDR
81*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_NUM	1
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #define CONFIG_CMD_MMC
84*4882a593Smuzhiyun /* #define CONFIG_CMD_EXT2 EXT2 Support */
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #if 0
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /* Ethernet config */
89*4882a593Smuzhiyun #define CONFIG_CMD_PING
90*4882a593Smuzhiyun #define CONFIG_CMD_MII
91*4882a593Smuzhiyun #define CONFIG_FEC_MXC
92*4882a593Smuzhiyun #define CONFIG_MII
93*4882a593Smuzhiyun #define IMX_FEC_BASE            ENET_BASE_ADDR
94*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE     RMII
95*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR  0
96*4882a593Smuzhiyun #endif
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun #if 0				/* Disable until the FLASH will be implemented */
99*4882a593Smuzhiyun #define CONFIG_SYS_USE_NAND
100*4882a593Smuzhiyun #endif
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun #ifdef CONFIG_SYS_USE_NAND
103*4882a593Smuzhiyun /* Nand Flash Configs */
104*4882a593Smuzhiyun #define CONFIG_JFFS2_NAND
105*4882a593Smuzhiyun #define MTD_NAND_FSL_NFC_SWECC 1
106*4882a593Smuzhiyun #define CONFIG_NAND_FSL_NFC
107*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE		0x400E0000
108*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE	1
109*4882a593Smuzhiyun #define NAND_MAX_CHIPS			CONFIG_SYS_MAX_NAND_DEVICE
110*4882a593Smuzhiyun #define CONFIG_SYS_NAND_SELECT_DEVICE
111*4882a593Smuzhiyun #define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
112*4882a593Smuzhiyun #endif
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun #define CONFIG_LOADADDR			0xC307FFC0
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
117*4882a593Smuzhiyun 	"boot_scripts=boot.scr.uimg boot.scr\0" \
118*4882a593Smuzhiyun 	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
119*4882a593Smuzhiyun 	"console=ttyLF0,115200\0" \
120*4882a593Smuzhiyun 	"fdt_file=s32v234-evb.dtb\0" \
121*4882a593Smuzhiyun 	"fdt_high=0xffffffff\0" \
122*4882a593Smuzhiyun 	"initrd_high=0xffffffff\0" \
123*4882a593Smuzhiyun 	"fdt_addr_r=0xC2000000\0" \
124*4882a593Smuzhiyun 	"kernel_addr_r=0xC307FFC0\0" \
125*4882a593Smuzhiyun 	"ramdisk_addr_r=0xC4000000\0" \
126*4882a593Smuzhiyun 	"ramdisk=rootfs.uimg\0"\
127*4882a593Smuzhiyun 	"ip_dyn=yes\0" \
128*4882a593Smuzhiyun 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
129*4882a593Smuzhiyun 	"update_sd_firmware_filename=u-boot.imx\0" \
130*4882a593Smuzhiyun 	"update_sd_firmware=" \
131*4882a593Smuzhiyun 		"if test ${ip_dyn} = yes; then " \
132*4882a593Smuzhiyun 			"setenv get_cmd dhcp; " \
133*4882a593Smuzhiyun 		"else " \
134*4882a593Smuzhiyun 			"setenv get_cmd tftp; " \
135*4882a593Smuzhiyun 		"fi; " \
136*4882a593Smuzhiyun 		"if mmc dev ${mmcdev}; then "	\
137*4882a593Smuzhiyun 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
138*4882a593Smuzhiyun 				"setexpr fw_sz ${filesize} / 0x200; " \
139*4882a593Smuzhiyun 				"setexpr fw_sz ${fw_sz} + 1; "	\
140*4882a593Smuzhiyun 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
141*4882a593Smuzhiyun 			"fi; "	\
142*4882a593Smuzhiyun 		"fi\0" \
143*4882a593Smuzhiyun 	"loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
144*4882a593Smuzhiyun 	"jtagboot=echo Booting using jtag...; " \
145*4882a593Smuzhiyun 		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
146*4882a593Smuzhiyun 	"jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
147*4882a593Smuzhiyun 		"run loaduimage; run loadramdisk; run loadfdt;"\
148*4882a593Smuzhiyun 		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
149*4882a593Smuzhiyun 	"boot_net_usb_start=true\0" \
150*4882a593Smuzhiyun 	BOOTENV
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun #define BOOT_TARGET_DEVICES(func) \
153*4882a593Smuzhiyun 	func(MMC, mmc, 1) \
154*4882a593Smuzhiyun 	func(MMC, mmc, 0) \
155*4882a593Smuzhiyun 	func(DHCP, dhcp, na)
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \
158*4882a593Smuzhiyun 	"run distro_bootcmd"
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun #include <config_distro_bootcmd.h>
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun /* Miscellaneous configurable options */
163*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP	/* undef to save memory */
164*4882a593Smuzhiyun #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
165*4882a593Smuzhiyun #define CONFIG_SYS_PROMPT		"=> "
166*4882a593Smuzhiyun #undef CONFIG_AUTO_COMPLETE
167*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun #define CONFIG_CMD_MEMTEST
170*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START	(DDR_BASE_ADDR)
171*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END		(DDR_BASE_ADDR + 0x7C00000)
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
174*4882a593Smuzhiyun #define CONFIG_SYS_HZ				1000
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE		0x3E800000	/* SDRAM */
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun #ifdef CONFIG_RUN_FROM_IRAM_ONLY
179*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_BASE		(DDR_BASE_ADDR)
180*4882a593Smuzhiyun #endif
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun #if 0
183*4882a593Smuzhiyun /* Configure PXE */
184*4882a593Smuzhiyun #define CONFIG_BOOTP_PXE
185*4882a593Smuzhiyun #define CONFIG_BOOTP_PXE_CLIENTARCH	0x100
186*4882a593Smuzhiyun #endif
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun /* Physical memory map */
189*4882a593Smuzhiyun /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
190*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS		1
191*4882a593Smuzhiyun #define PHYS_SDRAM			(DDR_BASE_ADDR)
192*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE			(256 * 1024 * 1024)
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
195*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
196*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \
199*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
200*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \
201*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun /* environment organization */
204*4882a593Smuzhiyun #define CONFIG_ENV_SIZE			(8 * 1024)
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
207*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV		0
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTFILESIZE
211*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTPATH
212*4882a593Smuzhiyun #define CONFIG_BOOTP_GATEWAY
213*4882a593Smuzhiyun #define CONFIG_BOOTP_HOSTNAME
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun #endif
216