1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2022 Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __CONFIG_RV1106_COMMON_H 8*4882a593Smuzhiyun #define __CONFIG_RV1106_COMMON_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include "rockchip-common.h" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define COUNTER_FREQUENCY 24000000 13*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (16 << 20) 14*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 1024 15*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_MEM32 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x00200000 18*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR 0x00400000 19*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x00e00800 20*4882a593Smuzhiyun #define CONFIG_SYS_BOOTM_LEN (64 << 20) 21*4882a593Smuzhiyun #define GICD_BASE 0xff1f1000 22*4882a593Smuzhiyun #define GICC_BASE 0xff1f2000 23*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE 0 24*4882a593Smuzhiyun #define SDRAM_MAX_SIZE 0xff000000 25*4882a593Smuzhiyun #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 26*4882a593Smuzhiyun #define CONFIG_PERIPH_DEVICE_START_ADDR (CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE) 27*4882a593Smuzhiyun #define CONFIG_PERIPH_DEVICE_END_ADDR SZ_4G 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* SPL */ 30*4882a593Smuzhiyun #define CONFIG_SPL_FRAMEWORK 31*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE 0x00000000 32*4882a593Smuzhiyun #define CONFIG_SPL_MAX_SIZE 0x30000 33*4882a593Smuzhiyun #define CONFIG_SPL_BSS_START_ADDR 0x001fe000 34*4882a593Smuzhiyun #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 35*4882a593Smuzhiyun #define CONFIG_SPL_STACK 0x001fe000 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* secure otp */ 38*4882a593Smuzhiyun #define OTP_UBOOT_ROLLBACK_OFFSET 0xe0 39*4882a593Smuzhiyun #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 40*4882a593Smuzhiyun #define OTP_ALL_ONES_NUM_BITS 32 41*4882a593Smuzhiyun #define OTP_SECURE_BOOT_ENABLE_ADDR 0x80 42*4882a593Smuzhiyun #define OTP_SECURE_BOOT_ENABLE_SIZE 2 43*4882a593Smuzhiyun #define OTP_RSA_HASH_ADDR 0x90 44*4882a593Smuzhiyun #define OTP_RSA_HASH_SIZE 32 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* MMC/SD IP block */ 47*4882a593Smuzhiyun #define CONFIG_BOUNCE_BUFFER 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD 50*4882a593Smuzhiyun /* usb mass storage */ 51*4882a593Smuzhiyun #define CONFIG_USB_FUNCTION_MASS_STORAGE 52*4882a593Smuzhiyun #define CONFIG_ROCKUSB_G_DNL_PID 0x110c 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define CONFIG_LIB_HW_RAND 55*4882a593Smuzhiyun #define CONFIG_PREBOOT 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #if CONFIG_USB_FUNCTION_DFU 58*4882a593Smuzhiyun #define CONFIG_SET_DFU_ALT_INFO 59*4882a593Smuzhiyun #endif 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* 62*4882a593Smuzhiyun * Image: 0 - 8M 63*4882a593Smuzhiyun * zImage: 8 - 12M 64*4882a593Smuzhiyun * fdt: 12 - 13M 65*4882a593Smuzhiyun * ramdisk: 14 ... 66*4882a593Smuzhiyun */ 67*4882a593Smuzhiyun #define ENV_MEM_LAYOUT_SETTINGS \ 68*4882a593Smuzhiyun "scriptaddr=0x00b00000\0" \ 69*4882a593Smuzhiyun "pxefile_addr_r=0x00c00000\0" \ 70*4882a593Smuzhiyun "fdt_addr_r=0x00c00000\0" \ 71*4882a593Smuzhiyun "kernel_addr_c=0x00808000\0" \ 72*4882a593Smuzhiyun "kernel_addr_r=0x00008000\0" \ 73*4882a593Smuzhiyun "ramdisk_addr_r=0x000e00000\0" 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 76*4882a593Smuzhiyun ENV_MEM_LAYOUT_SETTINGS \ 77*4882a593Smuzhiyun ROCKCHIP_DEVICE_SETTINGS \ 78*4882a593Smuzhiyun RKIMG_DET_BOOTDEV 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #undef RKIMG_BOOTCOMMAND 81*4882a593Smuzhiyun #ifdef CONFIG_FIT_SIGNATURE 82*4882a593Smuzhiyun #define RKIMG_BOOTCOMMAND \ 83*4882a593Smuzhiyun "boot_fit;" 84*4882a593Smuzhiyun #else 85*4882a593Smuzhiyun #define RKIMG_BOOTCOMMAND \ 86*4882a593Smuzhiyun "boot_fit;" \ 87*4882a593Smuzhiyun "boot_android ${devtype} ${devnum};" 88*4882a593Smuzhiyun #endif 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* Update define for tiny image */ 91*4882a593Smuzhiyun #ifdef CONFIG_ROCKCHIP_IMAGE_TINY 92*4882a593Smuzhiyun #undef RKIMG_BOOTCOMMAND 93*4882a593Smuzhiyun #undef RKIMG_DET_BOOTDEV 94*4882a593Smuzhiyun #undef CONFIG_EXTRA_ENV_SETTINGS 95*4882a593Smuzhiyun #undef CONFIG_AUTO_COMPLETE 96*4882a593Smuzhiyun #undef CONFIG_SYS_LONGHELP 97*4882a593Smuzhiyun #undef CONFIG_ZLIB 98*4882a593Smuzhiyun #undef CONFIG_GZIP 99*4882a593Smuzhiyun /* TODO: #define CONFIG_LIB_HW_RAND */ 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define RKIMG_BOOTCOMMAND "boot_fit;" 102*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS ENV_MEM_LAYOUT_SETTINGS 103*4882a593Smuzhiyun #endif 104*4882a593Smuzhiyun #endif /* !CONFIG_SPL_BUILD */ 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #endif 107