xref: /OK3568_Linux_fs/u-boot/include/configs/rk3066_common.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:     GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #ifndef __CONFIG_RK3066_COMMON_H
8*4882a593Smuzhiyun #define __CONFIG_RK3066_COMMON_H
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <asm/arch/hardware.h>
11*4882a593Smuzhiyun #include "rockchip-common.h"
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
14*4882a593Smuzhiyun #define CONFIG_SYS_MAXARGS		16
15*4882a593Smuzhiyun #define CONFIG_BAUDRATE			115200
16*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
17*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE		256
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE		0x60000000
20*4882a593Smuzhiyun #define SDRAM_BANK_SIZE			(1024UL << 20UL)
21*4882a593Smuzhiyun #define SDRAM_MAX_SIZE			0x80000000
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define CONFIG_SYS_TIMER_COUNTS_DOWN
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE		0x60408000
26*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR		0x78000000
27*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR		0x70800800
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define CONFIG_BOUNCE_BUFFER
30*4882a593Smuzhiyun #define CONFIG_SPL_FRAMEWORK
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE	8
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define CONFIG_ROCKUSB_G_DNL_PID	0x300A
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #ifdef CONFIG_TPL_BUILD
37*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE		0x10080C04
38*4882a593Smuzhiyun #define CONFIG_SPL_STACK		0x1008FFFF
39*4882a593Smuzhiyun /* tpl size max 32kb - 4byte RK30 header */
40*4882a593Smuzhiyun #define CONFIG_SPL_MAX_SIZE		(0x8000 - 0x4)
41*4882a593Smuzhiyun #elif defined(CONFIG_SPL_BUILD)
42*4882a593Smuzhiyun /* spl size max 200k */
43*4882a593Smuzhiyun #define CONFIG_SPL_MAX_SIZE		0x32000
44*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE		0x60000000
45*4882a593Smuzhiyun #define CONFIG_SPL_STACK		0x1008FFFF
46*4882a593Smuzhiyun #define CONFIG_SPL_BOARD_INIT
47*4882a593Smuzhiyun #define CONFIG_SPL_NAND_DRIVERS
48*4882a593Smuzhiyun #define CONFIG_SPL_NAND_LOAD
49*4882a593Smuzhiyun #define CONFIG_SPL_NAND_ECC
50*4882a593Smuzhiyun #define CONFIG_SPL_NAND_BASE
51*4882a593Smuzhiyun #define CONFIG_SPL_NAND_INIT
52*4882a593Smuzhiyun #define CONFIG_SPL_NAND_BBT
53*4882a593Smuzhiyun #define CONFIG_SPL_NAND_IDS
54*4882a593Smuzhiyun #define CONFIG_SPL_NAND_UTIL
55*4882a593Smuzhiyun #define CONFIG_SPL_NAND_RAW_ONLY
56*4882a593Smuzhiyun #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
57*4882a593Smuzhiyun #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
58*4882a593Smuzhiyun #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
59*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS ROCKCHIP_DEVICE_SETTINGS
60*4882a593Smuzhiyun #endif
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun #include <config_distro_defaults.h>
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun #define CONFIG_USB_FUNCTION_MASS_STORAGE
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define MTDIDS_DEFAULT			"nand0=rockchip-nand.0"
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define ENV_MEM_LAYOUT_SETTINGS \
71*4882a593Smuzhiyun 	"scriptaddr=0x60000000\0" \
72*4882a593Smuzhiyun 	"pxefile_addr_r=0x60100000\0" \
73*4882a593Smuzhiyun 	"fdt_addr_r=0x68300000\0" \
74*4882a593Smuzhiyun 	"kernel_addr_r=0x62000000\0" \
75*4882a593Smuzhiyun 	"ramdisk_addr_r=0x6a200000\0"
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun #include <config_distro_bootcmd.h>
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
80*4882a593Smuzhiyun 	"fdt_high=0x6fffffff\0" \
81*4882a593Smuzhiyun 	"initrd_high=0x6fffffff\0" \
82*4882a593Smuzhiyun 	"partitions=" PARTS_DEFAULT \
83*4882a593Smuzhiyun 	"mtdids=" MTDIDS_DEFAULT "\0" \
84*4882a593Smuzhiyun 	ENV_MEM_LAYOUT_SETTINGS \
85*4882a593Smuzhiyun 	ROCKCHIP_DEVICE_SETTINGS \
86*4882a593Smuzhiyun 	BOOTENV
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #endif
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun #define CONFIG_PREBOOT
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #endif
93