1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2013 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the phytec PCM-052 SoM. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __CONFIG_H 10*4882a593Smuzhiyun #define __CONFIG_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* Enable passing of ATAGs */ 17*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* Size of malloc() pool */ 20*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* Allow to overwrite serial and ethaddr */ 23*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* NAND support */ 26*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #ifdef CONFIG_CMD_NAND 29*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 30*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define CONFIG_JFFS2_NAND 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* Dynamic MTD partition support */ 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #ifndef MTDIDS_DEFAULT 37*4882a593Smuzhiyun #define MTDIDS_DEFAULT "nand0=NAND" 38*4882a593Smuzhiyun #endif 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #ifndef MTDPARTS_DEFAULT 41*4882a593Smuzhiyun #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\ 42*4882a593Smuzhiyun ",128k(env1)"\ 43*4882a593Smuzhiyun ",128k(env2)"\ 44*4882a593Smuzhiyun ",128k(dtb)"\ 45*4882a593Smuzhiyun ",6144k(kernel)"\ 46*4882a593Smuzhiyun ",-(root)" 47*4882a593Smuzhiyun #endif 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #endif 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC 52*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR 0 53*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_NUM 1 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define CONFIG_FEC_MXC 58*4882a593Smuzhiyun #define CONFIG_MII 59*4882a593Smuzhiyun #define IMX_FEC_BASE ENET_BASE_ADDR 60*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 61*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* QSPI Configs*/ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #ifdef CONFIG_FSL_QSPI 66*4882a593Smuzhiyun #define FSL_QSPI_FLASH_SIZE (1 << 24) 67*4882a593Smuzhiyun #define FSL_QSPI_FLASH_NUM 2 68*4882a593Smuzhiyun #define CONFIG_SYS_FSL_QSPI_LE 69*4882a593Smuzhiyun #endif 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* I2C Configs */ 72*4882a593Smuzhiyun #define CONFIG_SYS_I2C 73*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C3 74*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* RTC (actually an RV-4162 but M41T62-compatible) */ 77*4882a593Smuzhiyun #define CONFIG_RTC_M41T62 78*4882a593Smuzhiyun #define CONFIG_SYS_I2C_RTC_ADDR 0x68 79*4882a593Smuzhiyun #define CONFIG_SYS_RTC_BUS_NUM 2 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* EEPROM (24FC256) */ 82*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 83*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 84*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_BUS 2 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define CONFIG_LOADADDR 0x82000000 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* We boot from the gfxRAM area of the OCRAM. */ 90*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x3f408000 91*4882a593Smuzhiyun #define CONFIG_BOARD_SIZE_LIMIT 524288 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* if no target-specific extra environment settings were defined by the 94*4882a593Smuzhiyun target, define an empty one */ 95*4882a593Smuzhiyun #ifndef PCM052_EXTRA_ENV_SETTINGS 96*4882a593Smuzhiyun #define PCM052_EXTRA_ENV_SETTINGS 97*4882a593Smuzhiyun #endif 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /* if no target-specific boot command was defined by the target, 100*4882a593Smuzhiyun define an empty one */ 101*4882a593Smuzhiyun #ifndef PCM052_BOOTCOMMAND 102*4882a593Smuzhiyun #define PCM052_BOOTCOMMAND 103*4882a593Smuzhiyun #endif 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* if no target-specific extra environment settings were defined by the 106*4882a593Smuzhiyun target, define an empty one */ 107*4882a593Smuzhiyun #ifndef PCM052_NET_INIT 108*4882a593Smuzhiyun #define PCM052_NET_INIT 109*4882a593Smuzhiyun #endif 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* boot command, including the target-defined one if any */ 112*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand" 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun /* Extra env settings (including the target-defined ones if any) */ 115*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 116*4882a593Smuzhiyun PCM052_EXTRA_ENV_SETTINGS \ 117*4882a593Smuzhiyun "autoload=no\0" \ 118*4882a593Smuzhiyun "fdt_high=0xffffffff\0" \ 119*4882a593Smuzhiyun "initrd_high=0xffffffff\0" \ 120*4882a593Smuzhiyun "blimg_file=u-boot.vyb\0" \ 121*4882a593Smuzhiyun "blimg_addr=0x81000000\0" \ 122*4882a593Smuzhiyun "kernel_file=zImage\0" \ 123*4882a593Smuzhiyun "kernel_addr=0x82000000\0" \ 124*4882a593Smuzhiyun "fdt_file=zImage.dtb\0" \ 125*4882a593Smuzhiyun "fdt_addr=0x81000000\0" \ 126*4882a593Smuzhiyun "ram_file=uRamdisk\0" \ 127*4882a593Smuzhiyun "ram_addr=0x83000000\0" \ 128*4882a593Smuzhiyun "filesys=rootfs.ubifs\0" \ 129*4882a593Smuzhiyun "sys_addr=0x81000000\0" \ 130*4882a593Smuzhiyun "tftploc=/path/to/tftp/directory/\0" \ 131*4882a593Smuzhiyun "nfs_root=/path/to/nfs/root\0" \ 132*4882a593Smuzhiyun "tftptimeout=1000\0" \ 133*4882a593Smuzhiyun "tftptimeoutcountmax=1000000\0" \ 134*4882a593Smuzhiyun "mtdparts=" MTDPARTS_DEFAULT "\0" \ 135*4882a593Smuzhiyun "bootargs_base=setenv bootargs rw " \ 136*4882a593Smuzhiyun " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \ 137*4882a593Smuzhiyun "console=ttyLP1,115200n8\0" \ 138*4882a593Smuzhiyun "bootargs_sd=setenv bootargs ${bootargs} " \ 139*4882a593Smuzhiyun "root=/dev/mmcblk0p2 rootwait\0" \ 140*4882a593Smuzhiyun "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \ 141*4882a593Smuzhiyun "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \ 142*4882a593Smuzhiyun "bootargs_nand=setenv bootargs ${bootargs} " \ 143*4882a593Smuzhiyun "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \ 144*4882a593Smuzhiyun "bootargs_ram=setenv bootargs ${bootargs} " \ 145*4882a593Smuzhiyun "root=/dev/ram rw initrd=${ram_addr}\0" \ 146*4882a593Smuzhiyun "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 147*4882a593Smuzhiyun "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \ 148*4882a593Smuzhiyun "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \ 149*4882a593Smuzhiyun "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \ 150*4882a593Smuzhiyun "bootz ${kernel_addr} - ${fdt_addr}\0" \ 151*4882a593Smuzhiyun "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \ 152*4882a593Smuzhiyun "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \ 153*4882a593Smuzhiyun "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \ 154*4882a593Smuzhiyun "bootz ${kernel_addr} - ${fdt_addr}\0" \ 155*4882a593Smuzhiyun "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \ 156*4882a593Smuzhiyun "nand read ${fdt_addr} dtb; " \ 157*4882a593Smuzhiyun "nand read ${kernel_addr} kernel; " \ 158*4882a593Smuzhiyun "bootz ${kernel_addr} - ${fdt_addr}\0" \ 159*4882a593Smuzhiyun "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \ 160*4882a593Smuzhiyun "nand read ${fdt_addr} dtb; " \ 161*4882a593Smuzhiyun "nand read ${kernel_addr} kernel; " \ 162*4882a593Smuzhiyun "nand read ${ram_addr} root; " \ 163*4882a593Smuzhiyun "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \ 164*4882a593Smuzhiyun "update_bootloader_from_tftp=" PCM052_NET_INIT \ 165*4882a593Smuzhiyun "if tftp ${blimg_addr} "\ 166*4882a593Smuzhiyun "${tftpdir}${blimg_file}; then " \ 167*4882a593Smuzhiyun "mtdparts default; " \ 168*4882a593Smuzhiyun "nand erase.part bootloader; " \ 169*4882a593Smuzhiyun "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \ 170*4882a593Smuzhiyun "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \ 171*4882a593Smuzhiyun "${kernel_file}; " \ 172*4882a593Smuzhiyun "then mtdparts default; " \ 173*4882a593Smuzhiyun "nand erase.part kernel; " \ 174*4882a593Smuzhiyun "nand write ${kernel_addr} kernel ${filesize}; " \ 175*4882a593Smuzhiyun "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \ 176*4882a593Smuzhiyun "nand erase.part dtb; " \ 177*4882a593Smuzhiyun "nand write ${fdt_addr} dtb ${filesize}; fi\0" \ 178*4882a593Smuzhiyun "update_kernel_from_tftp=" PCM052_NET_INIT \ 179*4882a593Smuzhiyun "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \ 180*4882a593Smuzhiyun "then setenv fdtsize ${filesize}; " \ 181*4882a593Smuzhiyun "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \ 182*4882a593Smuzhiyun "mtdparts default; " \ 183*4882a593Smuzhiyun "nand erase.part dtb; " \ 184*4882a593Smuzhiyun "nand write ${fdt_addr} dtb ${fdtsize}; " \ 185*4882a593Smuzhiyun "nand erase.part kernel; " \ 186*4882a593Smuzhiyun "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \ 187*4882a593Smuzhiyun "update_rootfs_from_tftp=" PCM052_NET_INIT \ 188*4882a593Smuzhiyun "if tftp ${sys_addr} ${tftpdir}${filesys}; " \ 189*4882a593Smuzhiyun "then mtdparts default; " \ 190*4882a593Smuzhiyun "nand erase.part root; " \ 191*4882a593Smuzhiyun "ubi part root; " \ 192*4882a593Smuzhiyun "ubi create rootfs; " \ 193*4882a593Smuzhiyun "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \ 194*4882a593Smuzhiyun "update_ramdisk_from_tftp=" PCM052_NET_INIT \ 195*4882a593Smuzhiyun "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \ 196*4882a593Smuzhiyun "then mtdparts default; " \ 197*4882a593Smuzhiyun "nand erase.part root; " \ 198*4882a593Smuzhiyun "nand write ${ram_addr} root ${filesize}; fi\0" 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun /* Miscellaneous configurable options */ 201*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP /* undef to save memory */ 202*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE 203*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80010000 206*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x87C00000 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun /* Physical memory map */ 211*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 212*4882a593Smuzhiyun #define PHYS_SDRAM (0x80000000) 213*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024) 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 216*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 217*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 220*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 221*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 222*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun /* environment organization */ 225*4882a593Smuzhiyun #ifdef CONFIG_ENV_IS_IN_MMC 226*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (8 * 1024) 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 229*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 230*4882a593Smuzhiyun #endif 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun #ifdef CONFIG_ENV_IS_IN_NAND 233*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE (128 * 1024) 234*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (8 * 1024) 235*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET 0xA0000 236*4882a593Smuzhiyun #define CONFIG_ENV_SIZE_REDUND (8 * 1024) 237*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET_REDUND 0xC0000 238*4882a593Smuzhiyun #endif 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun #endif 241