1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2003 3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* 9*4882a593Smuzhiyun * This file contains the configuration parameters for the dbau1x00 board. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef __CONFIG_H 13*4882a593Smuzhiyun #define __CONFIG_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define CONFIG_PB1X00 1 16*4882a593Smuzhiyun #define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #ifdef CONFIG_PB1000 19*4882a593Smuzhiyun #define CONFIG_SOC_AU1000 1 20*4882a593Smuzhiyun #else 21*4882a593Smuzhiyun #ifdef CONFIG_PB1100 22*4882a593Smuzhiyun #define CONFIG_SOC_AU1100 1 23*4882a593Smuzhiyun #else 24*4882a593Smuzhiyun #ifdef CONFIG_PB1500 25*4882a593Smuzhiyun #define CONFIG_SOC_AU1500 1 26*4882a593Smuzhiyun #else 27*4882a593Smuzhiyun #error "No valid board set" 28*4882a593Smuzhiyun #endif 29*4882a593Smuzhiyun #endif 30*4882a593Smuzhiyun #endif 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 35*4882a593Smuzhiyun "addmisc=setenv bootargs ${bootargs} " \ 36*4882a593Smuzhiyun "console=ttyS0,${baudrate} " \ 37*4882a593Smuzhiyun "panic=1\0" \ 38*4882a593Smuzhiyun "bootfile=/vmlinux.img\0" \ 39*4882a593Smuzhiyun "load=tftp 80500000 ${u-boot}\0" \ 40*4882a593Smuzhiyun "" 41*4882a593Smuzhiyun /* Boot from NFS root */ 42*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm" 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* 45*4882a593Smuzhiyun * Miscellaneous configurable options 46*4882a593Smuzhiyun */ 47*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP /* undef to save memory */ 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN 128*1024 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define CONFIG_SYS_MIPS_TIMER_FREQ 396000000 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80100000 60*4882a593Smuzhiyun #undef CONFIG_SYS_MEMTEST_START 61*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80200000 62*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x83800000 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /*----------------------------------------------------------------------- 65*4882a593Smuzhiyun * FLASH and environment organization 66*4882a593Smuzhiyun */ 67*4882a593Smuzhiyun #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ 68*4882a593Smuzhiyun #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */ 71*4882a593Smuzhiyun #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 74*4882a593Smuzhiyun #define CONFIG_SYS_MONITOR_LEN (192 << 10) 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET 0x4000000 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* We boot from this flash, selected with dip switch */ 79*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* timeout values are in ticks */ 82*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ 83*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* Address and size of Primary Environment Sector */ 86*4882a593Smuzhiyun #define CONFIG_ENV_ADDR 0xB0030000 87*4882a593Smuzhiyun #define CONFIG_ENV_SIZE 0x10000 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #define CONFIG_FLASH_16BIT 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 2 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define CONFIG_MEMSIZE_IN_BYTES 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /*---USB -------------------------------------------*/ 96*4882a593Smuzhiyun #if 0 97*4882a593Smuzhiyun #define CONFIG_USB_OHCI 98*4882a593Smuzhiyun #endif 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /*---ATA PCMCIA ------------------------------------*/ 101*4882a593Smuzhiyun #if 0 102*4882a593Smuzhiyun #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ 103*4882a593Smuzhiyun #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000 104*4882a593Smuzhiyun #define CONFIG_PCMCIA_SLOT_A 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #define CONFIG_ATAPI 1 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun /* We run CF in "true ide" mode or a harddrive via pcmcia */ 109*4882a593Smuzhiyun #define CONFIG_IDE_PCMCIA 1 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* We only support one slot for now */ 112*4882a593Smuzhiyun #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ 113*4882a593Smuzhiyun #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun #undef CONFIG_IDE_RESET /* reset for ide not supported */ 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun /* Offset for data I/O */ 122*4882a593Smuzhiyun #define CONFIG_SYS_ATA_DATA_OFFSET 8 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun /* Offset for normal register accesses */ 125*4882a593Smuzhiyun #define CONFIG_SYS_ATA_REG_OFFSET 0 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun /* Offset for alternate registers */ 128*4882a593Smuzhiyun #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun #endif 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun /* 133*4882a593Smuzhiyun * BOOTP options 134*4882a593Smuzhiyun */ 135*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTFILESIZE 136*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTPATH 137*4882a593Smuzhiyun #define CONFIG_BOOTP_GATEWAY 138*4882a593Smuzhiyun #define CONFIG_BOOTP_HOSTNAME 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun /* 141*4882a593Smuzhiyun * Command line configuration. 142*4882a593Smuzhiyun */ 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun #endif /* __CONFIG_H */ 145