1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2013 Marek Vasut <marex@denx.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or 5*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 6*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of 7*4882a593Smuzhiyun * the License, or (at your option) any later version. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, 10*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*4882a593Smuzhiyun * GNU General Public License for more details. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License 15*4882a593Smuzhiyun * along with this program; if not, write to the Free Software 16*4882a593Smuzhiyun * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17*4882a593Smuzhiyun * MA 02111-1307 USA 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun #ifndef __CONFIGS_MXS_H__ 20*4882a593Smuzhiyun #define __CONFIGS_MXS_H__ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* 23*4882a593Smuzhiyun * Includes 24*4882a593Smuzhiyun */ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #if defined(CONFIG_MX23) && defined(CONFIG_MX28) 27*4882a593Smuzhiyun #error Select either CONFIG_MX23 or CONFIG_MX28 , never both! 28*4882a593Smuzhiyun #elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28) 29*4882a593Smuzhiyun #error Select one of CONFIG_MX23 or CONFIG_MX28 ! 30*4882a593Smuzhiyun #endif 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #include <asm/arch/regs-base.h> 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #if defined(CONFIG_MX23) 35*4882a593Smuzhiyun #include <asm/arch/iomux-mx23.h> 36*4882a593Smuzhiyun #elif defined(CONFIG_MX28) 37*4882a593Smuzhiyun #include <asm/arch/iomux-mx28.h> 38*4882a593Smuzhiyun #endif 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* 41*4882a593Smuzhiyun * CPU specifics 42*4882a593Smuzhiyun */ 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* Startup hooks */ 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* SPL */ 47*4882a593Smuzhiyun #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 48*4882a593Smuzhiyun #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* Memory sizes */ 51*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 52*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 53*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */ 56*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 57*4882a593Smuzhiyun #if defined(CONFIG_MX23) 58*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024) 59*4882a593Smuzhiyun #elif defined(CONFIG_MX28) 60*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 61*4882a593Smuzhiyun #endif 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* Point initial SP in SRAM so SPL can use it too. */ 64*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 65*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 66*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 67*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /* 70*4882a593Smuzhiyun * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 71*4882a593Smuzhiyun * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 72*4882a593Smuzhiyun * binary. In case there was more of this mess, 0x100 bytes are skipped. 73*4882a593Smuzhiyun * 74*4882a593Smuzhiyun * In case of a HAB boot, we cannot for some weird reason use the first 4KiB 75*4882a593Smuzhiyun * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST 76*4882a593Smuzhiyun * blocks, thus U-Boot starts at offset +8 KiB of DRAM start. 77*4882a593Smuzhiyun * 78*4882a593Smuzhiyun * As for the SPL, we must avoid the first 4 KiB as well, but we load the 79*4882a593Smuzhiyun * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB. 80*4882a593Smuzhiyun */ 81*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x40002000 82*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE 0x00001000 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* U-Boot general configuration */ 85*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP 86*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 87*4882a593Smuzhiyun #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 88*4882a593Smuzhiyun #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 89*4882a593Smuzhiyun /* Boot argument buffer size */ 90*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 91*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING /* Command history etc */ 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* Booting Linux */ 94*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG 95*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* 98*4882a593Smuzhiyun * Drivers 99*4882a593Smuzhiyun */ 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun /* APBH DMA */ 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* GPIO */ 104*4882a593Smuzhiyun #define CONFIG_MXS_GPIO 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun /* 107*4882a593Smuzhiyun * DUART Serial Driver. 108*4882a593Smuzhiyun * Conflicts with AUART driver which can be set by board. 109*4882a593Smuzhiyun */ 110*4882a593Smuzhiyun #define CONFIG_PL011_SERIAL 111*4882a593Smuzhiyun #define CONFIG_PL011_CLOCK 24000000 112*4882a593Smuzhiyun #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 113*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 0 114*4882a593Smuzhiyun /* Default baudrate can be overridden by board! */ 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun /* FEC Ethernet on SoC */ 117*4882a593Smuzhiyun #ifdef CONFIG_FEC_MXC 118*4882a593Smuzhiyun #define CONFIG_MII 119*4882a593Smuzhiyun #ifndef CONFIG_ETHPRIME 120*4882a593Smuzhiyun #define CONFIG_ETHPRIME "FEC0" 121*4882a593Smuzhiyun #endif 122*4882a593Smuzhiyun #ifndef CONFIG_FEC_XCV_TYPE 123*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 124*4882a593Smuzhiyun #endif 125*4882a593Smuzhiyun #endif 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun /* LCD */ 128*4882a593Smuzhiyun #ifdef CONFIG_VIDEO 129*4882a593Smuzhiyun #define CONFIG_VIDEO_MXS 130*4882a593Smuzhiyun #endif 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun /* MMC */ 133*4882a593Smuzhiyun #ifdef CONFIG_CMD_MMC 134*4882a593Smuzhiyun #define CONFIG_BOUNCE_BUFFER 135*4882a593Smuzhiyun #endif 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun /* NAND */ 138*4882a593Smuzhiyun #ifdef CONFIG_CMD_NAND 139*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 140*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE 0x60000000 141*4882a593Smuzhiyun #define CONFIG_SYS_NAND_5_ADDR_CYCLE 142*4882a593Smuzhiyun #endif 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun /* OCOTP */ 145*4882a593Smuzhiyun #ifdef CONFIG_CMD_FUSE 146*4882a593Smuzhiyun #define CONFIG_MXS_OCOTP 147*4882a593Smuzhiyun #endif 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun /* SPI */ 150*4882a593Smuzhiyun #ifdef CONFIG_CMD_SPI 151*4882a593Smuzhiyun #define CONFIG_HARD_SPI 152*4882a593Smuzhiyun #define CONFIG_SPI_HALF_DUPLEX 153*4882a593Smuzhiyun #endif 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun /* USB */ 156*4882a593Smuzhiyun #ifdef CONFIG_CMD_USB 157*4882a593Smuzhiyun #define CONFIG_USB_EHCI_MXS 158*4882a593Smuzhiyun #define CONFIG_EHCI_IS_TDI 159*4882a593Smuzhiyun #endif 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun #endif /* __CONFIGS_MXS_H__ */ 162