1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the Freescale i.MX7ULP EVK board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __MX7ULP_EVK_CONFIG_H 10*4882a593Smuzhiyun #define __MX7ULP_EVK_CONFIG_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <linux/sizes.h> 13*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /*Uncomment it to use secure boot*/ 16*4882a593Smuzhiyun /*#define CONFIG_SECURE_BOOT*/ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #ifdef CONFIG_SECURE_BOOT 19*4882a593Smuzhiyun #ifndef CONFIG_CSF_SIZE 20*4882a593Smuzhiyun #define CONFIG_CSF_SIZE 0x4000 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun #endif 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define CONFIG_BOARD_POSTCLK_INIT 25*4882a593Smuzhiyun #define CONFIG_SYS_BOOTM_LEN 0x1000000 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define SRC_BASE_ADDR CMC1_RBASE 28*4882a593Smuzhiyun #define IRAM_BASE_ADDR OCRAM_0_BASE 29*4882a593Smuzhiyun #define IOMUXC_BASE_ADDR IOMUXC1_RBASE 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define CONFIG_BOUNCE_BUFFER 32*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC 33*4882a593Smuzhiyun #define CONFIG_FSL_USDHC 34*4882a593Smuzhiyun #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 1 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR 0 39*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 40*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 41*4882a593Smuzhiyun #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 42*4882a593Smuzhiyun #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (12 * SZ_64K) 45*4882a593Smuzhiyun #define CONFIG_ENV_SIZE SZ_8K 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* Using ULP WDOG for reset */ 48*4882a593Smuzhiyun #define WDOG_BASE_ADDR WDG1_RBASE 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define CONFIG_SYS_ARCH_TIMER 51*4882a593Smuzhiyun #define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define CONFIG_INITRD_TAG 54*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG 55*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS 56*4882a593Smuzhiyun /*#define CONFIG_REVISION_TAG*/ 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* Size of malloc() pool */ 59*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #define CONFIG_BOARD_EARLY_INIT_F 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* UART */ 64*4882a593Smuzhiyun #define LPUART_BASE LPUART4_RBASE 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* allow to overwrite serial and ethaddr */ 67*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE 68*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 1 69*4882a593Smuzhiyun #define CONFIG_BAUDRATE 115200 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #undef CONFIG_CMD_IMLS 72*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP 73*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define CONFIG_SYS_CACHELINE_SIZE 64 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* Miscellaneous configurable options */ 78*4882a593Smuzhiyun #define CONFIG_SYS_PROMPT "=> " 79*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 512 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define CONFIG_SYS_MAXARGS 256 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* Physical Memory Map */ 86*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x67800000 89*4882a593Smuzhiyun #define PHYS_SDRAM 0x60000000 90*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE SZ_1G 91*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 92*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 93*4882a593Smuzhiyun #define CONFIG_CMD_BOOTZ 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define CONFIG_LOADADDR 0x60800000 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun #define CONFIG_CMD_MEMTEST 98*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x9E000000 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 101*4882a593Smuzhiyun "script=boot.scr\0" \ 102*4882a593Smuzhiyun "image=zImage\0" \ 103*4882a593Smuzhiyun "console=ttyLP0\0" \ 104*4882a593Smuzhiyun "fdt_high=0xffffffff\0" \ 105*4882a593Smuzhiyun "initrd_high=0xffffffff\0" \ 106*4882a593Smuzhiyun "fdt_file=imx7ulp-evk.dtb\0" \ 107*4882a593Smuzhiyun "fdt_addr=0x63000000\0" \ 108*4882a593Smuzhiyun "boot_fdt=try\0" \ 109*4882a593Smuzhiyun "earlycon=lpuart32,0x402D0010\0" \ 110*4882a593Smuzhiyun "ip_dyn=yes\0" \ 111*4882a593Smuzhiyun "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 112*4882a593Smuzhiyun "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 113*4882a593Smuzhiyun "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 114*4882a593Smuzhiyun "mmcautodetect=yes\0" \ 115*4882a593Smuzhiyun "mmcargs=setenv bootargs console=${console},${baudrate} " \ 116*4882a593Smuzhiyun "root=${mmcroot}\0" \ 117*4882a593Smuzhiyun "loadbootscript=" \ 118*4882a593Smuzhiyun "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 119*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 120*4882a593Smuzhiyun "source\0" \ 121*4882a593Smuzhiyun "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 122*4882a593Smuzhiyun "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 123*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 124*4882a593Smuzhiyun "run mmcargs; " \ 125*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 126*4882a593Smuzhiyun "if run loadfdt; then " \ 127*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 128*4882a593Smuzhiyun "else " \ 129*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 130*4882a593Smuzhiyun "bootz; " \ 131*4882a593Smuzhiyun "else " \ 132*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 133*4882a593Smuzhiyun "fi; " \ 134*4882a593Smuzhiyun "fi; " \ 135*4882a593Smuzhiyun "else " \ 136*4882a593Smuzhiyun "bootz; " \ 137*4882a593Smuzhiyun "fi;\0" \ 138*4882a593Smuzhiyun "netargs=setenv bootargs console=${console},${baudrate} " \ 139*4882a593Smuzhiyun "root=/dev/nfs " \ 140*4882a593Smuzhiyun "ip=:::::eth0:dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 141*4882a593Smuzhiyun "netboot=echo Booting from net ...; " \ 142*4882a593Smuzhiyun "run netargs; " \ 143*4882a593Smuzhiyun "if test ${ip_dyn} = yes; then " \ 144*4882a593Smuzhiyun "setenv get_cmd dhcp; " \ 145*4882a593Smuzhiyun "else " \ 146*4882a593Smuzhiyun "setenv get_cmd tftp; " \ 147*4882a593Smuzhiyun "fi; " \ 148*4882a593Smuzhiyun "usb start; "\ 149*4882a593Smuzhiyun "${get_cmd} ${image}; " \ 150*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 151*4882a593Smuzhiyun "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 152*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 153*4882a593Smuzhiyun "else " \ 154*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 155*4882a593Smuzhiyun "bootz; " \ 156*4882a593Smuzhiyun "else " \ 157*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 158*4882a593Smuzhiyun "fi; " \ 159*4882a593Smuzhiyun "fi; " \ 160*4882a593Smuzhiyun "else " \ 161*4882a593Smuzhiyun "bootz; " \ 162*4882a593Smuzhiyun "fi;\0" \ 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 165*4882a593Smuzhiyun "mmc dev ${mmcdev}; if mmc rescan; then " \ 166*4882a593Smuzhiyun "if run loadbootscript; then " \ 167*4882a593Smuzhiyun "run bootscript; " \ 168*4882a593Smuzhiyun "else " \ 169*4882a593Smuzhiyun "if run loadimage; then " \ 170*4882a593Smuzhiyun "run mmcboot; " \ 171*4882a593Smuzhiyun "fi; " \ 172*4882a593Smuzhiyun "fi; " \ 173*4882a593Smuzhiyun "fi" 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun #define CONFIG_SYS_HZ 1000 176*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 179*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 182*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 183*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 184*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun #ifndef CONFIG_SYS_DCACHE_OFF 187*4882a593Smuzhiyun #define CONFIG_CMD_CACHE 188*4882a593Smuzhiyun #endif 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun #endif /* __CONFIG_H */ 191