1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2015 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the Freescale i.MX7D SABRESD board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __MX7D_SABRESD_CONFIG_H 10*4882a593Smuzhiyun #define __MX7D_SABRESD_CONFIG_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include "mx7_common.h" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define CONFIG_DBG_MONITOR 15*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE SZ_1G 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* Size of malloc() pool */ 20*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* Network */ 23*4882a593Smuzhiyun #define CONFIG_FEC_MXC 24*4882a593Smuzhiyun #define CONFIG_MII 25*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RGMII 26*4882a593Smuzhiyun #define CONFIG_ETHPRIME "FEC" 27*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define CONFIG_PHY_BROADCOM 30*4882a593Smuzhiyun /* ENET1 */ 31*4882a593Smuzhiyun #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* MMC Config*/ 34*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR 0 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #undef CONFIG_BOOTM_NETBSD 37*4882a593Smuzhiyun #undef CONFIG_BOOTM_PLAN9 38*4882a593Smuzhiyun #undef CONFIG_BOOTM_RTEMS 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* I2C configs */ 41*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 42*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED 100000 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 45*4882a593Smuzhiyun #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #ifdef CONFIG_IMX_BOOTAUX 48*4882a593Smuzhiyun /* Set to QSPI1 A flash at default */ 49*4882a593Smuzhiyun #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define UPDATE_M4_ENV \ 52*4882a593Smuzhiyun "m4image=m4_qspi.bin\0" \ 53*4882a593Smuzhiyun "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ 54*4882a593Smuzhiyun "update_m4_from_sd=" \ 55*4882a593Smuzhiyun "if sf probe 0:0; then " \ 56*4882a593Smuzhiyun "if run loadm4image; then " \ 57*4882a593Smuzhiyun "setexpr fw_sz ${filesize} + 0xffff; " \ 58*4882a593Smuzhiyun "setexpr fw_sz ${fw_sz} / 0x10000; " \ 59*4882a593Smuzhiyun "setexpr fw_sz ${fw_sz} * 0x10000; " \ 60*4882a593Smuzhiyun "sf erase 0x0 ${fw_sz}; " \ 61*4882a593Smuzhiyun "sf write ${loadaddr} 0x0 ${filesize}; " \ 62*4882a593Smuzhiyun "fi; " \ 63*4882a593Smuzhiyun "fi\0" \ 64*4882a593Smuzhiyun "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" 65*4882a593Smuzhiyun #else 66*4882a593Smuzhiyun #define UPDATE_M4_ENV "" 67*4882a593Smuzhiyun #endif 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #define CONFIG_MFG_ENV_SETTINGS \ 70*4882a593Smuzhiyun "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ 71*4882a593Smuzhiyun "rdinit=/linuxrc " \ 72*4882a593Smuzhiyun "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ 73*4882a593Smuzhiyun "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ 74*4882a593Smuzhiyun "g_mass_storage.iSerialNumber=\"\" "\ 75*4882a593Smuzhiyun "clk_ignore_unused "\ 76*4882a593Smuzhiyun "\0" \ 77*4882a593Smuzhiyun "initrd_addr=0x83800000\0" \ 78*4882a593Smuzhiyun "initrd_high=0xffffffff\0" \ 79*4882a593Smuzhiyun "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define CONFIG_DFU_ENV_SETTINGS \ 82*4882a593Smuzhiyun "dfu_alt_info=image raw 0 0x800000;"\ 83*4882a593Smuzhiyun "u-boot raw 0 0x4000;"\ 84*4882a593Smuzhiyun "bootimg part 0 1;"\ 85*4882a593Smuzhiyun "rootfs part 0 2\0" \ 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 88*4882a593Smuzhiyun UPDATE_M4_ENV \ 89*4882a593Smuzhiyun CONFIG_MFG_ENV_SETTINGS \ 90*4882a593Smuzhiyun CONFIG_DFU_ENV_SETTINGS \ 91*4882a593Smuzhiyun "script=boot.scr\0" \ 92*4882a593Smuzhiyun "image=zImage\0" \ 93*4882a593Smuzhiyun "console=ttymxc0\0" \ 94*4882a593Smuzhiyun "fdt_high=0xffffffff\0" \ 95*4882a593Smuzhiyun "initrd_high=0xffffffff\0" \ 96*4882a593Smuzhiyun "fdt_file=imx7d-sdb.dtb\0" \ 97*4882a593Smuzhiyun "fdt_addr=0x83000000\0" \ 98*4882a593Smuzhiyun "boot_fdt=try\0" \ 99*4882a593Smuzhiyun "ip_dyn=yes\0" \ 100*4882a593Smuzhiyun "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 101*4882a593Smuzhiyun "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 102*4882a593Smuzhiyun "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 103*4882a593Smuzhiyun "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 104*4882a593Smuzhiyun "mmcautodetect=yes\0" \ 105*4882a593Smuzhiyun "mmcargs=setenv bootargs console=${console},${baudrate} " \ 106*4882a593Smuzhiyun "root=${mmcroot}\0" \ 107*4882a593Smuzhiyun "loadbootscript=" \ 108*4882a593Smuzhiyun "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 109*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 110*4882a593Smuzhiyun "source\0" \ 111*4882a593Smuzhiyun "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 112*4882a593Smuzhiyun "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 113*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 114*4882a593Smuzhiyun "run mmcargs; " \ 115*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 116*4882a593Smuzhiyun "if run loadfdt; then " \ 117*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 118*4882a593Smuzhiyun "else " \ 119*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 120*4882a593Smuzhiyun "bootz; " \ 121*4882a593Smuzhiyun "else " \ 122*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 123*4882a593Smuzhiyun "fi; " \ 124*4882a593Smuzhiyun "fi; " \ 125*4882a593Smuzhiyun "else " \ 126*4882a593Smuzhiyun "bootz; " \ 127*4882a593Smuzhiyun "fi;\0" \ 128*4882a593Smuzhiyun "netargs=setenv bootargs console=${console},${baudrate} " \ 129*4882a593Smuzhiyun "root=/dev/nfs " \ 130*4882a593Smuzhiyun "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 131*4882a593Smuzhiyun "netboot=echo Booting from net ...; " \ 132*4882a593Smuzhiyun "run netargs; " \ 133*4882a593Smuzhiyun "if test ${ip_dyn} = yes; then " \ 134*4882a593Smuzhiyun "setenv get_cmd dhcp; " \ 135*4882a593Smuzhiyun "else " \ 136*4882a593Smuzhiyun "setenv get_cmd tftp; " \ 137*4882a593Smuzhiyun "fi; " \ 138*4882a593Smuzhiyun "${get_cmd} ${image}; " \ 139*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 140*4882a593Smuzhiyun "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 141*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 142*4882a593Smuzhiyun "else " \ 143*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 144*4882a593Smuzhiyun "bootz; " \ 145*4882a593Smuzhiyun "else " \ 146*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 147*4882a593Smuzhiyun "fi; " \ 148*4882a593Smuzhiyun "fi; " \ 149*4882a593Smuzhiyun "else " \ 150*4882a593Smuzhiyun "bootz; " \ 151*4882a593Smuzhiyun "fi;\0" 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 154*4882a593Smuzhiyun "mmc dev ${mmcdev};" \ 155*4882a593Smuzhiyun "mmc dev ${mmcdev}; if mmc rescan; then " \ 156*4882a593Smuzhiyun "if run loadbootscript; then " \ 157*4882a593Smuzhiyun "run bootscript; " \ 158*4882a593Smuzhiyun "else " \ 159*4882a593Smuzhiyun "if run loadimage; then " \ 160*4882a593Smuzhiyun "run mmcboot; " \ 161*4882a593Smuzhiyun "else run netboot; " \ 162*4882a593Smuzhiyun "fi; " \ 163*4882a593Smuzhiyun "fi; " \ 164*4882a593Smuzhiyun "else run netboot; fi" 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80000000 167*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 170*4882a593Smuzhiyun #define CONFIG_SYS_HZ 1000 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun /* Physical Memory Map */ 173*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 174*4882a593Smuzhiyun #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 177*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 178*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 181*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 182*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 183*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun /* environment organization */ 186*4882a593Smuzhiyun #define CONFIG_ENV_SIZE SZ_8K 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun /* 189*4882a593Smuzhiyun * If want to use nand, define CONFIG_NAND_MXS and rework board 190*4882a593Smuzhiyun * to support nand, since emmc has pin conflicts with nand 191*4882a593Smuzhiyun */ 192*4882a593Smuzhiyun #ifdef CONFIG_NAND_MXS 193*4882a593Smuzhiyun /* NAND stuff */ 194*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 195*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE 0x40000000 196*4882a593Smuzhiyun #define CONFIG_SYS_NAND_5_ADDR_CYCLE 197*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun /* DMA stuff, needed for GPMI/MXS NAND support */ 200*4882a593Smuzhiyun #endif 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (12 * SZ_64K) 203*4882a593Smuzhiyun #ifdef CONFIG_NAND_MXS 204*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 1 205*4882a593Smuzhiyun #else 206*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 2 207*4882a593Smuzhiyun #endif 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 210*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 211*4882a593Smuzhiyun #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun /* USB Configs */ 214*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun #define CONFIG_USBD_HS 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun #define CONFIG_USB_FUNCTION_MASS_STORAGE 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun #ifdef CONFIG_VIDEO 223*4882a593Smuzhiyun #define CONFIG_VIDEO_MXS 224*4882a593Smuzhiyun #define CONFIG_VIDEO_LOGO 225*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN 226*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN_ALIGN 227*4882a593Smuzhiyun #define CONFIG_BMP_16BPP 228*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_RLE8 229*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_LOGO 230*4882a593Smuzhiyun #endif 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun #ifdef CONFIG_FSL_QSPI 233*4882a593Smuzhiyun #define CONFIG_SPI_FLASH 234*4882a593Smuzhiyun #define CONFIG_SPI_FLASH_MACRONIX 235*4882a593Smuzhiyun #define CONFIG_SPI_FLASH_BAR 236*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_BUS 0 237*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_CS 0 238*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED 40000000 239*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 240*4882a593Smuzhiyun #define FSL_QSPI_FLASH_NUM 1 241*4882a593Smuzhiyun #define FSL_QSPI_FLASH_SIZE SZ_64M 242*4882a593Smuzhiyun #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR 243*4882a593Smuzhiyun #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR 244*4882a593Smuzhiyun #endif 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun #endif /* __CONFIG_H */ 247