1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef __MX6ULLEVK_CONFIG_H 9*4882a593Smuzhiyun #define __MX6ULLEVK_CONFIG_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 13*4882a593Smuzhiyun #include <linux/sizes.h> 14*4882a593Smuzhiyun #include "mx6_common.h" 15*4882a593Smuzhiyun #include <asm/mach-imx/gpio.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifdef CONFIG_SECURE_BOOT 18*4882a593Smuzhiyun #ifndef CONFIG_CSF_SIZE 19*4882a593Smuzhiyun #define CONFIG_CSF_SIZE 0x4000 20*4882a593Smuzhiyun #endif 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE SZ_512M 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* Size of malloc() pool */ 28*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define CONFIG_MXC_GPIO 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define CONFIG_MXC_UART 33*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART1_BASE 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* MMC Configs */ 36*4882a593Smuzhiyun #ifdef CONFIG_FSL_USDHC 37*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* NAND pin conflicts with usdhc2 */ 40*4882a593Smuzhiyun #ifdef CONFIG_SYS_USE_NAND 41*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 1 42*4882a593Smuzhiyun #else 43*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 2 44*4882a593Smuzhiyun #endif 45*4882a593Smuzhiyun #endif 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* I2C configs */ 48*4882a593Smuzhiyun #ifdef CONFIG_CMD_I2C 49*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 50*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 51*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 52*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED 100000 53*4882a593Smuzhiyun #endif 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 58*4882a593Smuzhiyun "script=boot.scr\0" \ 59*4882a593Smuzhiyun "image=zImage\0" \ 60*4882a593Smuzhiyun "console=ttymxc0\0" \ 61*4882a593Smuzhiyun "fdt_high=0xffffffff\0" \ 62*4882a593Smuzhiyun "initrd_high=0xffffffff\0" \ 63*4882a593Smuzhiyun "fdt_file=imx6ull-14x14-evk.dtb\0" \ 64*4882a593Smuzhiyun "fdt_addr=0x83000000\0" \ 65*4882a593Smuzhiyun "boot_fdt=try\0" \ 66*4882a593Smuzhiyun "ip_dyn=yes\0" \ 67*4882a593Smuzhiyun "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 68*4882a593Smuzhiyun "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 69*4882a593Smuzhiyun "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 70*4882a593Smuzhiyun "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 71*4882a593Smuzhiyun "mmcautodetect=yes\0" \ 72*4882a593Smuzhiyun "mmcargs=setenv bootargs console=${console},${baudrate} " \ 73*4882a593Smuzhiyun "root=${mmcroot}\0" \ 74*4882a593Smuzhiyun "loadbootscript=" \ 75*4882a593Smuzhiyun "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 76*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 77*4882a593Smuzhiyun "source\0" \ 78*4882a593Smuzhiyun "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 79*4882a593Smuzhiyun "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 80*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 81*4882a593Smuzhiyun "run mmcargs; " \ 82*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 83*4882a593Smuzhiyun "if run loadfdt; then " \ 84*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 85*4882a593Smuzhiyun "else " \ 86*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 87*4882a593Smuzhiyun "bootz; " \ 88*4882a593Smuzhiyun "else " \ 89*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 90*4882a593Smuzhiyun "fi; " \ 91*4882a593Smuzhiyun "fi; " \ 92*4882a593Smuzhiyun "else " \ 93*4882a593Smuzhiyun "bootz; " \ 94*4882a593Smuzhiyun "fi;\0" \ 95*4882a593Smuzhiyun "netargs=setenv bootargs console=${console},${baudrate} " \ 96*4882a593Smuzhiyun "root=/dev/nfs " \ 97*4882a593Smuzhiyun "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 98*4882a593Smuzhiyun "netboot=echo Booting from net ...; " \ 99*4882a593Smuzhiyun "run netargs; " \ 100*4882a593Smuzhiyun "if test ${ip_dyn} = yes; then " \ 101*4882a593Smuzhiyun "setenv get_cmd dhcp; " \ 102*4882a593Smuzhiyun "else " \ 103*4882a593Smuzhiyun "setenv get_cmd tftp; " \ 104*4882a593Smuzhiyun "fi; " \ 105*4882a593Smuzhiyun "${get_cmd} ${image}; " \ 106*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 107*4882a593Smuzhiyun "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 108*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 109*4882a593Smuzhiyun "else " \ 110*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 111*4882a593Smuzhiyun "bootz; " \ 112*4882a593Smuzhiyun "else " \ 113*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 114*4882a593Smuzhiyun "fi; " \ 115*4882a593Smuzhiyun "fi; " \ 116*4882a593Smuzhiyun "else " \ 117*4882a593Smuzhiyun "bootz; " \ 118*4882a593Smuzhiyun "fi;\0" \ 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 121*4882a593Smuzhiyun "mmc dev ${mmcdev};" \ 122*4882a593Smuzhiyun "mmc dev ${mmcdev}; if mmc rescan; then " \ 123*4882a593Smuzhiyun "if run loadbootscript; then " \ 124*4882a593Smuzhiyun "run bootscript; " \ 125*4882a593Smuzhiyun "else " \ 126*4882a593Smuzhiyun "if run loadimage; then " \ 127*4882a593Smuzhiyun "run mmcboot; " \ 128*4882a593Smuzhiyun "else run netboot; " \ 129*4882a593Smuzhiyun "fi; " \ 130*4882a593Smuzhiyun "fi; " \ 131*4882a593Smuzhiyun "else run netboot; fi" 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /* Miscellaneous configurable options */ 134*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80000000 135*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 138*4882a593Smuzhiyun #define CONFIG_SYS_HZ 1000 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun /* Physical Memory Map */ 141*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 142*4882a593Smuzhiyun #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 145*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 146*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 149*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 150*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 151*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun /* environment organization */ 154*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 155*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 156*4882a593Smuzhiyun #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun #define CONFIG_ENV_SIZE SZ_8K 159*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (12 * SZ_64K) 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun #define CONFIG_IOMUX_LPSR 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun #define CONFIG_SOFT_SPI 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun #endif 168