1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2015 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef __MX6UL_14X14_EVK_CONFIG_H 9*4882a593Smuzhiyun #define __MX6UL_14X14_EVK_CONFIG_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 12*4882a593Smuzhiyun #include <linux/sizes.h> 13*4882a593Smuzhiyun #include "mx6_common.h" 14*4882a593Smuzhiyun #include <asm/mach-imx/gpio.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* SPL options */ 19*4882a593Smuzhiyun #include "imx6_spl.h" 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* Size of malloc() pool */ 24*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define CONFIG_MXC_UART 27*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART1_BASE 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* MMC Configs */ 30*4882a593Smuzhiyun #ifdef CONFIG_FSL_USDHC 31*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* NAND pin conflicts with usdhc2 */ 34*4882a593Smuzhiyun #ifdef CONFIG_NAND_MXS 35*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 1 36*4882a593Smuzhiyun #else 37*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 2 38*4882a593Smuzhiyun #endif 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #endif 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* I2C configs */ 43*4882a593Smuzhiyun #ifdef CONFIG_CMD_I2C 44*4882a593Smuzhiyun #define CONFIG_SYS_I2C 45*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 46*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 47*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 48*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED 100000 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* PMIC only for 9X9 EVK */ 51*4882a593Smuzhiyun #define CONFIG_POWER 52*4882a593Smuzhiyun #define CONFIG_POWER_I2C 53*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE3000 54*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 55*4882a593Smuzhiyun #endif 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 60*4882a593Smuzhiyun "script=boot.scr\0" \ 61*4882a593Smuzhiyun "image=zImage\0" \ 62*4882a593Smuzhiyun "console=ttymxc0\0" \ 63*4882a593Smuzhiyun "fdt_high=0xffffffff\0" \ 64*4882a593Smuzhiyun "initrd_high=0xffffffff\0" \ 65*4882a593Smuzhiyun "fdt_file=undefined\0" \ 66*4882a593Smuzhiyun "fdt_addr=0x83000000\0" \ 67*4882a593Smuzhiyun "boot_fdt=try\0" \ 68*4882a593Smuzhiyun "ip_dyn=yes\0" \ 69*4882a593Smuzhiyun "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ 70*4882a593Smuzhiyun "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 71*4882a593Smuzhiyun "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 72*4882a593Smuzhiyun "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 73*4882a593Smuzhiyun "mmcautodetect=yes\0" \ 74*4882a593Smuzhiyun "mmcargs=setenv bootargs console=${console},${baudrate} " \ 75*4882a593Smuzhiyun "root=${mmcroot}\0" \ 76*4882a593Smuzhiyun "loadbootscript=" \ 77*4882a593Smuzhiyun "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 78*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 79*4882a593Smuzhiyun "source\0" \ 80*4882a593Smuzhiyun "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 81*4882a593Smuzhiyun "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 82*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 83*4882a593Smuzhiyun "run mmcargs; " \ 84*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 85*4882a593Smuzhiyun "if run loadfdt; then " \ 86*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 87*4882a593Smuzhiyun "else " \ 88*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 89*4882a593Smuzhiyun "bootz; " \ 90*4882a593Smuzhiyun "else " \ 91*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 92*4882a593Smuzhiyun "fi; " \ 93*4882a593Smuzhiyun "fi; " \ 94*4882a593Smuzhiyun "else " \ 95*4882a593Smuzhiyun "bootz; " \ 96*4882a593Smuzhiyun "fi;\0" \ 97*4882a593Smuzhiyun "netargs=setenv bootargs console=${console},${baudrate} " \ 98*4882a593Smuzhiyun "root=/dev/nfs " \ 99*4882a593Smuzhiyun "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 100*4882a593Smuzhiyun "netboot=echo Booting from net ...; " \ 101*4882a593Smuzhiyun "run netargs; " \ 102*4882a593Smuzhiyun "if test ${ip_dyn} = yes; then " \ 103*4882a593Smuzhiyun "setenv get_cmd dhcp; " \ 104*4882a593Smuzhiyun "else " \ 105*4882a593Smuzhiyun "setenv get_cmd tftp; " \ 106*4882a593Smuzhiyun "fi; " \ 107*4882a593Smuzhiyun "${get_cmd} ${image}; " \ 108*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 109*4882a593Smuzhiyun "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 110*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 111*4882a593Smuzhiyun "else " \ 112*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 113*4882a593Smuzhiyun "bootz; " \ 114*4882a593Smuzhiyun "else " \ 115*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 116*4882a593Smuzhiyun "fi; " \ 117*4882a593Smuzhiyun "fi; " \ 118*4882a593Smuzhiyun "else " \ 119*4882a593Smuzhiyun "bootz; " \ 120*4882a593Smuzhiyun "fi;\0" \ 121*4882a593Smuzhiyun "findfdt="\ 122*4882a593Smuzhiyun "if test $fdt_file = undefined; then " \ 123*4882a593Smuzhiyun "if test $board_name = EVK && test $board_rev = 9X9; then " \ 124*4882a593Smuzhiyun "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \ 125*4882a593Smuzhiyun "if test $board_name = EVK && test $board_rev = 14X14; then " \ 126*4882a593Smuzhiyun "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \ 127*4882a593Smuzhiyun "if test $fdt_file = undefined; then " \ 128*4882a593Smuzhiyun "echo WARNING: Could not determine dtb to use; fi; " \ 129*4882a593Smuzhiyun "fi;\0" \ 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 132*4882a593Smuzhiyun "run findfdt;" \ 133*4882a593Smuzhiyun "mmc dev ${mmcdev};" \ 134*4882a593Smuzhiyun "mmc dev ${mmcdev}; if mmc rescan; then " \ 135*4882a593Smuzhiyun "if run loadbootscript; then " \ 136*4882a593Smuzhiyun "run bootscript; " \ 137*4882a593Smuzhiyun "else " \ 138*4882a593Smuzhiyun "if run loadimage; then " \ 139*4882a593Smuzhiyun "run mmcboot; " \ 140*4882a593Smuzhiyun "else run netboot; " \ 141*4882a593Smuzhiyun "fi; " \ 142*4882a593Smuzhiyun "fi; " \ 143*4882a593Smuzhiyun "else run netboot; fi" 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun /* Miscellaneous configurable options */ 146*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80000000 147*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 150*4882a593Smuzhiyun #define CONFIG_SYS_HZ 1000 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun /* Physical Memory Map */ 155*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 156*4882a593Smuzhiyun #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 159*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 160*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 163*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 164*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 165*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun /* environment organization */ 168*4882a593Smuzhiyun #define CONFIG_ENV_SIZE SZ_8K 169*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (8 * SZ_64K) 170*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ 171*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 172*4882a593Smuzhiyun #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun #ifndef CONFIG_SYS_DCACHE_OFF 175*4882a593Smuzhiyun #endif 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun #ifdef CONFIG_FSL_QSPI 178*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_BUS 0 179*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_CS 0 180*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED 40000000 181*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 182*4882a593Smuzhiyun #define FSL_QSPI_FLASH_NUM 1 183*4882a593Smuzhiyun #define FSL_QSPI_FLASH_SIZE SZ_32M 184*4882a593Smuzhiyun #endif 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun /* USB Configs */ 187*4882a593Smuzhiyun #ifdef CONFIG_CMD_USB 188*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 189*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 190*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS 0 191*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 192*4882a593Smuzhiyun #endif 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun #ifdef CONFIG_CMD_NET 195*4882a593Smuzhiyun #define CONFIG_FEC_MXC 196*4882a593Smuzhiyun #define CONFIG_MII 197*4882a593Smuzhiyun #define CONFIG_FEC_ENET_DEV 1 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun #if (CONFIG_FEC_ENET_DEV == 0) 200*4882a593Smuzhiyun #define IMX_FEC_BASE ENET_BASE_ADDR 201*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0x2 202*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 203*4882a593Smuzhiyun #elif (CONFIG_FEC_ENET_DEV == 1) 204*4882a593Smuzhiyun #define IMX_FEC_BASE ENET2_BASE_ADDR 205*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0x1 206*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 207*4882a593Smuzhiyun #endif 208*4882a593Smuzhiyun #define CONFIG_ETHPRIME "FEC" 209*4882a593Smuzhiyun #endif 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD 214*4882a593Smuzhiyun #ifdef CONFIG_VIDEO 215*4882a593Smuzhiyun #define CONFIG_VIDEO_MXS 216*4882a593Smuzhiyun #define CONFIG_VIDEO_LOGO 217*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN 218*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN_ALIGN 219*4882a593Smuzhiyun #define CONFIG_BMP_16BPP 220*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_RLE8 221*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_LOGO 222*4882a593Smuzhiyun #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR 223*4882a593Smuzhiyun #endif 224*4882a593Smuzhiyun #endif 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun #endif 227