1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2012 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the Freescale i.MX6Q SabreAuto board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __MX6SABREAUTO_CONFIG_H 10*4882a593Smuzhiyun #define __MX6SABREAUTO_CONFIG_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifdef CONFIG_SPL 13*4882a593Smuzhiyun #include "imx6_spl.h" 14*4882a593Smuzhiyun #endif 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define CONFIG_MACH_TYPE 3529 17*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART4_BASE 18*4882a593Smuzhiyun #define CONSOLE_DEV "ttymxc3" 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* USB Configs */ 21*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 22*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 23*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 24*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS 0 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define CONFIG_PCA953X 27*4882a593Smuzhiyun #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #include "mx6sabre_common.h" 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* Falcon Mode */ 32*4882a593Smuzhiyun #ifdef CONFIG_SPL_OS_BOOT 33*4882a593Smuzhiyun #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 34*4882a593Smuzhiyun #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 35*4882a593Smuzhiyun #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* Falcon Mode - MMC support: args@1MB kernel@2MB */ 38*4882a593Smuzhiyun #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ 39*4882a593Smuzhiyun #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) 40*4882a593Smuzhiyun #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ 41*4882a593Smuzhiyun #endif 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #ifdef CONFIG_MTD_NOR_FLASH 44*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR 45*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_SECT_SIZE (128 * 1024) 46*4882a593Smuzhiyun #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 47*4882a593Smuzhiyun #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */ 48*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 49*4882a593Smuzhiyun #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ 50*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ 51*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_EMPTY_INFO 52*4882a593Smuzhiyun #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 53*4882a593Smuzhiyun #endif 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 2 56*4882a593Smuzhiyun #if defined(CONFIG_ENV_IS_IN_MMC) 57*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 58*4882a593Smuzhiyun #endif 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /* I2C Configs */ 61*4882a593Smuzhiyun #define CONFIG_SYS_I2C 62*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 63*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 64*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 65*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 66*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED 100000 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* NAND stuff */ 69*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 70*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE 0x40000000 71*4882a593Smuzhiyun #define CONFIG_SYS_NAND_5_ADDR_CYCLE 72*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* DMA stuff, needed for GPMI/MXS NAND support */ 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* PMIC */ 77*4882a593Smuzhiyun #define CONFIG_POWER 78*4882a593Smuzhiyun #define CONFIG_POWER_I2C 79*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE100 80*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun #endif /* __MX6SABREAUTO_CONFIG_H */ 83