1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __MX6_COMMON_H 8*4882a593Smuzhiyun #define __MX6_COMMON_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef CONFIG_MX6UL 11*4882a593Smuzhiyun #ifndef CONFIG_SYS_L2CACHE_OFF 12*4882a593Smuzhiyun #define CONFIG_SYS_L2_PL310 13*4882a593Smuzhiyun #define CONFIG_SYS_PL310_BASE L2_PL310_BASE 14*4882a593Smuzhiyun #endif 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define CONFIG_MP 17*4882a593Smuzhiyun #endif 18*4882a593Smuzhiyun #define CONFIG_BOARD_POSTCLK_INIT 19*4882a593Smuzhiyun #define CONFIG_MXC_GPT_HCLK 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define CONFIG_SYS_BOOTM_LEN 0x1000000 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #include <linux/sizes.h> 24*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 25*4882a593Smuzhiyun #include <asm/mach-imx/gpio.h> 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #ifndef CONFIG_MX6 28*4882a593Smuzhiyun #define CONFIG_MX6 29*4882a593Smuzhiyun #endif 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define CONFIG_SYS_FSL_CLK 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* ATAGs */ 34*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG 35*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS 36*4882a593Smuzhiyun #define CONFIG_INITRD_TAG 37*4882a593Smuzhiyun #define CONFIG_REVISION_TAG 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* Boot options */ 40*4882a593Smuzhiyun #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \ 41*4882a593Smuzhiyun defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL)) 42*4882a593Smuzhiyun #define CONFIG_LOADADDR 0x82000000 43*4882a593Smuzhiyun #ifndef CONFIG_SYS_TEXT_BASE 44*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x87800000 45*4882a593Smuzhiyun #endif 46*4882a593Smuzhiyun #else 47*4882a593Smuzhiyun #define CONFIG_LOADADDR 0x12000000 48*4882a593Smuzhiyun #ifndef CONFIG_SYS_TEXT_BASE 49*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x17800000 50*4882a593Smuzhiyun #endif 51*4882a593Smuzhiyun #endif 52*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* allow to overwrite serial and ethaddr */ 55*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE 56*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 1 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* Filesystems and image support */ 59*4882a593Smuzhiyun #define CONFIG_SUPPORT_RAW_INITRD 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* Miscellaneous configurable options */ 62*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP 63*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 64*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE 65*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 512 66*4882a593Smuzhiyun #define CONFIG_SYS_MAXARGS 32 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #ifndef CONFIG_SYS_DCACHE_OFF 69*4882a593Smuzhiyun #endif 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* GPIO */ 72*4882a593Smuzhiyun #define CONFIG_MXC_GPIO 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* MMC */ 75*4882a593Smuzhiyun #define CONFIG_BOUNCE_BUFFER 76*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC 77*4882a593Smuzhiyun #define CONFIG_FSL_USDHC 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* Fuses */ 80*4882a593Smuzhiyun #define CONFIG_MXC_OCOTP 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* Secure boot (HAB) support */ 83*4882a593Smuzhiyun #ifdef CONFIG_SECURE_BOOT 84*4882a593Smuzhiyun #define CONFIG_CSF_SIZE 0x2000 85*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD 86*4882a593Smuzhiyun #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 87*4882a593Smuzhiyun #endif 88*4882a593Smuzhiyun #endif 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #endif 91