1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2011 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the MX53SMD Freescale board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __CONFIG_H 10*4882a593Smuzhiyun #define __CONFIG_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 17*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS 18*4882a593Smuzhiyun #define CONFIG_INITRD_TAG 19*4882a593Smuzhiyun #define CONFIG_REVISION_TAG 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define CONFIG_SYS_FSL_CLK 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* Size of malloc() pool */ 24*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define CONFIG_MXC_GPIO 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define CONFIG_MXC_UART 29*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART1_BASE 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* I2C Configs */ 32*4882a593Smuzhiyun #define CONFIG_SYS_I2C 33*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 34*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 35*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 36*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* MMC Configs */ 39*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC 40*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR 0 41*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_NUM 1 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /* Eth Configs */ 44*4882a593Smuzhiyun #define CONFIG_HAS_ETH1 45*4882a593Smuzhiyun #define CONFIG_MII 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define CONFIG_FEC_MXC 48*4882a593Smuzhiyun #define IMX_FEC_BASE FEC_BASE_ADDR 49*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0x1F 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* allow to overwrite serial and ethaddr */ 52*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE 53*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 1 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* Command definition */ 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define CONFIG_ETHPRIME "FEC0" 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 60*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x77800000 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 63*4882a593Smuzhiyun "script=boot.scr\0" \ 64*4882a593Smuzhiyun "uimage=uImage\0" \ 65*4882a593Smuzhiyun "mmcdev=0\0" \ 66*4882a593Smuzhiyun "mmcpart=2\0" \ 67*4882a593Smuzhiyun "mmcroot=/dev/mmcblk0p3 rw\0" \ 68*4882a593Smuzhiyun "mmcrootfstype=ext3 rootwait\0" \ 69*4882a593Smuzhiyun "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 70*4882a593Smuzhiyun "root=${mmcroot} " \ 71*4882a593Smuzhiyun "rootfstype=${mmcrootfstype}\0" \ 72*4882a593Smuzhiyun "loadbootscript=" \ 73*4882a593Smuzhiyun "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 74*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 75*4882a593Smuzhiyun "source\0" \ 76*4882a593Smuzhiyun "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 77*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 78*4882a593Smuzhiyun "run mmcargs; " \ 79*4882a593Smuzhiyun "bootm\0" \ 80*4882a593Smuzhiyun "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 81*4882a593Smuzhiyun "root=/dev/nfs " \ 82*4882a593Smuzhiyun "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 83*4882a593Smuzhiyun "netboot=echo Booting from net ...; " \ 84*4882a593Smuzhiyun "run netargs; " \ 85*4882a593Smuzhiyun "dhcp ${uimage}; bootm\0" \ 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 88*4882a593Smuzhiyun "mmc dev ${mmcdev}; if mmc rescan; then " \ 89*4882a593Smuzhiyun "if run loadbootscript; then " \ 90*4882a593Smuzhiyun "run bootscript; " \ 91*4882a593Smuzhiyun "else " \ 92*4882a593Smuzhiyun "if run loaduimage; then " \ 93*4882a593Smuzhiyun "run mmcboot; " \ 94*4882a593Smuzhiyun "else run netboot; " \ 95*4882a593Smuzhiyun "fi; " \ 96*4882a593Smuzhiyun "fi; " \ 97*4882a593Smuzhiyun "else run netboot; fi" 98*4882a593Smuzhiyun #define CONFIG_ARP_TIMEOUT 200UL 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /* Miscellaneous configurable options */ 101*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP /* undef to save memory */ 102*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x70000000 105*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x70010000 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* Physical Memory Map */ 112*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 2 113*4882a593Smuzhiyun #define PHYS_SDRAM_1 CSD0_BASE_ADDR 114*4882a593Smuzhiyun #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 115*4882a593Smuzhiyun #define PHYS_SDRAM_2 CSD1_BASE_ADDR 116*4882a593Smuzhiyun #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024) 117*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE) 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 120*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 121*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 124*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 125*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 126*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun /* environment organization */ 129*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 130*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (8 * 1024) 131*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun #endif /* __CONFIG_H */ 134