xref: /OK3568_Linux_fs/u-boot/include/configs/mx53cx9020.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2015  Beckhoff Automation GmbH & Co. KG
3*4882a593Smuzhiyun  * Patrick Bruenn <p.bruenn@beckhoff.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Configuration settings for Beckhoff CX9020.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on Freescale's Linux i.MX mx53loco.h file:
8*4882a593Smuzhiyun  * Copyright (C) 2010-2011 Freescale Semiconductor.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #ifndef __CONFIG_H
14*4882a593Smuzhiyun #define __CONFIG_H
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <asm/arch/imx-regs.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG
19*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS
20*4882a593Smuzhiyun #define CONFIG_INITRD_TAG
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define CONFIG_SYS_FSL_CLK
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* Size of malloc() pool */
25*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define CONFIG_MXC_GPIO
28*4882a593Smuzhiyun #define CONFIG_REVISION_TAG
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART2_BASE
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define CONFIG_FPGA_COUNT 1
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* MMC Configs */
35*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC
36*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR	0
37*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_NUM	2
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /* bootz: zImage/initrd.img support */
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* Eth Configs */
42*4882a593Smuzhiyun #define CONFIG_MII
43*4882a593Smuzhiyun #define IMX_FEC_BASE	FEC_BASE_ADDR
44*4882a593Smuzhiyun #define CONFIG_ETHPRIME		"FEC0"
45*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR	0x1F
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /* USB Configs */
48*4882a593Smuzhiyun #define CONFIG_USB_EHCI_MX5
49*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORT	1
50*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
51*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS	0
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun /* allow to overwrite serial and ethaddr */
54*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE
55*4882a593Smuzhiyun #define CONFIG_CONS_INDEX		1
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun /* Command definition */
58*4882a593Smuzhiyun #define CONFIG_SUPPORT_RAW_INITRD
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define CONFIG_LOADADDR		0x70010000	/* loadaddr env var */
61*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE    0x77800000
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
64*4882a593Smuzhiyun 	"fdt_addr_r=0x71ff0000\0" \
65*4882a593Smuzhiyun 	"pxefile_addr_r=0x73000000\0" \
66*4882a593Smuzhiyun 	"ramdisk_addr_r=0x72000000\0" \
67*4882a593Smuzhiyun 	"console=ttymxc1,115200\0" \
68*4882a593Smuzhiyun 	"uenv=/boot/uEnv.txt\0" \
69*4882a593Smuzhiyun 	"optargs=\0" \
70*4882a593Smuzhiyun 	"cmdline=\0" \
71*4882a593Smuzhiyun 	"mmcdev=0\0" \
72*4882a593Smuzhiyun 	"mmcpart=1\0" \
73*4882a593Smuzhiyun 	"mmcrootfstype=ext4 rootwait fixrtc\0" \
74*4882a593Smuzhiyun 	"mmcargs=setenv bootargs console=${console} " \
75*4882a593Smuzhiyun 		"${optargs} " \
76*4882a593Smuzhiyun 		"root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \
77*4882a593Smuzhiyun 		"rootfstype=${mmcrootfstype} " \
78*4882a593Smuzhiyun 		"${cmdline}\0" \
79*4882a593Smuzhiyun 	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
80*4882a593Smuzhiyun 	"loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \
81*4882a593Smuzhiyun 	"loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \
82*4882a593Smuzhiyun 		"setenv rdsize ${filesize}\0" \
83*4882a593Smuzhiyun 	"loadfdt=echo loading ${fdt_path} ...;" \
84*4882a593Smuzhiyun 		"load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \
85*4882a593Smuzhiyun 	"mmcboot=mmc dev ${mmcdev}; " \
86*4882a593Smuzhiyun 		"if mmc rescan; then " \
87*4882a593Smuzhiyun 			"echo SD/MMC found on device ${mmcdev};" \
88*4882a593Smuzhiyun 			"echo Checking for: ${uenv} ...;" \
89*4882a593Smuzhiyun 			"setenv bootpart ${mmcdev}:${mmcpart};" \
90*4882a593Smuzhiyun 			"if test -e mmc ${bootpart} ${uenv}; then " \
91*4882a593Smuzhiyun 				"load mmc ${bootpart} ${loadaddr} ${uenv};" \
92*4882a593Smuzhiyun 				"env import -t ${loadaddr} ${filesize};" \
93*4882a593Smuzhiyun 				"echo Loaded environment from ${uenv};" \
94*4882a593Smuzhiyun 				"if test -n ${dtb}; then " \
95*4882a593Smuzhiyun 					"setenv fdt_file ${dtb};" \
96*4882a593Smuzhiyun 					"echo Using: dtb=${fdt_file} ...;" \
97*4882a593Smuzhiyun 				"fi;" \
98*4882a593Smuzhiyun 				"echo Checking for uname_r in ${uenv}...;" \
99*4882a593Smuzhiyun 				"if test -n ${uname_r}; then " \
100*4882a593Smuzhiyun 					"echo Running uname_boot ...;" \
101*4882a593Smuzhiyun 					"run uname_boot;" \
102*4882a593Smuzhiyun 				"fi;" \
103*4882a593Smuzhiyun 			"fi;" \
104*4882a593Smuzhiyun 		"fi;\0" \
105*4882a593Smuzhiyun 	"uname_boot="\
106*4882a593Smuzhiyun 		"setenv bootdir /boot; " \
107*4882a593Smuzhiyun 		"setenv bootfile vmlinuz-${uname_r}; " \
108*4882a593Smuzhiyun 		"setenv ccatfile /boot/ccat.rbf; " \
109*4882a593Smuzhiyun 		"echo loading CCAT firmware from ${ccatfile}; " \
110*4882a593Smuzhiyun 		"load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \
111*4882a593Smuzhiyun 		"fpga load 0 ${loadaddr} ${filesize}; " \
112*4882a593Smuzhiyun 		"if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \
113*4882a593Smuzhiyun 			"echo loading ${bootdir}/${bootfile} ...; " \
114*4882a593Smuzhiyun 			"run loadimage;" \
115*4882a593Smuzhiyun 			"setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \
116*4882a593Smuzhiyun 			"if test -e mmc ${bootpart} ${fdt_path}; then " \
117*4882a593Smuzhiyun 				"run loadfdt;" \
118*4882a593Smuzhiyun 			"else " \
119*4882a593Smuzhiyun 				"echo; echo unable to find ${fdt_file} ...;" \
120*4882a593Smuzhiyun 				"echo booting legacy ...;"\
121*4882a593Smuzhiyun 				"run mmcargs;" \
122*4882a593Smuzhiyun 				"echo debug: [${bootargs}] ... ;" \
123*4882a593Smuzhiyun 				"echo debug: [bootz ${loadaddr}] ... ;" \
124*4882a593Smuzhiyun 				"bootz ${loadaddr}; " \
125*4882a593Smuzhiyun 			"fi;" \
126*4882a593Smuzhiyun 			"run mmcargs;" \
127*4882a593Smuzhiyun 			"echo debug: [${bootargs}] ... ;" \
128*4882a593Smuzhiyun 			"echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \
129*4882a593Smuzhiyun 			"bootz ${loadaddr} - ${fdt_addr_r}; " \
130*4882a593Smuzhiyun 		"else " \
131*4882a593Smuzhiyun 			"echo loading from dhcp ...; " \
132*4882a593Smuzhiyun 			"run loadpxe; " \
133*4882a593Smuzhiyun 		"fi;\0"
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \
136*4882a593Smuzhiyun 	"run mmcboot;"
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun #define CONFIG_ARP_TIMEOUT	200UL
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun /* Miscellaneous configurable options */
141*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP	/* undef to save memory */
142*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE
143*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START       0x70000000
146*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END         0x70010000
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun /* Physical Memory Map */
153*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS	2
154*4882a593Smuzhiyun #define PHYS_SDRAM_1			CSD0_BASE_ADDR
155*4882a593Smuzhiyun #define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
156*4882a593Smuzhiyun #define PHYS_SDRAM_2			CSD1_BASE_ADDR
157*4882a593Smuzhiyun #define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
158*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE			(gd->ram_size)
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
161*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
162*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \
165*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
166*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \
167*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun /* environment organization */
170*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
171*4882a593Smuzhiyun #define CONFIG_ENV_SIZE        (8 * 1024)
172*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun /* Framebuffer and LCD */
175*4882a593Smuzhiyun #define CONFIG_PREBOOT
176*4882a593Smuzhiyun #define CONFIG_VIDEO_IPUV3
177*4882a593Smuzhiyun #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
178*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_RLE8
179*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN
180*4882a593Smuzhiyun #define CONFIG_BMP_16BPP
181*4882a593Smuzhiyun #define CONFIG_VIDEO_LOGO
182*4882a593Smuzhiyun #define CONFIG_IPUV3_CLK	200000000
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun #endif /* __CONFIG_H */
185