xref: /OK3568_Linux_fs/u-boot/include/configs/mx53ard.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2011 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Configuration settings for the MX53ARD Freescale board.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __CONFIG_H
10*4882a593Smuzhiyun #define __CONFIG_H
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define CONFIG_MACH_TYPE	MACH_TYPE_MX53_ARD
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <asm/arch/imx-regs.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
17*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS
18*4882a593Smuzhiyun #define CONFIG_INITRD_TAG
19*4882a593Smuzhiyun #define CONFIG_REVISION_TAG
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define CONFIG_SYS_FSL_CLK
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* Size of malloc() pool */
24*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define CONFIG_MXC_GPIO
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE	1
29*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR_AXI
30*4882a593Smuzhiyun #define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR_AXI
31*4882a593Smuzhiyun #define CONFIG_MXC_NAND_IP_REGS_BASE	NFC_BASE_ADDR
32*4882a593Smuzhiyun #define CONFIG_SYS_NAND_LARGEPAGE
33*4882a593Smuzhiyun #define CONFIG_MXC_NAND_HWECC
34*4882a593Smuzhiyun #define CONFIG_SYS_NAND_USE_FLASH_BBT
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define CONFIG_MXC_UART
37*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE	UART1_BASE
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun /* I2C Configs */
40*4882a593Smuzhiyun #define CONFIG_SYS_I2C
41*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC
42*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
43*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
44*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /* MMC Configs */
47*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC
48*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR	0
49*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_NUM	2
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun /* Eth Configs */
52*4882a593Smuzhiyun #define CONFIG_HAS_ETH1
53*4882a593Smuzhiyun #define CONFIG_MII
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /* allow to overwrite serial and ethaddr */
56*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE
57*4882a593Smuzhiyun #define CONFIG_CONS_INDEX		1
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* Command definition */
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #define CONFIG_ETHPRIME		"smc911x"
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /*Support LAN9217*/
64*4882a593Smuzhiyun #define CONFIG_SMC911X
65*4882a593Smuzhiyun #define CONFIG_SMC911X_16_BIT
66*4882a593Smuzhiyun #define CONFIG_SMC911X_BASE CS1_BASE_ADDR
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define CONFIG_LOADADDR		0x72000000	/* loadaddr env var */
69*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE    0x77800000
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
72*4882a593Smuzhiyun 	"script=boot.scr\0" \
73*4882a593Smuzhiyun 	"uimage=zImage\0" \
74*4882a593Smuzhiyun 	"console=ttymxc0\0" \
75*4882a593Smuzhiyun 	"fdt_high=0xffffffff\0" \
76*4882a593Smuzhiyun 	"initrd_high=0xffffffff\0" \
77*4882a593Smuzhiyun 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
78*4882a593Smuzhiyun 	"fdt_addr=0x78000000\0" \
79*4882a593Smuzhiyun 	"boot_fdt=try\0" \
80*4882a593Smuzhiyun 	"ip_dyn=yes\0" \
81*4882a593Smuzhiyun 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
82*4882a593Smuzhiyun 	"mmcpart=1\0" \
83*4882a593Smuzhiyun 	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
84*4882a593Smuzhiyun 	"update_sd_firmware_filename=u-boot.imx\0" \
85*4882a593Smuzhiyun 	"update_sd_firmware=" \
86*4882a593Smuzhiyun 		"if test ${ip_dyn} = yes; then " \
87*4882a593Smuzhiyun 			"setenv get_cmd dhcp; " \
88*4882a593Smuzhiyun 		"else " \
89*4882a593Smuzhiyun 			"setenv get_cmd tftp; " \
90*4882a593Smuzhiyun 		"fi; " \
91*4882a593Smuzhiyun 		"if mmc dev ${mmcdev}; then "	\
92*4882a593Smuzhiyun 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
93*4882a593Smuzhiyun 				"setexpr fw_sz ${filesize} / 0x200; " \
94*4882a593Smuzhiyun 				"setexpr fw_sz ${fw_sz} + 1; "	\
95*4882a593Smuzhiyun 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
96*4882a593Smuzhiyun 			"fi; "	\
97*4882a593Smuzhiyun 		"fi\0" \
98*4882a593Smuzhiyun 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
99*4882a593Smuzhiyun 		"root=${mmcroot}\0" \
100*4882a593Smuzhiyun 	"loadbootscript=" \
101*4882a593Smuzhiyun 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
102*4882a593Smuzhiyun 	"bootscript=echo Running bootscript from mmc ...; " \
103*4882a593Smuzhiyun 		"source\0" \
104*4882a593Smuzhiyun 	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
105*4882a593Smuzhiyun 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
106*4882a593Smuzhiyun 	"mmcboot=echo Booting from mmc ...; " \
107*4882a593Smuzhiyun 		"run mmcargs; " \
108*4882a593Smuzhiyun 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
109*4882a593Smuzhiyun 			"if run loadfdt; then " \
110*4882a593Smuzhiyun 				"bootz ${loadaddr} - ${fdt_addr}; " \
111*4882a593Smuzhiyun 			"else " \
112*4882a593Smuzhiyun 				"if test ${boot_fdt} = try; then " \
113*4882a593Smuzhiyun 					"bootz; " \
114*4882a593Smuzhiyun 				"else " \
115*4882a593Smuzhiyun 					"echo WARN: Cannot load the DT; " \
116*4882a593Smuzhiyun 				"fi; " \
117*4882a593Smuzhiyun 			"fi; " \
118*4882a593Smuzhiyun 		"else " \
119*4882a593Smuzhiyun 			"bootz; " \
120*4882a593Smuzhiyun 		"fi;\0" \
121*4882a593Smuzhiyun 	"netargs=setenv bootargs console=${console},${baudrate} " \
122*4882a593Smuzhiyun 		"root=/dev/nfs " \
123*4882a593Smuzhiyun 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
124*4882a593Smuzhiyun 		"netboot=echo Booting from net ...; " \
125*4882a593Smuzhiyun 		"run netargs; " \
126*4882a593Smuzhiyun 		"if test ${ip_dyn} = yes; then " \
127*4882a593Smuzhiyun 			"setenv get_cmd dhcp; " \
128*4882a593Smuzhiyun 		"else " \
129*4882a593Smuzhiyun 			"setenv get_cmd tftp; " \
130*4882a593Smuzhiyun 		"fi; " \
131*4882a593Smuzhiyun 		"${get_cmd} ${uimage}; " \
132*4882a593Smuzhiyun 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
133*4882a593Smuzhiyun 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
134*4882a593Smuzhiyun 				"bootz ${loadaddr} - ${fdt_addr}; " \
135*4882a593Smuzhiyun 			"else " \
136*4882a593Smuzhiyun 				"if test ${boot_fdt} = try; then " \
137*4882a593Smuzhiyun 					"bootz; " \
138*4882a593Smuzhiyun 				"else " \
139*4882a593Smuzhiyun 					"echo WARN: Cannot load the DT; " \
140*4882a593Smuzhiyun 				"fi; " \
141*4882a593Smuzhiyun 			"fi; " \
142*4882a593Smuzhiyun 		"else " \
143*4882a593Smuzhiyun 			"bootz; " \
144*4882a593Smuzhiyun 		"fi;\0"
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \
147*4882a593Smuzhiyun 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
148*4882a593Smuzhiyun 		   "if run loadbootscript; then " \
149*4882a593Smuzhiyun 			   "run bootscript; " \
150*4882a593Smuzhiyun 		   "else " \
151*4882a593Smuzhiyun 			   "if run loaduimage; then " \
152*4882a593Smuzhiyun 				   "run mmcboot; " \
153*4882a593Smuzhiyun 			   "else run netboot; " \
154*4882a593Smuzhiyun 			   "fi; " \
155*4882a593Smuzhiyun 		   "fi; " \
156*4882a593Smuzhiyun 	   "else run netboot; fi"
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun #define CONFIG_ARP_TIMEOUT	200UL
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun /* Miscellaneous configurable options */
161*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP		/* undef to save memory */
162*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START       0x70000000
165*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END         0x70010000
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun /* Physical Memory Map */
172*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS	2
173*4882a593Smuzhiyun #define PHYS_SDRAM_1		CSD0_BASE_ADDR
174*4882a593Smuzhiyun #define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
175*4882a593Smuzhiyun #define PHYS_SDRAM_2		CSD1_BASE_ADDR
176*4882a593Smuzhiyun #define PHYS_SDRAM_2_SIZE	(512 * 1024 * 1024)
177*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE         (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
180*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
181*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \
184*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
185*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \
186*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun /* environment organization */
189*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
190*4882a593Smuzhiyun #define CONFIG_ENV_SIZE        (8 * 1024)
191*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV	0
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun #define MX53ARD_CS1GCR1		(CSEN | DSZ(2))
194*4882a593Smuzhiyun #define MX53ARD_CS1RCR1		(RCSN(2) | OEN (1) | RWSC(22))
195*4882a593Smuzhiyun #define MX53ARD_CS1RCR2		RBEN(2)
196*4882a593Smuzhiyun #define MX53ARD_CS1WCR1		(WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun #endif				/* __CONFIG_H */
199