1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * (C) Copyright 2009 Freescale Semiconductor, Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Configuration settings for the MX51EVK Board 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __CONFIG_H 12*4882a593Smuzhiyun #define __CONFIG_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* High Level Configuration Options */ 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define CONFIG_SYS_FSL_CLK 17*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x97800000 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 22*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS 23*4882a593Smuzhiyun #define CONFIG_INITRD_TAG 24*4882a593Smuzhiyun #define CONFIG_REVISION_TAG 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE 27*4882a593Smuzhiyun /* 28*4882a593Smuzhiyun * Size of malloc() pool 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* 33*4882a593Smuzhiyun * Hardware drivers 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun #define CONFIG_FSL_IIM 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define CONFIG_MXC_UART 38*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART1_BASE 39*4882a593Smuzhiyun #define CONFIG_MXC_GPIO 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* 42*4882a593Smuzhiyun * SPI Configs 43*4882a593Smuzhiyun * */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define CONFIG_MXC_SPI 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* PMIC Controller */ 48*4882a593Smuzhiyun #define CONFIG_POWER 49*4882a593Smuzhiyun #define CONFIG_POWER_SPI 50*4882a593Smuzhiyun #define CONFIG_POWER_FSL 51*4882a593Smuzhiyun #define CONFIG_FSL_PMIC_BUS 0 52*4882a593Smuzhiyun #define CONFIG_FSL_PMIC_CS 0 53*4882a593Smuzhiyun #define CONFIG_FSL_PMIC_CLK 2500000 54*4882a593Smuzhiyun #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 55*4882a593Smuzhiyun #define CONFIG_FSL_PMIC_BITLEN 32 56*4882a593Smuzhiyun #define CONFIG_RTC_MC13XXX 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* 59*4882a593Smuzhiyun * MMC Configs 60*4882a593Smuzhiyun * */ 61*4882a593Smuzhiyun #define CONFIG_FSL_ESDHC 62*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR 63*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_NUM 2 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* 66*4882a593Smuzhiyun * Eth Configs 67*4882a593Smuzhiyun */ 68*4882a593Smuzhiyun #define CONFIG_MII 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define CONFIG_FEC_MXC 71*4882a593Smuzhiyun #define IMX_FEC_BASE FEC_BASE_ADDR 72*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0x1F 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* USB Configs */ 75*4882a593Smuzhiyun #define CONFIG_USB_EHCI_MX5 76*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORT 1 77*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI 78*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun /* Framebuffer and LCD */ 81*4882a593Smuzhiyun #define CONFIG_PREBOOT 82*4882a593Smuzhiyun #define CONFIG_VIDEO_IPUV3 83*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_RLE8 84*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN 85*4882a593Smuzhiyun #define CONFIG_BMP_16BPP 86*4882a593Smuzhiyun #define CONFIG_VIDEO_LOGO 87*4882a593Smuzhiyun #define CONFIG_IPUV3_CLK 133000000 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* allow to overwrite serial and ethaddr */ 90*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE 91*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 1 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define CONFIG_ETHPRIME "FEC0" 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */ 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 98*4882a593Smuzhiyun "script=boot.scr\0" \ 99*4882a593Smuzhiyun "image=zImage\0" \ 100*4882a593Smuzhiyun "fdt_file=imx51-babbage.dtb\0" \ 101*4882a593Smuzhiyun "fdt_addr=0x91000000\0" \ 102*4882a593Smuzhiyun "boot_fdt=try\0" \ 103*4882a593Smuzhiyun "ip_dyn=yes\0" \ 104*4882a593Smuzhiyun "mmcdev=0\0" \ 105*4882a593Smuzhiyun "mmcpart=1\0" \ 106*4882a593Smuzhiyun "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 107*4882a593Smuzhiyun "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 108*4882a593Smuzhiyun "root=${mmcroot}\0" \ 109*4882a593Smuzhiyun "loadbootscript=" \ 110*4882a593Smuzhiyun "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 111*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 112*4882a593Smuzhiyun "source\0" \ 113*4882a593Smuzhiyun "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 114*4882a593Smuzhiyun "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 115*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 116*4882a593Smuzhiyun "run mmcargs; " \ 117*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 118*4882a593Smuzhiyun "if run loadfdt; then " \ 119*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 120*4882a593Smuzhiyun "else " \ 121*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 122*4882a593Smuzhiyun "bootz; " \ 123*4882a593Smuzhiyun "else " \ 124*4882a593Smuzhiyun "echo WARN: Cannot load the DT; " \ 125*4882a593Smuzhiyun "fi; " \ 126*4882a593Smuzhiyun "fi; " \ 127*4882a593Smuzhiyun "else " \ 128*4882a593Smuzhiyun "bootz; " \ 129*4882a593Smuzhiyun "fi;\0" \ 130*4882a593Smuzhiyun "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 131*4882a593Smuzhiyun "root=/dev/nfs " \ 132*4882a593Smuzhiyun "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 133*4882a593Smuzhiyun "netboot=echo Booting from net ...; " \ 134*4882a593Smuzhiyun "run netargs; " \ 135*4882a593Smuzhiyun "if test ${ip_dyn} = yes; then " \ 136*4882a593Smuzhiyun "setenv get_cmd dhcp; " \ 137*4882a593Smuzhiyun "else " \ 138*4882a593Smuzhiyun "setenv get_cmd tftp; " \ 139*4882a593Smuzhiyun "fi; " \ 140*4882a593Smuzhiyun "${get_cmd} ${image}; " \ 141*4882a593Smuzhiyun "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 142*4882a593Smuzhiyun "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 143*4882a593Smuzhiyun "bootz ${loadaddr} - ${fdt_addr}; " \ 144*4882a593Smuzhiyun "else " \ 145*4882a593Smuzhiyun "if test ${boot_fdt} = try; then " \ 146*4882a593Smuzhiyun "bootz; " \ 147*4882a593Smuzhiyun "else " \ 148*4882a593Smuzhiyun "echo ERROR: Cannot load the DT; " \ 149*4882a593Smuzhiyun "exit; " \ 150*4882a593Smuzhiyun "fi; " \ 151*4882a593Smuzhiyun "fi; " \ 152*4882a593Smuzhiyun "else " \ 153*4882a593Smuzhiyun "bootz; " \ 154*4882a593Smuzhiyun "fi;\0" 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 157*4882a593Smuzhiyun "mmc dev ${mmcdev}; if mmc rescan; then " \ 158*4882a593Smuzhiyun "if run loadbootscript; then " \ 159*4882a593Smuzhiyun "run bootscript; " \ 160*4882a593Smuzhiyun "else " \ 161*4882a593Smuzhiyun "if run loadimage; then " \ 162*4882a593Smuzhiyun "run mmcboot; " \ 163*4882a593Smuzhiyun "else run netboot; " \ 164*4882a593Smuzhiyun "fi; " \ 165*4882a593Smuzhiyun "fi; " \ 166*4882a593Smuzhiyun "else run netboot; fi" 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun #define CONFIG_ARP_TIMEOUT 200UL 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun /* 171*4882a593Smuzhiyun * Miscellaneous configurable options 172*4882a593Smuzhiyun */ 173*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP /* undef to save memory */ 174*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x90000000 177*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x90010000 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun /*----------------------------------------------------------------------- 184*4882a593Smuzhiyun * Physical Memory Map 185*4882a593Smuzhiyun */ 186*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 187*4882a593Smuzhiyun #define PHYS_SDRAM_1 CSD0_BASE_ADDR 188*4882a593Smuzhiyun #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 191*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 192*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 195*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 196*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 197*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun #define CONFIG_SYS_DDR_CLKSEL 0 200*4882a593Smuzhiyun #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 201*4882a593Smuzhiyun #define CONFIG_SYS_MAIN_PWR_ON 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun /*----------------------------------------------------------------------- 204*4882a593Smuzhiyun * environment organization 205*4882a593Smuzhiyun */ 206*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 207*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (8 * 1024) 208*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun #endif 211