1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2016 Stefan Roese <sr@denx.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _CONFIG_MVEBU_ARMADA_37XX_H 8*4882a593Smuzhiyun #define _CONFIG_MVEBU_ARMADA_37XX_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* 11*4882a593Smuzhiyun * High Level Configuration Options (easy to change) 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun #define CONFIG_DISPLAY_BOARDINFO_LATE 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x00000000 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* additions for new ARM relocation support */ 18*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE 0x00000000 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* auto boot */ 23*4882a593Smuzhiyun #define CONFIG_PREBOOT 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 26*4882a593Smuzhiyun 115200, 230400, 460800, 921600 } 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* 29*4882a593Smuzhiyun * For booting Linux, the board info and command line data 30*4882a593Smuzhiyun * have to be in the first 8 MB of memory, since this is 31*4882a593Smuzhiyun * the maximum mapped by the Linux kernel during initialization. 32*4882a593Smuzhiyun */ 33*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 34*4882a593Smuzhiyun #define CONFIG_INITRD_TAG /* enable INITRD tag */ 35*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* 40*4882a593Smuzhiyun * Size of malloc() pool 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */ 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* 45*4882a593Smuzhiyun * Other required minimal configurations 46*4882a593Smuzhiyun */ 47*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP 48*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE 49*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 50*4882a593Smuzhiyun #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 51*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 52*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ 53*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ 54*4882a593Smuzhiyun #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 55*4882a593Smuzhiyun #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define CONFIG_SYS_ALT_MEMTEST 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* End of 16M scrubbed by training in bootrom */ 60*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* 63*4882a593Smuzhiyun * I2C 64*4882a593Smuzhiyun */ 65*4882a593Smuzhiyun #define CONFIG_I2C_MV 66*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SLAVE 0x0 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* 69*4882a593Smuzhiyun * SPI Flash configuration 70*4882a593Smuzhiyun */ 71*4882a593Smuzhiyun #define CONFIG_ENV_SPI_BUS 0 72*4882a593Smuzhiyun #define CONFIG_ENV_SPI_CS 0 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* SPI NOR flash default params, used by sf commands */ 75*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED 1000000 76*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 77*4882a593Smuzhiyun #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun /* Environment in SPI NOR flash */ 80*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */ 81*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 82*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* 85*4882a593Smuzhiyun * Ethernet Driver configuration 86*4882a593Smuzhiyun */ 87*4882a593Smuzhiyun #define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ 88*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 89*4882a593Smuzhiyun #define CONFIG_ARP_TIMEOUT 200 90*4882a593Smuzhiyun #define CONFIG_NET_RETRY_COUNT 50 91*4882a593Smuzhiyun #define CONFIG_PHY_MARVELL 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* USB ethernet */ 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* 98*4882a593Smuzhiyun * SATA/SCSI/AHCI configuration 99*4882a593Smuzhiyun */ 100*4882a593Smuzhiyun #define CONFIG_SCSI_AHCI 101*4882a593Smuzhiyun #define CONFIG_SCSI_AHCI_PLAT 102*4882a593Smuzhiyun #define CONFIG_LIBATA 103*4882a593Smuzhiyun #define CONFIG_LBA48 104*4882a593Smuzhiyun #define CONFIG_SYS_64BIT_LBA 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 107*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_LUN 1 108*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 109*4882a593Smuzhiyun CONFIG_SYS_SCSI_MAX_LUN) 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun #define CONFIG_SUPPORT_VFAT 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun #endif /* _CONFIG_MVEBU_ARMADA_37XX_H */ 114