xref: /OK3568_Linux_fs/u-boot/include/configs/liteboard.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2015 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun  * Copyright (C) 2016 Grinn
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Configuration settings for the Grinn liteBoard (i.MX6UL).
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun #ifndef __LITEBOARD_CONFIG_H
10*4882a593Smuzhiyun #define __LITEBOARD_CONFIG_H
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <asm/arch/imx-regs.h>
13*4882a593Smuzhiyun #include <linux/sizes.h>
14*4882a593Smuzhiyun #include "mx6_common.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /* SPL options */
17*4882a593Smuzhiyun #include "imx6_spl.h"
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /* Size of malloc() pool */
20*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(16 * SZ_1M)
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define CONFIG_MXC_UART
23*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE		UART1_BASE
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* MMC Configs */
26*4882a593Smuzhiyun #ifdef CONFIG_FSL_USDHC
27*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC1_BASE_ADDR
28*4882a593Smuzhiyun #define CONFIG_SUPPORT_EMMC_BOOT
29*4882a593Smuzhiyun #endif
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
34*4882a593Smuzhiyun 	"script=boot.scr\0" \
35*4882a593Smuzhiyun 	"image=zImage\0" \
36*4882a593Smuzhiyun 	"console=ttymxc0\0" \
37*4882a593Smuzhiyun 	"fdt_high=0xffffffff\0" \
38*4882a593Smuzhiyun 	"initrd_high=0xffffffff\0" \
39*4882a593Smuzhiyun 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
40*4882a593Smuzhiyun 	"fdt_addr=0x83000000\0" \
41*4882a593Smuzhiyun 	"boot_fdt=try\0" \
42*4882a593Smuzhiyun 	"ip_dyn=yes\0" \
43*4882a593Smuzhiyun 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
44*4882a593Smuzhiyun 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
45*4882a593Smuzhiyun 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
46*4882a593Smuzhiyun 	"mmcautodetect=yes\0" \
47*4882a593Smuzhiyun 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
48*4882a593Smuzhiyun 		"root=${mmcroot}\0" \
49*4882a593Smuzhiyun 	"loadbootscript=" \
50*4882a593Smuzhiyun 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
51*4882a593Smuzhiyun 	"bootscript=echo Running bootscript from mmc ...; " \
52*4882a593Smuzhiyun 		"source\0" \
53*4882a593Smuzhiyun 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
54*4882a593Smuzhiyun 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
55*4882a593Smuzhiyun 	"mmcboot=echo Booting from mmc ...; " \
56*4882a593Smuzhiyun 		"run mmcargs; " \
57*4882a593Smuzhiyun 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
58*4882a593Smuzhiyun 			"if run loadfdt; then " \
59*4882a593Smuzhiyun 				"bootz ${loadaddr} - ${fdt_addr}; " \
60*4882a593Smuzhiyun 			"else " \
61*4882a593Smuzhiyun 				"if test ${boot_fdt} = try; then " \
62*4882a593Smuzhiyun 					"bootz; " \
63*4882a593Smuzhiyun 				"else " \
64*4882a593Smuzhiyun 					"echo WARN: Cannot load the DT; " \
65*4882a593Smuzhiyun 				"fi; " \
66*4882a593Smuzhiyun 			"fi; " \
67*4882a593Smuzhiyun 		"else " \
68*4882a593Smuzhiyun 			"bootz; " \
69*4882a593Smuzhiyun 		"fi;\0" \
70*4882a593Smuzhiyun 	"netargs=setenv bootargs console=${console},${baudrate} " \
71*4882a593Smuzhiyun 		"root=/dev/nfs " \
72*4882a593Smuzhiyun 	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
73*4882a593Smuzhiyun 	"netboot=echo Booting from net ...; " \
74*4882a593Smuzhiyun 		"run netargs; " \
75*4882a593Smuzhiyun 		"if test ${ip_dyn} = yes; then " \
76*4882a593Smuzhiyun 			"setenv get_cmd dhcp; " \
77*4882a593Smuzhiyun 		"else " \
78*4882a593Smuzhiyun 			"setenv get_cmd tftp; " \
79*4882a593Smuzhiyun 		"fi; " \
80*4882a593Smuzhiyun 		"${get_cmd} ${image}; " \
81*4882a593Smuzhiyun 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
82*4882a593Smuzhiyun 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
83*4882a593Smuzhiyun 				"bootz ${loadaddr} - ${fdt_addr}; " \
84*4882a593Smuzhiyun 			"else " \
85*4882a593Smuzhiyun 				"if test ${boot_fdt} = try; then " \
86*4882a593Smuzhiyun 					"bootz; " \
87*4882a593Smuzhiyun 				"else " \
88*4882a593Smuzhiyun 					"echo WARN: Cannot load the DT; " \
89*4882a593Smuzhiyun 				"fi; " \
90*4882a593Smuzhiyun 			"fi; " \
91*4882a593Smuzhiyun 		"else " \
92*4882a593Smuzhiyun 			"bootz; " \
93*4882a593Smuzhiyun 		"fi;\0"
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \
96*4882a593Smuzhiyun 	   "mmc dev ${mmcdev};" \
97*4882a593Smuzhiyun 	   "if mmc rescan; then " \
98*4882a593Smuzhiyun 		   "if run loadbootscript; then " \
99*4882a593Smuzhiyun 			   "run bootscript; " \
100*4882a593Smuzhiyun 		   "else " \
101*4882a593Smuzhiyun 			   "if run loadimage; then " \
102*4882a593Smuzhiyun 				   "run mmcboot; " \
103*4882a593Smuzhiyun 			   "else run netboot; " \
104*4882a593Smuzhiyun 			   "fi; " \
105*4882a593Smuzhiyun 		   "fi; " \
106*4882a593Smuzhiyun 	   "else run netboot; fi"
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /* Miscellaneous configurable options */
109*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START	0x80000000
110*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_128M)
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
113*4882a593Smuzhiyun #define CONFIG_SYS_HZ			1000
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun /* Physical Memory Map */
118*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS		1
119*4882a593Smuzhiyun #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
122*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
123*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \
126*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
127*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \
128*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* FLASH and environment organization */
131*4882a593Smuzhiyun #define CONFIG_ENV_SIZE			SZ_8K
132*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(8 * SZ_64K)
133*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV		0
134*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART		0
135*4882a593Smuzhiyun #define CONFIG_MMCROOT			"/dev/mmcblk0p2"
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun /* USB Configs */
138*4882a593Smuzhiyun #ifdef CONFIG_CMD_USB
139*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
140*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
141*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS   0
142*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
143*4882a593Smuzhiyun #endif
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #ifdef CONFIG_CMD_NET
146*4882a593Smuzhiyun #define CONFIG_FEC_MXC
147*4882a593Smuzhiyun #define CONFIG_MII
148*4882a593Smuzhiyun #define CONFIG_FEC_ENET_DEV		0
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun #define IMX_FEC_BASE			ENET_BASE_ADDR
151*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR		0x0
152*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE		RMII
153*4882a593Smuzhiyun #define CONFIG_ETHPRIME			"FEC"
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun #define CONFIG_PHY_SMSC
156*4882a593Smuzhiyun #endif
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun #endif
161