1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2009 3*4882a593Smuzhiyun * Marvell Semiconductor <www.marvell.com> 4*4882a593Smuzhiyun * Prafulla Wadaskar <prafulla@marvell.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * (C) Copyright 2009 7*4882a593Smuzhiyun * Stefan Roese, DENX Software Engineering, sr@denx.de. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * (C) Copyright 2010-2011 10*4882a593Smuzhiyun * Heiko Schocher, DENX Software Engineering, hs@denx.de. 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * for linking errors see 17*4882a593Smuzhiyun * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #ifndef _CONFIG_KM_ARM_H 21*4882a593Smuzhiyun #define _CONFIG_KM_ARM_H 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* 24*4882a593Smuzhiyun * High Level Configuration Options (easy to change) 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun #define CONFIG_MARVELL 27*4882a593Smuzhiyun #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ 28*4882a593Smuzhiyun #define CONFIG_KW88F6281 /* SOC Name */ 29*4882a593Smuzhiyun #define CONFIG_MACH_KM_KIRKWOOD /* Machine type */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define CONFIG_NAND_ECC_BCH 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* include common defines/options for all Keymile boards */ 36*4882a593Smuzhiyun #include "keymile-common.h" 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* SPI NOR Flash default params, used by sf commands */ 39*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED 8100000 40*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 43*4882a593Smuzhiyun #define CONFIG_ENV_SPI_BUS 0 44*4882a593Smuzhiyun #define CONFIG_ENV_SPI_CS 0 45*4882a593Smuzhiyun #define CONFIG_ENV_SPI_MAX_HZ 8100000 46*4882a593Smuzhiyun #define CONFIG_ENV_SPI_MODE SPI_MODE_3 47*4882a593Smuzhiyun #endif 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* Reserve 4 MB for malloc */ 50*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #include "asm/arch/config.h" 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */ 55*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ 56*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ 57*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* pseudo-non volatile RAM [hex] */ 60*4882a593Smuzhiyun #define CONFIG_KM_PNVRAM 0x80000 61*4882a593Smuzhiyun /* physical RAM MTD size [hex] */ 62*4882a593Smuzhiyun #define CONFIG_KM_PHRAM 0x17F000 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #define CONFIG_KM_CRAMFS_ADDR 0x2400000 65*4882a593Smuzhiyun #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */ 66*4882a593Smuzhiyun #define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */ 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* architecture specific default bootargs */ 69*4882a593Smuzhiyun #define CONFIG_KM_DEF_BOOT_ARGS_CPU \ 70*4882a593Smuzhiyun "bootcountaddr=${bootcountaddr} ${mtdparts}" \ 71*4882a593Smuzhiyun " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}" 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #define CONFIG_KM_DEF_ENV_CPU \ 74*4882a593Smuzhiyun "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ 75*4882a593Smuzhiyun CONFIG_KM_UPDATE_UBOOT \ 76*4882a593Smuzhiyun "set_fdthigh=setenv fdt_high ${kernelmem}\0" \ 77*4882a593Smuzhiyun "checkfdt=" \ 78*4882a593Smuzhiyun "if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; " \ 79*4882a593Smuzhiyun "then true; else setenv cramfsloadfdt true; " \ 80*4882a593Smuzhiyun "setenv boot bootm ${load_addr_r}; " \ 81*4882a593Smuzhiyun "echo No FDT found, booting with the kernel " \ 82*4882a593Smuzhiyun "appended one; fi\0" \ 83*4882a593Smuzhiyun "" 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 86*4882a593Smuzhiyun #define CONFIG_MISC_INIT_R 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* 89*4882a593Smuzhiyun * NS16550 Configuration 90*4882a593Smuzhiyun */ 91*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_SERIAL 92*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_REG_SIZE (-4) 93*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 94*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE 95*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun /* 98*4882a593Smuzhiyun * Serial Port configuration 99*4882a593Smuzhiyun * The following definitions let you select what serial you want to use 100*4882a593Smuzhiyun * for your console driver. 101*4882a593Smuzhiyun */ 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 1 /* Console on UART0 */ 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* 106*4882a593Smuzhiyun * For booting Linux, the board info and command line data 107*4882a593Smuzhiyun * have to be in the first 8 MB of memory, since this is 108*4882a593Smuzhiyun * the maximum mapped by the Linux kernel during initialization. 109*4882a593Smuzhiyun */ 110*4882a593Smuzhiyun #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ 111*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 112*4882a593Smuzhiyun #define CONFIG_INITRD_TAG /* enable INITRD tag */ 113*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun /* 116*4882a593Smuzhiyun * NAND Flash configuration 117*4882a593Smuzhiyun */ 118*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define BOOTFLASH_START 0x0 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun /* Kirkwood has two serial IF */ 123*4882a593Smuzhiyun #if (CONFIG_CONS_INDEX == 2) 124*4882a593Smuzhiyun #define CONFIG_KM_CONSOLE_TTY "ttyS1" 125*4882a593Smuzhiyun #else 126*4882a593Smuzhiyun #define CONFIG_KM_CONSOLE_TTY "ttyS0" 127*4882a593Smuzhiyun #endif 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun /* 130*4882a593Smuzhiyun * Other required minimal configurations 131*4882a593Smuzhiyun */ 132*4882a593Smuzhiyun #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 133*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 4 134*4882a593Smuzhiyun #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun /* 137*4882a593Smuzhiyun * Ethernet Driver configuration 138*4882a593Smuzhiyun */ 139*4882a593Smuzhiyun #define CONFIG_NETCONSOLE /* include NetConsole support */ 140*4882a593Smuzhiyun #define CONFIG_MII /* expose smi ove miiphy interface */ 141*4882a593Smuzhiyun #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ 142*4882a593Smuzhiyun #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ 143*4882a593Smuzhiyun #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ 144*4882a593Smuzhiyun #define CONFIG_PHY_BASE_ADR 0 145*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 146*4882a593Smuzhiyun #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */ 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* 149*4882a593Smuzhiyun * I2C related stuff 150*4882a593Smuzhiyun */ 151*4882a593Smuzhiyun #undef CONFIG_I2C_MVTWSI 152*4882a593Smuzhiyun #define CONFIG_SYS_I2C 153*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 154*4882a593Smuzhiyun #define CONFIG_SYS_I2C_INIT_BOARD 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ 157*4882a593Smuzhiyun #define CONFIG_SYS_NUM_I2C_BUSES 6 158*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MAX_HOPS 1 159*4882a593Smuzhiyun #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ 160*4882a593Smuzhiyun {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ 161*4882a593Smuzhiyun {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ 162*4882a593Smuzhiyun {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ 163*4882a593Smuzhiyun {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ 164*4882a593Smuzhiyun {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ 165*4882a593Smuzhiyun } 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 168*4882a593Smuzhiyun #include <asm/arch/gpio.h> 169*4882a593Smuzhiyun extern void __set_direction(unsigned pin, int high); 170*4882a593Smuzhiyun void set_sda(int state); 171*4882a593Smuzhiyun void set_scl(int state); 172*4882a593Smuzhiyun int get_sda(void); 173*4882a593Smuzhiyun int get_scl(void); 174*4882a593Smuzhiyun #define KM_KIRKWOOD_SDA_PIN 8 175*4882a593Smuzhiyun #define KM_KIRKWOOD_SCL_PIN 9 176*4882a593Smuzhiyun #define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300 177*4882a593Smuzhiyun #define KM_KIRKWOOD_ENV_WP 38 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) 180*4882a593Smuzhiyun #define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) 181*4882a593Smuzhiyun #define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) 182*4882a593Smuzhiyun #define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) 183*4882a593Smuzhiyun #define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) 184*4882a593Smuzhiyun #endif 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun #define I2C_DELAY udelay(1) 187*4882a593Smuzhiyun #define I2C_SOFT_DECLARATIONS 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SOFT_SLAVE 0x0 190*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SOFT_SPEED 100000 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun /* EEprom support 24C128, 24C256 valid for environment eeprom */ 193*4882a593Smuzhiyun #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE 194*4882a593Smuzhiyun #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */ 195*4882a593Smuzhiyun #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 198*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun /* 201*4882a593Smuzhiyun * Environment variables configurations 202*4882a593Smuzhiyun */ 203*4882a593Smuzhiyun #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 204*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */ 205*4882a593Smuzhiyun #define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */ 206*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE 0x10000 207*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 208*4882a593Smuzhiyun CONFIG_ENV_SECT_SIZE) 209*4882a593Smuzhiyun #define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */ 210*4882a593Smuzhiyun #else 211*4882a593Smuzhiyun #define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 212*4882a593Smuzhiyun #define CONFIG_ENV_EEPROM_IS_ON_I2C 213*4882a593Smuzhiyun #define CONFIG_SYS_EEPROM_WREN 214*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ 215*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) 216*4882a593Smuzhiyun #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */ 217*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ 218*4882a593Smuzhiyun #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 219*4882a593Smuzhiyun #endif 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun /* SPI bus claim MPP configuration */ 225*4882a593Smuzhiyun #define CONFIG_SYS_KW_SPI_MPP 0x0 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun #define FLASH_GPIO_PIN 0x00010000 228*4882a593Smuzhiyun #define KM_FLASH_GPIO_PIN 16 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun #ifndef MTDIDS_DEFAULT 231*4882a593Smuzhiyun # define MTDIDS_DEFAULT "nand0=orion_nand" 232*4882a593Smuzhiyun #endif /* MTDIDS_DEFAULT */ 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun #ifndef MTDPARTS_DEFAULT 235*4882a593Smuzhiyun # define MTDPARTS_DEFAULT "mtdparts=" \ 236*4882a593Smuzhiyun "orion_nand:" \ 237*4882a593Smuzhiyun "-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");" 238*4882a593Smuzhiyun #endif /* MTDPARTS_DEFAULT */ 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun #define CONFIG_KM_UPDATE_UBOOT \ 241*4882a593Smuzhiyun "update=" \ 242*4882a593Smuzhiyun "sf probe 0;sf erase 0 +${filesize};" \ 243*4882a593Smuzhiyun "sf write ${load_addr_r} 0 ${filesize};\0" 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 246*4882a593Smuzhiyun #define CONFIG_KM_NEW_ENV \ 247*4882a593Smuzhiyun "newenv=sf probe 0;" \ 248*4882a593Smuzhiyun "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \ 249*4882a593Smuzhiyun __stringify(CONFIG_ENV_TOTAL_SIZE)"\0" 250*4882a593Smuzhiyun #else 251*4882a593Smuzhiyun #define CONFIG_KM_NEW_ENV \ 252*4882a593Smuzhiyun "newenv=setenv addr 0x100000 && " \ 253*4882a593Smuzhiyun "i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \ 254*4882a593Smuzhiyun "mw.b ${addr} 0 4 && " \ 255*4882a593Smuzhiyun "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 256*4882a593Smuzhiyun " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \ 257*4882a593Smuzhiyun "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 258*4882a593Smuzhiyun " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0" 259*4882a593Smuzhiyun #endif 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun #ifndef CONFIG_KM_BOARD_EXTRA_ENV 262*4882a593Smuzhiyun #define CONFIG_KM_BOARD_EXTRA_ENV "" 263*4882a593Smuzhiyun #endif 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun /* 266*4882a593Smuzhiyun * Default environment variables 267*4882a593Smuzhiyun */ 268*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 269*4882a593Smuzhiyun CONFIG_KM_BOARD_EXTRA_ENV \ 270*4882a593Smuzhiyun CONFIG_KM_DEF_ENV \ 271*4882a593Smuzhiyun CONFIG_KM_NEW_ENV \ 272*4882a593Smuzhiyun "arch=arm\0" \ 273*4882a593Smuzhiyun "" 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun #if !defined(CONFIG_MTD_NOR_FLASH) 276*4882a593Smuzhiyun #undef CONFIG_FLASH_CFI_MTD 277*4882a593Smuzhiyun #undef CONFIG_JFFS2_CMDLINE 278*4882a593Smuzhiyun #endif 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun /* additions for new relocation code, must be added to all boards */ 281*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE 0x00000000 282*4882a593Smuzhiyun /* Do early setups now in board_init_f() */ 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun /* 285*4882a593Smuzhiyun * resereved pram area at the end of memroy [hex] 286*4882a593Smuzhiyun * 8Mbytes for switch + 4Kbytes for bootcount 287*4882a593Smuzhiyun */ 288*4882a593Smuzhiyun #define CONFIG_KM_RESERVED_PRAM 0x801000 289*4882a593Smuzhiyun /* address for the bootcount (taken from end of RAM) */ 290*4882a593Smuzhiyun #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) 291*4882a593Smuzhiyun /* Use generic bootcount RAM driver */ 292*4882a593Smuzhiyun #define CONFIG_BOOTCOUNT_RAM 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun /* enable POST tests */ 295*4882a593Smuzhiyun #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) 296*4882a593Smuzhiyun #define CONFIG_POST_SKIP_ENV_FLAGS 297*4882a593Smuzhiyun #define CONFIG_POST_EXTERNAL_WORD_FUNCS 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun /* we do the whole PCIe FPGA config stuff here */ 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun #endif /* _CONFIG_KM_ARM_H */ 302