1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2010-2011 Calxeda, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __CONFIG_H 8*4882a593Smuzhiyun #define __CONFIG_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <config_distro_defaults.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define CONFIG_SYS_DCACHE_OFF 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define CONFIG_SYS_BOOTMAPSZ (16 << 20) 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define CONFIG_SYS_TIMER_RATE (150000000/256) 17*4882a593Smuzhiyun #define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4) 18*4882a593Smuzhiyun #define CONFIG_SYS_TIMER_COUNTS_DOWN 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* 21*4882a593Smuzhiyun * Size of malloc() pool 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (512 * 1024) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define CONFIG_PL011_SERIAL 26*4882a593Smuzhiyun #define CONFIG_PL011_CLOCK 150000000 27*4882a593Smuzhiyun #define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) } 28*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 0 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define CONFIG_BOOTCOUNT_LIMIT 31*4882a593Smuzhiyun #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD 32*4882a593Smuzhiyun #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ 33*4882a593Smuzhiyun #define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define CONFIG_MISC_INIT_R 36*4882a593Smuzhiyun #define CONFIG_LIBATA 37*4882a593Smuzhiyun #define CONFIG_SCSI_AHCI 38*4882a593Smuzhiyun #define CONFIG_SCSI_AHCI_PLAT 39*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 40*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_LUN 1 41*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 42*4882a593Smuzhiyun CONFIG_SYS_SCSI_MAX_LUN) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define CONFIG_CALXEDA_XGMAC 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* 47*4882a593Smuzhiyun * Command line configuration. 48*4882a593Smuzhiyun */ 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define CONFIG_BOOT_RETRY_TIME -1 51*4882a593Smuzhiyun #define CONFIG_RESET_TO_RETRY 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* 54*4882a593Smuzhiyun * Miscellaneous configurable options 55*4882a593Smuzhiyun */ 56*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 57*4882a593Smuzhiyun #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x800000 60*4882a593Smuzhiyun #define CONFIG_SYS_64BIT_LBA 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /*----------------------------------------------------------------------- 63*4882a593Smuzhiyun * Physical Memory Map 64*4882a593Smuzhiyun * The DRAM is already setup, so do not touch the DT node later. 65*4882a593Smuzhiyun */ 66*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 0 67*4882a593Smuzhiyun #define PHYS_SDRAM_1_SIZE (4089 << 20) 68*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x100000 69*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000) 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /* Environment data setup 72*4882a593Smuzhiyun */ 73*4882a593Smuzhiyun #define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */ 74*4882a593Smuzhiyun #define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */ 75*4882a593Smuzhiyun #define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */ 76*4882a593Smuzhiyun #define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE 0x00000000 79*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x00008000 80*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR 0x01000000 81*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #endif 84