1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2013 Siemens Schweiz AG 3*4882a593Smuzhiyun * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Based on: 6*4882a593Smuzhiyun * U-Boot file:/include/configs/am335x_evm.h 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifndef __CONFIG_ETAMIN_H 14*4882a593Smuzhiyun #define __CONFIG_ETAMIN_H 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #include "siemens-am33x-common.h" 17*4882a593Smuzhiyun /* NAND specific changes for etamin due to different page size */ 18*4882a593Smuzhiyun #undef CONFIG_SYS_NAND_PAGE_SIZE 19*4882a593Smuzhiyun #undef CONFIG_SYS_NAND_OOBSIZE 20*4882a593Smuzhiyun #undef CONFIG_SYS_NAND_BLOCK_SIZE 21*4882a593Smuzhiyun #undef CONFIG_SYS_NAND_ECCPOS 22*4882a593Smuzhiyun #undef CONFIG_SYS_NAND_U_BOOT_OFFS 23*4882a593Smuzhiyun #undef CONFIG_SYS_ENV_SECT_SIZE 24*4882a593Smuzhiyun #undef CONFIG_ENV_OFFSET 25*4882a593Smuzhiyun #undef CONFIG_NAND_OMAP_ECCSCHEME 26*4882a593Smuzhiyun #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET 0x980000 29*4882a593Smuzhiyun #define CONFIG_SYS_ENV_SECT_SIZE (512 << 10) /* 512 KiB */ 30*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_SIZE 4096 31*4882a593Smuzhiyun #define CONFIG_SYS_NAND_OOBSIZE 224 32*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * CONFIG_SYS_NAND_PAGE_SIZE) 33*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 34*4882a593Smuzhiyun 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ 35*4882a593Smuzhiyun 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ 36*4882a593Smuzhiyun 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ 37*4882a593Smuzhiyun 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ 38*4882a593Smuzhiyun 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ 39*4882a593Smuzhiyun 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ 40*4882a593Smuzhiyun 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ 41*4882a593Smuzhiyun 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ 42*4882a593Smuzhiyun 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ 43*4882a593Smuzhiyun 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ 44*4882a593Smuzhiyun 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ 45*4882a593Smuzhiyun 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ 46*4882a593Smuzhiyun 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ 47*4882a593Smuzhiyun 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ 48*4882a593Smuzhiyun 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ 49*4882a593Smuzhiyun 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ 50*4882a593Smuzhiyun 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ 51*4882a593Smuzhiyun 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ 52*4882a593Smuzhiyun 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ 53*4882a593Smuzhiyun 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ 54*4882a593Smuzhiyun } 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #undef CONFIG_SYS_NAND_ECCSIZE 57*4882a593Smuzhiyun #undef CONFIG_SYS_NAND_ECCBYTES 58*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCSIZE 512 59*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCBYTES 26 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #define CONFIG_SYS_NAND_MAX_CHIPS 1 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #undef CONFIG_SYS_MAX_NAND_DEVICE 66*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 3 67*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE2 (0x18000000) /* physical address */ 68*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \ 69*4882a593Smuzhiyun CONFIG_SYS_NAND_BASE2} 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 72*4882a593Smuzhiyun #define DDR_PLL_FREQ 303 73*4882a593Smuzhiyun #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* FWD Button = 27 76*4882a593Smuzhiyun * SRV Button = 87 */ 77*4882a593Smuzhiyun #define BOARD_DFU_BUTTON_GPIO 27 78*4882a593Smuzhiyun #define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ 79*4882a593Smuzhiyun /* In dfu mode keep led1 on */ 80*4882a593Smuzhiyun #define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ 81*4882a593Smuzhiyun "button_dfu0=27\0" \ 82*4882a593Smuzhiyun "button_dfu1=87\0" \ 83*4882a593Smuzhiyun "led0=3,0,1\0" \ 84*4882a593Smuzhiyun "led1=4,0,0\0" \ 85*4882a593Smuzhiyun "led2=5,0,1\0" \ 86*4882a593Smuzhiyun "led3=87,0,1\0" \ 87*4882a593Smuzhiyun "led4=60,0,1\0" \ 88*4882a593Smuzhiyun "led5=63,0,1\0" 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* Physical Memory Map */ 91*4882a593Smuzhiyun #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* I2C Configuration */ 94*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED 100000 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 97*4882a593Smuzhiyun #define EEPROM_ADDR_DDR3 0x90 98*4882a593Smuzhiyun #define EEPROM_ADDR_CHIP 0x120 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #undef CONFIG_MII 101*4882a593Smuzhiyun #define CONFIG_PHY_SMSC 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define CONFIG_FACTORYSET 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* use both define to compile a SPL compliance test */ 106*4882a593Smuzhiyun /* 107*4882a593Smuzhiyun #define CONFIG_SPL_CMT 108*4882a593Smuzhiyun #define CONFIG_SPL_CMT_DEBUG 109*4882a593Smuzhiyun */ 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun /* nedded by compliance test in read mode */ 112*4882a593Smuzhiyun #if defined(CONFIG_SPL_CMT) 113*4882a593Smuzhiyun #define CONFIG_SYS_DCACHE_OFF 114*4882a593Smuzhiyun #endif 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun /* Define own nand partitions */ 117*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET_REDUND 0xB80000 118*4882a593Smuzhiyun #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 119*4882a593Smuzhiyun #define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE) 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun #define CONFIG_DFU_MTD 124*4882a593Smuzhiyun #undef COMMON_ENV_DFU_ARGS 125*4882a593Smuzhiyun #define COMMON_ENV_DFU_ARGS "dfu_args=run bootargs_defaults;" \ 126*4882a593Smuzhiyun "setenv bootargs ${bootargs};" \ 127*4882a593Smuzhiyun "mtdparts default;" \ 128*4882a593Smuzhiyun "draco_led 1;" \ 129*4882a593Smuzhiyun "dfu 0 mtd 0;" \ 130*4882a593Smuzhiyun "draco_led 0;\0" \ 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun #undef DFU_ALT_INFO_NAND_V2 133*4882a593Smuzhiyun #define DFU_ALT_INFO_NAND_V2 \ 134*4882a593Smuzhiyun "spl mtddev;" \ 135*4882a593Smuzhiyun "spl.backup1 mtddev;" \ 136*4882a593Smuzhiyun "spl.backup2 mtddev;" \ 137*4882a593Smuzhiyun "spl.backup3 mtddev;" \ 138*4882a593Smuzhiyun "u-boot mtddev;" \ 139*4882a593Smuzhiyun "u-boot.env0 mtddev;" \ 140*4882a593Smuzhiyun "u-boot.env1 mtddev;" \ 141*4882a593Smuzhiyun "rootfs mtddevubi" \ 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun #undef MTDIDS_NAME_STR 144*4882a593Smuzhiyun #define MTDIDS_NAME_STR "omap2-nand_concat" 145*4882a593Smuzhiyun #undef MTDIDS_DEFAULT 146*4882a593Smuzhiyun #define MTDIDS_DEFAULT "nand2=" MTDIDS_NAME_STR 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun #undef MTDPARTS_DEFAULT_V2 149*4882a593Smuzhiyun #define MTDPARTS_DEFAULT_V2 "mtdparts=" MTDIDS_NAME_STR ":" \ 150*4882a593Smuzhiyun "512k(spl)," \ 151*4882a593Smuzhiyun "512k(spl.backup1)," \ 152*4882a593Smuzhiyun "512k(spl.backup2)," \ 153*4882a593Smuzhiyun "512k(spl.backup3)," \ 154*4882a593Smuzhiyun "7680k(u-boot)," \ 155*4882a593Smuzhiyun "2048k(u-boot.env0)," \ 156*4882a593Smuzhiyun "2048k(u-boot.env1)," \ 157*4882a593Smuzhiyun "2048k(mtdoops)," \ 158*4882a593Smuzhiyun "-(rootfs)" 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun #undef MTDPARTS_DEFAULT 161*4882a593Smuzhiyun #define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_V2 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun #undef CONFIG_ENV_SETTINGS_NAND_V2 164*4882a593Smuzhiyun #define CONFIG_ENV_SETTINGS_NAND_V2 \ 165*4882a593Smuzhiyun "nand_active_ubi_vol=rootfs_a\0" \ 166*4882a593Smuzhiyun "rootfs_name=rootfs\0" \ 167*4882a593Smuzhiyun "kernel_name=uImage\0"\ 168*4882a593Smuzhiyun "nand_root_fs_type=ubifs rootwait=1\0" \ 169*4882a593Smuzhiyun "nand_args=run bootargs_defaults;" \ 170*4882a593Smuzhiyun "mtdparts default;" \ 171*4882a593Smuzhiyun "setenv ${partitionset_active} true;" \ 172*4882a593Smuzhiyun "if test -n ${A}; then " \ 173*4882a593Smuzhiyun "setenv nand_active_ubi_vol ${rootfs_name}_a;" \ 174*4882a593Smuzhiyun "fi;" \ 175*4882a593Smuzhiyun "if test -n ${B}; then " \ 176*4882a593Smuzhiyun "setenv nand_active_ubi_vol ${rootfs_name}_b;" \ 177*4882a593Smuzhiyun "fi;" \ 178*4882a593Smuzhiyun "setenv nand_root ubi0:${nand_active_ubi_vol} rw " \ 179*4882a593Smuzhiyun "ubi.mtd=rootfs,${ubi_off};" \ 180*4882a593Smuzhiyun "setenv bootargs ${bootargs} " \ 181*4882a593Smuzhiyun "root=${nand_root} noinitrd ${mtdparts} " \ 182*4882a593Smuzhiyun "rootfstype=${nand_root_fs_type} ip=${ip_method} " \ 183*4882a593Smuzhiyun "console=ttyMTD,mtdoops console=ttyO0,115200n8 mtdoops.mtddev" \ 184*4882a593Smuzhiyun "=mtdoops\0" \ 185*4882a593Smuzhiyun COMMON_ENV_DFU_ARGS \ 186*4882a593Smuzhiyun "dfu_alt_info=" DFU_ALT_INFO_NAND_V2 "\0" \ 187*4882a593Smuzhiyun COMMON_ENV_NAND_BOOT \ 188*4882a593Smuzhiyun "ubi part rootfs ${ubi_off};" \ 189*4882a593Smuzhiyun "ubifsmount ubi0:${nand_active_ubi_vol};" \ 190*4882a593Smuzhiyun "ubifsload ${kloadaddr} boot/${kernel_name};" \ 191*4882a593Smuzhiyun "ubifsload ${loadaddr} boot/${dtb_name}.dtb;" \ 192*4882a593Smuzhiyun "bootm ${kloadaddr} - ${loadaddr}\0" \ 193*4882a593Smuzhiyun "nand_boot_backup=ubifsload ${loadaddr} boot/am335x-draco.dtb;" \ 194*4882a593Smuzhiyun "bootm ${kloadaddr} - ${loadaddr}\0" \ 195*4882a593Smuzhiyun COMMON_ENV_NAND_CMDS 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun #define CONFIG_NAND_CS_INIT 200*4882a593Smuzhiyun #define ETAMIN_NAND_GPMC_CONFIG1 0x00000800 201*4882a593Smuzhiyun #define ETAMIN_NAND_GPMC_CONFIG2 0x001e1e00 202*4882a593Smuzhiyun #define ETAMIN_NAND_GPMC_CONFIG3 0x001e1e00 203*4882a593Smuzhiyun #define ETAMIN_NAND_GPMC_CONFIG4 0x16051807 204*4882a593Smuzhiyun #define ETAMIN_NAND_GPMC_CONFIG5 0x00151e1e 205*4882a593Smuzhiyun #define ETAMIN_NAND_GPMC_CONFIG6 0x16000f80 206*4882a593Smuzhiyun #define CONFIG_MTD_CONCAT 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun /* Default env settings */ 209*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 210*4882a593Smuzhiyun "hostname=etamin\0" \ 211*4882a593Smuzhiyun "ubi_off=4096\0"\ 212*4882a593Smuzhiyun "nand_img_size=0x400000\0" \ 213*4882a593Smuzhiyun "optargs=\0" \ 214*4882a593Smuzhiyun "preboot=draco_led 0\0" \ 215*4882a593Smuzhiyun CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ 216*4882a593Smuzhiyun CONFIG_ENV_SETTINGS_V2 \ 217*4882a593Smuzhiyun CONFIG_ENV_SETTINGS_NAND_V2 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun #ifndef CONFIG_RESTORE_FLASH 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 222*4882a593Smuzhiyun "if dfubutton; then " \ 223*4882a593Smuzhiyun "run dfu_start; " \ 224*4882a593Smuzhiyun "reset; " \ 225*4882a593Smuzhiyun "fi;" \ 226*4882a593Smuzhiyun "run nand_boot;" \ 227*4882a593Smuzhiyun "run nand_boot_backup;" \ 228*4882a593Smuzhiyun "reset;" 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun #else 232*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 233*4882a593Smuzhiyun "setenv autoload no; " \ 234*4882a593Smuzhiyun "dhcp; " \ 235*4882a593Smuzhiyun "if tftp 80000000 debrick.scr; then " \ 236*4882a593Smuzhiyun "source 80000000; " \ 237*4882a593Smuzhiyun "fi" 238*4882a593Smuzhiyun #endif 239*4882a593Smuzhiyun #endif /* CONFIG_SPL_BUILD */ 240*4882a593Smuzhiyun #endif /* ! __CONFIG_ETAMIN_H */ 241