xref: /OK3568_Linux_fs/u-boot/include/configs/embestmx6boards.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2014 Eukréa Electromatique
3*4882a593Smuzhiyun  * Author: Eric Bénard <eric@eukrea.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Configuration settings for the Embest RIoTboard
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * based on mx6*sabre*.h which are :
8*4882a593Smuzhiyun  * Copyright (C) 2012 Freescale Semiconductor, Inc.
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #ifndef __RIOTBOARD_CONFIG_H
14*4882a593Smuzhiyun #define __RIOTBOARD_CONFIG_H
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE		UART2_BASE
17*4882a593Smuzhiyun #define CONSOLE_DEV		"ttymxc1"
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* Size of malloc() pool */
24*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define CONFIG_MXC_UART
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /* I2C Configs */
29*4882a593Smuzhiyun #define CONFIG_SYS_I2C
30*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC
31*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
32*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
33*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
34*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED		100000
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /* USB Configs */
37*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
38*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
39*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
40*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS	0
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun /* MMC Configs */
43*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR      0
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define CONFIG_FEC_MXC
46*4882a593Smuzhiyun #define CONFIG_MII
47*4882a593Smuzhiyun #define IMX_FEC_BASE			ENET_BASE_ADDR
48*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE		RGMII
49*4882a593Smuzhiyun #define CONFIG_ETHPRIME			"FEC"
50*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR		4
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define CONFIG_PHY_ATHEROS
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #ifdef CONFIG_CMD_SF
55*4882a593Smuzhiyun #define CONFIG_MXC_SPI
56*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_BUS		0
57*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_CS		0
58*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED		20000000
59*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
60*4882a593Smuzhiyun #endif
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun #define CONFIG_ARP_TIMEOUT     200UL
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START       0x10000000
65*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END         0x10010000
66*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun /* Physical Memory Map */
69*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS           1
70*4882a593Smuzhiyun #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
73*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
74*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \
77*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
78*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \
79*4882a593Smuzhiyun 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun /* Environment organization */
82*4882a593Smuzhiyun #define CONFIG_ENV_SIZE			(8 * 1024)
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun #if defined(CONFIG_ENV_IS_IN_MMC)
85*4882a593Smuzhiyun /* RiOTboard */
86*4882a593Smuzhiyun #define CONFIG_FDTFILE	"imx6dl-riotboard.dtb"
87*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM	3
88*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV		2	/* SDHC4 */
89*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
90*4882a593Smuzhiyun #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
91*4882a593Smuzhiyun #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
92*4882a593Smuzhiyun /* MarSBoard */
93*4882a593Smuzhiyun #define CONFIG_FDTFILE	"imx6q-marsboard.dtb"
94*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM	2
95*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(768 * 1024)
96*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE		(8 * 1024)
97*4882a593Smuzhiyun #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
98*4882a593Smuzhiyun #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
99*4882a593Smuzhiyun #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
100*4882a593Smuzhiyun #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun /* Framebuffer */
104*4882a593Smuzhiyun #define CONFIG_VIDEO_IPUV3
105*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_RLE8
106*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN
107*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN_ALIGN
108*4882a593Smuzhiyun #define CONFIG_BMP_16BPP
109*4882a593Smuzhiyun #define CONFIG_VIDEO_LOGO
110*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_LOGO
111*4882a593Smuzhiyun #define CONFIG_IPUV3_CLK 260000000
112*4882a593Smuzhiyun #define CONFIG_IMX_HDMI
113*4882a593Smuzhiyun #define CONFIG_IMX_VIDEO_SKIP
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun #include <config_distro_defaults.h>
116*4882a593Smuzhiyun #include "mx6_common.h"
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
119*4882a593Smuzhiyun  * 1M script, 1M pxe and the ramdisk at the end */
120*4882a593Smuzhiyun #define MEM_LAYOUT_ENV_SETTINGS \
121*4882a593Smuzhiyun 	"bootm_size=0x10000000\0" \
122*4882a593Smuzhiyun 	"kernel_addr_r=0x12000000\0" \
123*4882a593Smuzhiyun 	"fdt_addr_r=0x13000000\0" \
124*4882a593Smuzhiyun 	"scriptaddr=0x13100000\0" \
125*4882a593Smuzhiyun 	"pxefile_addr_r=0x13200000\0" \
126*4882a593Smuzhiyun 	"ramdisk_addr_r=0x13300000\0"
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun #define BOOT_TARGET_DEVICES(func) \
129*4882a593Smuzhiyun 	func(MMC, mmc, 0) \
130*4882a593Smuzhiyun 	func(MMC, mmc, 1) \
131*4882a593Smuzhiyun 	func(MMC, mmc, 2) \
132*4882a593Smuzhiyun 	func(USB, usb, 0) \
133*4882a593Smuzhiyun 	func(PXE, pxe, na) \
134*4882a593Smuzhiyun 	func(DHCP, dhcp, na)
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \
137*4882a593Smuzhiyun 	"run finduuid; " \
138*4882a593Smuzhiyun 	"run distro_bootcmd"
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun #include <config_distro_bootcmd.h>
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun #define CONSOLE_STDIN_SETTINGS \
143*4882a593Smuzhiyun 	"stdin=serial\0"
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #define CONSOLE_STDOUT_SETTINGS \
146*4882a593Smuzhiyun 	"stdout=serial\0" \
147*4882a593Smuzhiyun 	"stderr=serial\0"
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun #define CONSOLE_ENV_SETTINGS \
150*4882a593Smuzhiyun 	CONSOLE_STDIN_SETTINGS \
151*4882a593Smuzhiyun 	CONSOLE_STDOUT_SETTINGS
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \
154*4882a593Smuzhiyun 	CONSOLE_ENV_SETTINGS \
155*4882a593Smuzhiyun 	MEM_LAYOUT_ENV_SETTINGS \
156*4882a593Smuzhiyun 	"fdtfile=" CONFIG_FDTFILE "\0" \
157*4882a593Smuzhiyun 	"finduuid=part uuid mmc 0:1 uuid\0" \
158*4882a593Smuzhiyun 	BOOTENV
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun #endif                         /* __RIOTBOARD_CONFIG_H */
161