xref: /OK3568_Linux_fs/u-boot/include/configs/controlcenterdc.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3*4882a593Smuzhiyun  * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef _CONFIG_CONTROLCENTERDC_H
9*4882a593Smuzhiyun #define _CONFIG_CONTROLCENTERDC_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun /*
12*4882a593Smuzhiyun  * High Level Configuration Options (easy to change)
13*4882a593Smuzhiyun  */
14*4882a593Smuzhiyun #define CONFIG_CUSTOMER_BOARD_SUPPORT
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
17*4882a593Smuzhiyun #define CONFIG_DISPLAY_BOARDINFO_LATE
18*4882a593Smuzhiyun #define CONFIG_BOARD_LATE_INIT
19*4882a593Smuzhiyun #define CONFIG_LAST_STAGE_INIT
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /*
22*4882a593Smuzhiyun  * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
23*4882a593Smuzhiyun  * for DDR ECC byte filling in the SPL before loading the main
24*4882a593Smuzhiyun  * U-Boot into it.
25*4882a593Smuzhiyun  */
26*4882a593Smuzhiyun #define	CONFIG_SYS_TEXT_BASE	0x00800000
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define CONFIG_SYS_TCLK		250000000	/* 250MHz */
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define CONFIG_LOADADDR 		1000000
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /*
33*4882a593Smuzhiyun  * Commands configuration
34*4882a593Smuzhiyun  */
35*4882a593Smuzhiyun #define CONFIG_CMD_I2C
36*4882a593Smuzhiyun #define CONFIG_CMD_SPI
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* SPI NOR flash default params, used by sf commands */
39*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_BUS		1
40*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED		1000000
41*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun  * SDIO/MMC Card Configuration
45*4882a593Smuzhiyun  */
46*4882a593Smuzhiyun #define CONFIG_SYS_MMC_BASE		MVEBU_SDIO_BASE
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun  * SATA/SCSI/AHCI configuration
50*4882a593Smuzhiyun  */
51*4882a593Smuzhiyun #define CONFIG_LIBATA
52*4882a593Smuzhiyun #define CONFIG_SCSI_AHCI
53*4882a593Smuzhiyun #define CONFIG_SCSI_AHCI_PLAT
54*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
55*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_LUN		1
56*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
57*4882a593Smuzhiyun 					 CONFIG_SYS_SCSI_MAX_LUN)
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* Additional FS support/configuration */
60*4882a593Smuzhiyun #define CONFIG_SUPPORT_VFAT
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* USB/EHCI configuration */
63*4882a593Smuzhiyun #define CONFIG_EHCI_IS_TDI
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /* Environment in SPI NOR flash */
66*4882a593Smuzhiyun #define CONFIG_ENV_SPI_BUS		1
67*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET		(1 << 20) /* 1MiB in */
68*4882a593Smuzhiyun #define CONFIG_ENV_SIZE			(64 << 10) /* 64KiB */
69*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE		(256 << 10) /* 256KiB sectors */
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #define CONFIG_PHY_MARVELL		/* there is a marvell phy */
72*4882a593Smuzhiyun #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /* PCIe support */
75*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD
76*4882a593Smuzhiyun #define CONFIG_PCI
77*4882a593Smuzhiyun #define CONFIG_PCI_MVEBU
78*4882a593Smuzhiyun #define CONFIG_PCI_PNP
79*4882a593Smuzhiyun #define CONFIG_PCI_SCAN_SHOW
80*4882a593Smuzhiyun #endif
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun #define CONFIG_SYS_ALT_MEMTEST
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /*
85*4882a593Smuzhiyun  * Software (bit-bang) MII driver configuration
86*4882a593Smuzhiyun  */
87*4882a593Smuzhiyun #define CONFIG_BITBANGMII		/* bit-bang MII PHY management */
88*4882a593Smuzhiyun #define CONFIG_BITBANGMII_MULTI
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun /* SPL */
91*4882a593Smuzhiyun /*
92*4882a593Smuzhiyun  * Select the boot device here
93*4882a593Smuzhiyun  *
94*4882a593Smuzhiyun  * Currently supported are:
95*4882a593Smuzhiyun  * SPL_BOOT_SPI_NOR_FLASH	- Booting via SPI NOR flash
96*4882a593Smuzhiyun  * SPL_BOOT_SDIO_MMC_CARD	- Booting via SDIO/MMC card (partition 1)
97*4882a593Smuzhiyun  */
98*4882a593Smuzhiyun #define SPL_BOOT_SPI_NOR_FLASH		1
99*4882a593Smuzhiyun #define SPL_BOOT_SDIO_MMC_CARD		2
100*4882a593Smuzhiyun #define CONFIG_SPL_BOOT_DEVICE		SPL_BOOT_SPI_NOR_FLASH
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun /* Defines for SPL */
103*4882a593Smuzhiyun #define CONFIG_SPL_FRAMEWORK
104*4882a593Smuzhiyun #define CONFIG_SPL_SIZE			(160 << 10)
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun #if defined(CONFIG_SECURED_MODE_IMAGE)
107*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE		0x40002614
108*4882a593Smuzhiyun #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x2614)
109*4882a593Smuzhiyun #else
110*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE		0x40000030
111*4882a593Smuzhiyun #define CONFIG_SPL_MAX_SIZE		(CONFIG_SPL_SIZE - 0x30)
112*4882a593Smuzhiyun #endif
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun #define CONFIG_SPL_BSS_START_ADDR	(0x40000000 + CONFIG_SPL_SIZE)
115*4882a593Smuzhiyun #define CONFIG_SPL_BSS_MAX_SIZE		(16 << 10)
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
118*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_SIMPLE
119*4882a593Smuzhiyun #endif
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #define CONFIG_SPL_STACK		(0x40000000 + ((212 - 16) << 10))
122*4882a593Smuzhiyun #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun #define CONFIG_SPL_LIBCOMMON_SUPPORT
125*4882a593Smuzhiyun #define CONFIG_SPL_LIBGENERIC_SUPPORT
126*4882a593Smuzhiyun #define CONFIG_SPL_SERIAL_SUPPORT
127*4882a593Smuzhiyun #define CONFIG_SPL_I2C_SUPPORT
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
130*4882a593Smuzhiyun /* SPL related SPI defines */
131*4882a593Smuzhiyun #define CONFIG_SPL_SPI_LOAD
132*4882a593Smuzhiyun #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x30000
133*4882a593Smuzhiyun #define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
134*4882a593Smuzhiyun #endif
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
137*4882a593Smuzhiyun /* SPL related MMC defines */
138*4882a593Smuzhiyun #define CONFIG_SPL_MMC_SUPPORT
139*4882a593Smuzhiyun #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
140*4882a593Smuzhiyun #define CONFIG_SYS_MMC_U_BOOT_OFFS		(168 << 10)
141*4882a593Smuzhiyun #define CONFIG_SYS_U_BOOT_OFFS			CONFIG_SYS_MMC_U_BOOT_OFFS
142*4882a593Smuzhiyun #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	(CONFIG_SYS_U_BOOT_OFFS / 512)
143*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
144*4882a593Smuzhiyun #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER	0x00180000	/* in SDRAM */
145*4882a593Smuzhiyun #endif
146*4882a593Smuzhiyun #endif
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun /*
149*4882a593Smuzhiyun  * Environment Configuration
150*4882a593Smuzhiyun  */
151*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun #define CONFIG_BAUDRATE 115200
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun #define CONFIG_HOSTNAME		ccdc
156*4882a593Smuzhiyun #define CONFIG_ROOTPATH		"/opt/nfsroot"
157*4882a593Smuzhiyun #define CONFIG_BOOTFILE		"ccdc.img"
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun #define CONFIG_PREBOOT		/* enable preboot variable */
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS						\
162*4882a593Smuzhiyun 	"netdev=eth1\0"						\
163*4882a593Smuzhiyun 	"consoledev=ttyS1\0"							\
164*4882a593Smuzhiyun 	"u-boot=u-boot.bin\0"							\
165*4882a593Smuzhiyun 	"bootfile_addr=1000000\0"						\
166*4882a593Smuzhiyun 	"keyprogram_addr=3000000\0"						\
167*4882a593Smuzhiyun 	"keyprogram_file=keyprogram.img\0"						\
168*4882a593Smuzhiyun 	"fdtfile=controlcenterdc.dtb\0"						\
169*4882a593Smuzhiyun 	"load=tftpboot ${loadaddr} ${u-boot}\0"					\
170*4882a593Smuzhiyun 	"mmcdev=0:2\0"								\
171*4882a593Smuzhiyun 	"update=sf probe 1:0;"							\
172*4882a593Smuzhiyun 		" sf erase 0 +${filesize};"					\
173*4882a593Smuzhiyun 		" sf write ${fileaddr} 0 ${filesize}\0"				\
174*4882a593Smuzhiyun 	"upd=run load update\0"							\
175*4882a593Smuzhiyun 	"fdt_high=0x10000000\0"							\
176*4882a593Smuzhiyun 	"initrd_high=0x10000000\0"						\
177*4882a593Smuzhiyun 	"loadkeyprogram=tpm flush_keys;"					\
178*4882a593Smuzhiyun 		" mmc rescan;"							\
179*4882a593Smuzhiyun 		" ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
180*4882a593Smuzhiyun 		" source ${keyprogram_addr}:script@1\0"				\
181*4882a593Smuzhiyun 	"gpio1=gpio@22_25\0"							\
182*4882a593Smuzhiyun 	"gpio2=A29\0"								\
183*4882a593Smuzhiyun 	"blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 "	\
184*4882a593Smuzhiyun 		  "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0"	\
185*4882a593Smuzhiyun 	"bootfail=for i in ${blinkseq}; do"					\
186*4882a593Smuzhiyun 		" if test $i -eq 0; then"					\
187*4882a593Smuzhiyun 		" gpio clear ${gpio1}; gpio set ${gpio2};"			\
188*4882a593Smuzhiyun 		" elif test $i -eq 1; then"					\
189*4882a593Smuzhiyun 		" gpio clear ${gpio1}; gpio clear ${gpio2};"			\
190*4882a593Smuzhiyun 		" elif test $i -eq 2; then"					\
191*4882a593Smuzhiyun 		" gpio set ${gpio1}; gpio set ${gpio2};"			\
192*4882a593Smuzhiyun 		" else;"							\
193*4882a593Smuzhiyun 		" gpio clear ${gpio1}; gpio set ${gpio2};"			\
194*4882a593Smuzhiyun 		" fi; sleep 0.12; done\0"
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun #define CONFIG_NFSBOOTCOMMAND								\
197*4882a593Smuzhiyun 	"setenv bootargs root=/dev/nfs rw "						\
198*4882a593Smuzhiyun 	"nfsroot=${serverip}:${rootpath} "						\
199*4882a593Smuzhiyun 	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off "	\
200*4882a593Smuzhiyun 	"console=${consoledev},${baudrate} ${othbootargs}; "				\
201*4882a593Smuzhiyun 	"tftpboot ${bootfile_addr} ${bootfile}; "						\
202*4882a593Smuzhiyun 	"bootm ${bootfile_addr}"
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun #define CONFIG_MMCBOOTCOMMAND					\
205*4882a593Smuzhiyun 	"setenv bootargs root=/dev/mmcblk0p3 rw rootwait "	\
206*4882a593Smuzhiyun 	"console=${consoledev},${baudrate} ${othbootargs}; "	\
207*4882a593Smuzhiyun 	"ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; "	\
208*4882a593Smuzhiyun 	"bootm ${bootfile_addr}"
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND			\
211*4882a593Smuzhiyun 	"if env exists keyprogram; then;"	\
212*4882a593Smuzhiyun 	" setenv keyprogram; run nfsboot;"	\
213*4882a593Smuzhiyun         " fi;"					\
214*4882a593Smuzhiyun         " run dobootfail"
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun /*
217*4882a593Smuzhiyun  * mv-common.h should be defined after CMD configs since it used them
218*4882a593Smuzhiyun  * to enable certain macros
219*4882a593Smuzhiyun  */
220*4882a593Smuzhiyun #include "mv-common.h"
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun #endif /* _CONFIG_CONTROLCENTERDC_H */
223