1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2015-2016 Toradex, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the Toradex VF50/VF61 modules. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Based on vf610twr.h: 7*4882a593Smuzhiyun * Copyright 2013 Freescale Semiconductor, Inc. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef __CONFIG_H 13*4882a593Smuzhiyun #define __CONFIG_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define CONFIG_SYS_FSL_CLK 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifdef CONFIG_CMD_FUSE 24*4882a593Smuzhiyun #define CONFIG_MXC_OCOTP 25*4882a593Smuzhiyun #endif 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_FSL_DCU_FB 28*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN_ALIGN 29*4882a593Smuzhiyun #define CONFIG_VIDEO_LOGO 30*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_LOGO 31*4882a593Smuzhiyun #define CONFIG_SYS_FSL_DCU_LE 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR 34*4882a593Smuzhiyun #define DCU_LAYER_MAX_NUM 64 35*4882a593Smuzhiyun #endif 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* Size of malloc() pool */ 38*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* Allow to overwrite serial and ethaddr */ 41*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE 42*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_CONFIG 43*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* NAND support */ 46*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 47*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 48*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* Dynamic MTD partition support */ 51*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR 0 52*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_NUM 1 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define CONFIG_FEC_MXC 55*4882a593Smuzhiyun #define CONFIG_MII 56*4882a593Smuzhiyun #define IMX_FEC_BASE ENET1_BASE_ADDR 57*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 58*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define CONFIG_IPADDR 192.168.10.2 61*4882a593Smuzhiyun #define CONFIG_NETMASK 255.255.255.0 62*4882a593Smuzhiyun #define CONFIG_SERVERIP 192.168.10.1 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #define CONFIG_LOADADDR 0x80008000 65*4882a593Smuzhiyun #define CONFIG_FDTADDR 0x84000000 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun /* We boot from the gfxRAM area of the OCRAM. */ 68*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x3f408000 69*4882a593Smuzhiyun #define CONFIG_BOARD_SIZE_LIMIT 524288 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun #define SD_BOOTCMD \ 72*4882a593Smuzhiyun "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ 73*4882a593Smuzhiyun "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ 74*4882a593Smuzhiyun "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ 75*4882a593Smuzhiyun "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ 76*4882a593Smuzhiyun "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ 77*4882a593Smuzhiyun "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define NFS_BOOTCMD \ 80*4882a593Smuzhiyun "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ 81*4882a593Smuzhiyun "nfsboot=run setup; " \ 82*4882a593Smuzhiyun "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \ 83*4882a593Smuzhiyun "${setupargs} ${vidargs}; echo Booting from NFS...;" \ 84*4882a593Smuzhiyun "dhcp ${kernel_addr_r} && " \ 85*4882a593Smuzhiyun "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ 86*4882a593Smuzhiyun "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define UBI_BOOTCMD \ 89*4882a593Smuzhiyun "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ 90*4882a593Smuzhiyun "ubi.fm_autoconvert=1\0" \ 91*4882a593Smuzhiyun "ubiboot=run setup; " \ 92*4882a593Smuzhiyun "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \ 93*4882a593Smuzhiyun "${setupargs} ${vidargs}; echo Booting from NAND...; " \ 94*4882a593Smuzhiyun "ubi part ubi && " \ 95*4882a593Smuzhiyun "ubi read ${kernel_addr_r} kernel && " \ 96*4882a593Smuzhiyun "ubi read ${fdt_addr_r} dtb && " \ 97*4882a593Smuzhiyun "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 104*4882a593Smuzhiyun "kernel_addr_r=0x82000000\0" \ 105*4882a593Smuzhiyun "fdt_addr_r=0x84000000\0" \ 106*4882a593Smuzhiyun "kernel_file=zImage\0" \ 107*4882a593Smuzhiyun "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ 108*4882a593Smuzhiyun "fdt_board=eval-v3\0" \ 109*4882a593Smuzhiyun "fdt_fixup=;\0" \ 110*4882a593Smuzhiyun "defargs=\0" \ 111*4882a593Smuzhiyun "console=ttyLP0\0" \ 112*4882a593Smuzhiyun "setup=setenv setupargs " \ 113*4882a593Smuzhiyun "console=tty1 console=${console}" \ 114*4882a593Smuzhiyun ",${baudrate}n8 ${memargs}\0" \ 115*4882a593Smuzhiyun "setsdupdate=mmc rescan && set interface mmc && " \ 116*4882a593Smuzhiyun "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ 117*4882a593Smuzhiyun "source ${loadaddr}\0" \ 118*4882a593Smuzhiyun "setusbupdate=usb start && set interface usb && " \ 119*4882a593Smuzhiyun "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ 120*4882a593Smuzhiyun "source ${loadaddr}\0" \ 121*4882a593Smuzhiyun "setupdate=run setsdupdate || run setusbupdate\0" \ 122*4882a593Smuzhiyun "mtdparts=" MTDPARTS_DEFAULT "\0" \ 123*4882a593Smuzhiyun "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ 124*4882a593Smuzhiyun "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \ 125*4882a593Smuzhiyun "splashpos=m,m\0" \ 126*4882a593Smuzhiyun SD_BOOTCMD \ 127*4882a593Smuzhiyun NFS_BOOTCMD \ 128*4882a593Smuzhiyun UBI_BOOTCMD 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun /* Miscellaneous configurable options */ 131*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP /* undef to save memory */ 132*4882a593Smuzhiyun #undef CONFIG_AUTO_COMPLETE 133*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 134*4882a593Smuzhiyun #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80010000 137*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x87C00000 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 140*4882a593Smuzhiyun #define CONFIG_SYS_HZ 1000 141*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun /* Physical memory map */ 144*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 145*4882a593Smuzhiyun #define PHYS_SDRAM (0x80000000) 146*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 149*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 150*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 153*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 154*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 155*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun /* Environment organization */ 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun #ifdef CONFIG_ENV_IS_IN_MMC 160*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 161*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 162*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (8 * 1024) 163*4882a593Smuzhiyun #endif 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun #ifdef CONFIG_ENV_IS_IN_NAND 166*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (64 * 2048) 167*4882a593Smuzhiyun #define CONFIG_ENV_RANGE (4 * 64 * 2048) 168*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (12 * 64 * 2048) 169*4882a593Smuzhiyun #endif 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun /* USB Host Support */ 172*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 173*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun /* USB DFU */ 176*4882a593Smuzhiyun #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun /* USB Storage */ 179*4882a593Smuzhiyun #define CONFIG_USB_FUNCTION_MASS_STORAGE 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun #endif /* __CONFIG_H */ 182