1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2016 Toradex AG 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the Colibri iMX7 module. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * based on mx7dsabresd.h: 7*4882a593Smuzhiyun * Copyright (C) 2015 Freescale Semiconductor, Inc. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef __COLIBRI_IMX7_CONFIG_H 13*4882a593Smuzhiyun #define __COLIBRI_IMX7_CONFIG_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include "mx7_common.h" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /*#define CONFIG_DBG_MONITOR*/ 18*4882a593Smuzhiyun #define PHYS_SDRAM_SIZE SZ_512M 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_CONFIG 23*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* Size of malloc() pool */ 26*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* Network */ 29*4882a593Smuzhiyun #define CONFIG_FEC_MXC 30*4882a593Smuzhiyun #define CONFIG_MII 31*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 32*4882a593Smuzhiyun #define CONFIG_ETHPRIME "FEC" 33*4882a593Smuzhiyun #define CONFIG_FEC_MXC_PHYADDR 0 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define CONFIG_IP_DEFRAG 36*4882a593Smuzhiyun #define CONFIG_TFTP_BLOCKSIZE 16352 37*4882a593Smuzhiyun #define CONFIG_TFTP_TSIZE 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* ENET1 */ 40*4882a593Smuzhiyun #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* MMC Config*/ 43*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR 0 44*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 1 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #undef CONFIG_BOOTM_PLAN9 47*4882a593Smuzhiyun #undef CONFIG_BOOTM_RTEMS 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* I2C configs */ 50*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 51*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED 100000 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define CONFIG_IPADDR 192.168.10.2 54*4882a593Smuzhiyun #define CONFIG_NETMASK 255.255.255.0 55*4882a593Smuzhiyun #define CONFIG_SERVERIP 192.168.10.1 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define MEM_LAYOUT_ENV_SETTINGS \ 58*4882a593Smuzhiyun "bootm_size=0x10000000\0" \ 59*4882a593Smuzhiyun "fdt_addr_r=0x82000000\0" \ 60*4882a593Smuzhiyun "fdt_high=0xffffffff\0" \ 61*4882a593Smuzhiyun "initrd_high=0xffffffff\0" \ 62*4882a593Smuzhiyun "kernel_addr_r=0x81000000\0" \ 63*4882a593Smuzhiyun "ramdisk_addr_r=0x82100000\0" 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #define SD_BOOTCMD \ 66*4882a593Smuzhiyun "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ 67*4882a593Smuzhiyun "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} " \ 68*4882a593Smuzhiyun "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ 69*4882a593Smuzhiyun "run m4boot && " \ 70*4882a593Smuzhiyun "load mmc 0:1 ${kernel_addr_r} ${kernel_file} && " \ 71*4882a593Smuzhiyun "load mmc 0:1 ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ 72*4882a593Smuzhiyun "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #define NFS_BOOTCMD \ 75*4882a593Smuzhiyun "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ 76*4882a593Smuzhiyun "nfsboot=run setup; " \ 77*4882a593Smuzhiyun "setenv bootargs ${defargs} ${nfsargs} " \ 78*4882a593Smuzhiyun "${setupargs} ${vidargs}; echo Booting from NFS...;" \ 79*4882a593Smuzhiyun "dhcp ${kernel_addr_r} && " \ 80*4882a593Smuzhiyun "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ 81*4882a593Smuzhiyun "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define UBI_BOOTCMD \ 84*4882a593Smuzhiyun "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ 85*4882a593Smuzhiyun "ubi.fm_autoconvert=1\0" \ 86*4882a593Smuzhiyun "ubiboot=run setup; " \ 87*4882a593Smuzhiyun "setenv bootargs ${defargs} ${ubiargs} " \ 88*4882a593Smuzhiyun "${setupargs} ${vidargs}; echo Booting from NAND...; " \ 89*4882a593Smuzhiyun "ubi part ubi && run m4boot && " \ 90*4882a593Smuzhiyun "ubi read ${kernel_addr_r} kernel && " \ 91*4882a593Smuzhiyun "ubi read ${fdt_addr_r} dtb && " \ 92*4882a593Smuzhiyun "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 97*4882a593Smuzhiyun MEM_LAYOUT_ENV_SETTINGS \ 98*4882a593Smuzhiyun NFS_BOOTCMD \ 99*4882a593Smuzhiyun SD_BOOTCMD \ 100*4882a593Smuzhiyun UBI_BOOTCMD \ 101*4882a593Smuzhiyun "console=ttymxc0\0" \ 102*4882a593Smuzhiyun "defargs=\0" \ 103*4882a593Smuzhiyun "fdt_board=eval-v3\0" \ 104*4882a593Smuzhiyun "fdt_fixup=;\0" \ 105*4882a593Smuzhiyun "m4boot=;\0" \ 106*4882a593Smuzhiyun "ip_dyn=yes\0" \ 107*4882a593Smuzhiyun "kernel_file=zImage\0" \ 108*4882a593Smuzhiyun "mtdparts=" MTDPARTS_DEFAULT "\0" \ 109*4882a593Smuzhiyun "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ 110*4882a593Smuzhiyun "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ 111*4882a593Smuzhiyun "${board}/flash_eth.img && source ${loadaddr}\0" \ 112*4882a593Smuzhiyun "setsdupdate=mmc rescan && setenv interface mmc && " \ 113*4882a593Smuzhiyun "fatload ${interface} 0:1 ${loadaddr} " \ 114*4882a593Smuzhiyun "${board}/flash_blk.img && source ${loadaddr}\0" \ 115*4882a593Smuzhiyun "setup=setenv setupargs " \ 116*4882a593Smuzhiyun "console=tty1 console=${console}" \ 117*4882a593Smuzhiyun ",${baudrate}n8 ${memargs} consoleblank=0\0" \ 118*4882a593Smuzhiyun "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ 119*4882a593Smuzhiyun "setusbupdate=usb start && setenv interface usb && " \ 120*4882a593Smuzhiyun "fatload ${interface} 0:1 ${loadaddr} " \ 121*4882a593Smuzhiyun "${board}/flash_blk.img && source ${loadaddr}\0" \ 122*4882a593Smuzhiyun "splashpos=m,m\0" \ 123*4882a593Smuzhiyun "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ 124*4882a593Smuzhiyun "updlevel=2\0" 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun /* Miscellaneous configurable options */ 127*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x80000000 130*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000) 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 133*4882a593Smuzhiyun #define CONFIG_SYS_HZ 1000 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun /* Physical Memory Map */ 136*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 137*4882a593Smuzhiyun #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 140*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 141*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 144*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 145*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 146*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* environment organization */ 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun #if defined(CONFIG_ENV_IS_IN_MMC) 151*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ 152*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ 153*4882a593Smuzhiyun #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ 154*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (8 * SZ_64K) 155*4882a593Smuzhiyun #elif defined(CONFIG_ENV_IS_IN_NAND) 156*4882a593Smuzhiyun #define CONFIG_ENV_SECT_SIZE (128 * 1024) 157*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET (28 * CONFIG_ENV_SECT_SIZE) 158*4882a593Smuzhiyun #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 159*4882a593Smuzhiyun #endif 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun /* NAND stuff */ 162*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 163*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BASE 0x40000000 164*4882a593Smuzhiyun #define CONFIG_SYS_NAND_5_ADDR_CYCLE 165*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 166*4882a593Smuzhiyun #define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun /* Dynamic MTD partition support */ 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun /* DMA stuff, needed for GPMI/MXS NAND support */ 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun /* USB Configs */ 173*4882a593Smuzhiyun #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 176*4882a593Smuzhiyun #define CONFIG_MXC_USB_FLAGS 0 177*4882a593Smuzhiyun #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun #define CONFIG_USBD_HS 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun #define CONFIG_USB_FUNCTION_MASS_STORAGE 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun /* USB Device Firmware Update support */ 186*4882a593Smuzhiyun #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M 187*4882a593Smuzhiyun #define DFU_DEFAULT_POLL_TIMEOUT 300 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun #ifdef CONFIG_VIDEO 190*4882a593Smuzhiyun #define CONFIG_VIDEO_MXS 191*4882a593Smuzhiyun #define CONFIG_VIDEO_LOGO 192*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN 193*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN_ALIGN 194*4882a593Smuzhiyun #define CONFIG_BMP_16BPP 195*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_RLE8 196*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_LOGO 197*4882a593Smuzhiyun #endif 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun #endif 200