1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Config file for Compulab CM-T335 board 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/ 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Author: Ilya Ledvich <ilya@compulab.co.il> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __CONFIG_CM_T335_H 12*4882a593Smuzhiyun #define __CONFIG_CM_T335_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define CONFIG_CM_T335 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #include <configs/ti_am335x_common.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #undef CONFIG_SPI 19*4882a593Smuzhiyun #undef CONFIG_BOOTCOUNT_LIMIT 20*4882a593Smuzhiyun #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #undef CONFIG_MAX_RAM_BANK_SIZE 23*4882a593Smuzhiyun #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define CONFIG_MACH_TYPE MACH_TYPE_CM_T335 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* Clock Defines */ 28*4882a593Smuzhiyun #define V_OSCK 25000000 /* Clock output from T2 */ 29*4882a593Smuzhiyun #define V_SCLK (V_OSCK) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD 34*4882a593Smuzhiyun #define MMCARGS \ 35*4882a593Smuzhiyun "mmcdev=0\0" \ 36*4882a593Smuzhiyun "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ 37*4882a593Smuzhiyun "mmcrootfstype=ext4\0" \ 38*4882a593Smuzhiyun "mmcargs=setenv bootargs console=${console} " \ 39*4882a593Smuzhiyun "root=${mmcroot} " \ 40*4882a593Smuzhiyun "rootfstype=${mmcrootfstype}\0" \ 41*4882a593Smuzhiyun "mmcboot=echo Booting from mmc ...; " \ 42*4882a593Smuzhiyun "run mmcargs; " \ 43*4882a593Smuzhiyun "bootm ${loadaddr}\0" 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define NANDARGS \ 46*4882a593Smuzhiyun "mtdids=" MTDIDS_DEFAULT "\0" \ 47*4882a593Smuzhiyun "mtdparts=" MTDPARTS_DEFAULT "\0" \ 48*4882a593Smuzhiyun "nandroot=ubi0:rootfs rw\0" \ 49*4882a593Smuzhiyun "nandrootfstype=ubifs\0" \ 50*4882a593Smuzhiyun "nandargs=setenv bootargs console=${console} " \ 51*4882a593Smuzhiyun "root=${nandroot} " \ 52*4882a593Smuzhiyun "rootfstype=${nandrootfstype} " \ 53*4882a593Smuzhiyun "ubi.mtd=${rootfs_name}\0" \ 54*4882a593Smuzhiyun "nandboot=echo Booting from nand ...; " \ 55*4882a593Smuzhiyun "run nandargs; " \ 56*4882a593Smuzhiyun "nboot ${loadaddr} nand0 900000; " \ 57*4882a593Smuzhiyun "bootm ${loadaddr}\0" 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 60*4882a593Smuzhiyun "loadaddr=82000000\0" \ 61*4882a593Smuzhiyun "console=ttyO0,115200n8\0" \ 62*4882a593Smuzhiyun "rootfs_name=rootfs\0" \ 63*4882a593Smuzhiyun "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 64*4882a593Smuzhiyun "bootscript=echo Running bootscript from mmc ...; " \ 65*4882a593Smuzhiyun "source ${loadaddr}\0" \ 66*4882a593Smuzhiyun "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 67*4882a593Smuzhiyun MMCARGS \ 68*4882a593Smuzhiyun NANDARGS 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 71*4882a593Smuzhiyun "mmc dev ${mmcdev}; if mmc rescan; then " \ 72*4882a593Smuzhiyun "if run loadbootscript; then " \ 73*4882a593Smuzhiyun "run bootscript; " \ 74*4882a593Smuzhiyun "else " \ 75*4882a593Smuzhiyun "if run loaduimage; then " \ 76*4882a593Smuzhiyun "run mmcboot; " \ 77*4882a593Smuzhiyun "else run nandboot; " \ 78*4882a593Smuzhiyun "fi; " \ 79*4882a593Smuzhiyun "fi; " \ 80*4882a593Smuzhiyun "else run nandboot; fi" 81*4882a593Smuzhiyun #endif /* CONFIG_SPL_BUILD */ 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define CONFIG_TIMESTAMP 84*4882a593Smuzhiyun #define CONFIG_SYS_AUTOLOAD "no" 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun /* Serial console configuration */ 87*4882a593Smuzhiyun #define CONFIG_CONS_INDEX 1 88*4882a593Smuzhiyun #define CONFIG_SERIAL1 1 /* UART0 */ 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun /* NS16550 Configuration */ 91*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ 92*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun /* I2C Configuration */ 95*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 96*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 97*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_BUS 0 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /* SPL */ 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun /* Network. */ 102*4882a593Smuzhiyun #define CONFIG_PHY_ATHEROS 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /* NAND support */ 105*4882a593Smuzhiyun #define CONFIG_SYS_NAND_5_ADDR_CYCLE 106*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 107*4882a593Smuzhiyun CONFIG_SYS_NAND_PAGE_SIZE) 108*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_SIZE 2048 109*4882a593Smuzhiyun #define CONFIG_SYS_NAND_OOBSIZE 64 110*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 111*4882a593Smuzhiyun #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 112*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 113*4882a593Smuzhiyun 10, 11, 12, 13, 14, 15, 16, 17, \ 114*4882a593Smuzhiyun 18, 19, 20, 21, 22, 23, 24, 25, \ 115*4882a593Smuzhiyun 26, 27, 28, 29, 30, 31, 32, 33, \ 116*4882a593Smuzhiyun 34, 35, 36, 37, 38, 39, 40, 41, \ 117*4882a593Smuzhiyun 42, 43, 44, 45, 46, 47, 48, 49, \ 118*4882a593Smuzhiyun 50, 51, 52, 53, 54, 55, 56, 57, } 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCSIZE 512 121*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ECCBYTES 14 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun #undef CONFIG_SYS_NAND_U_BOOT_OFFS 126*4882a593Smuzhiyun #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun #define MTDIDS_DEFAULT "nand0=nand" 129*4882a593Smuzhiyun #define MTDPARTS_DEFAULT "mtdparts=nand:2m(spl)," \ 130*4882a593Smuzhiyun "1m(u-boot),1m(u-boot-env)," \ 131*4882a593Smuzhiyun "1m(dtb),4m(splash)," \ 132*4882a593Smuzhiyun "6m(kernel),-(rootfs)" 133*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET 0x300000 /* environment starts here */ 134*4882a593Smuzhiyun #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 135*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 136*4882a593Smuzhiyun #ifdef CONFIG_SPL_OS_BOOT 137*4882a593Smuzhiyun #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000 138*4882a593Smuzhiyun #endif 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun /* GPIO pin + bank to pin ID mapping */ 141*4882a593Smuzhiyun #define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin) 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun /* Status LED */ 144*4882a593Smuzhiyun /* Status LED polarity is inversed, so init it in the "off" state */ 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun /* EEPROM */ 147*4882a593Smuzhiyun #define CONFIG_ENV_EEPROM_IS_ON_I2C 148*4882a593Smuzhiyun #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 149*4882a593Smuzhiyun #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 150*4882a593Smuzhiyun #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 151*4882a593Smuzhiyun #define CONFIG_SYS_EEPROM_SIZE 256 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD 154*4882a593Smuzhiyun /* 155*4882a593Smuzhiyun * Enable PCA9555 at I2C0-0x26. 156*4882a593Smuzhiyun * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command. 157*4882a593Smuzhiyun */ 158*4882a593Smuzhiyun #define CONFIG_PCA953X 159*4882a593Smuzhiyun #define CONFIG_SYS_I2C_PCA953X_ADDR 0x26 160*4882a593Smuzhiyun #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} } 161*4882a593Smuzhiyun #endif /* CONFIG_SPL_BUILD */ 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun #endif /* __CONFIG_CM_T335_H */ 164*4882a593Smuzhiyun 165