1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2015 3*4882a593Smuzhiyun * Heiko Schocher, DENX Software Engineering, hs@denx.de. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Based on: 6*4882a593Smuzhiyun * Copyright (C) 2012 Freescale Semiconductor, Inc. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Configuration settings for the Freescale i.MX6DL aristainetos2 board. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun #ifndef __ARISTAINETOS2B_CONFIG_H 13*4882a593Smuzhiyun #define __ARISTAINETOS2B_CONFIG_H 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define CONFIG_SYS_BOARD_VERSION 3 16*4882a593Smuzhiyun #define CONFIG_HOSTNAME aristainetos2 17*4882a593Smuzhiyun #define CONFIG_BOARDNAME "aristainetos2-revB" 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART2_BASE 20*4882a593Smuzhiyun #define CONSOLE_DEV "ttymxc1" 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RGMII 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_BUS 0 25*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_CS 0 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_BOARD_SETTINGS \ 28*4882a593Smuzhiyun "board_type=aristainetos2_7@1\0" \ 29*4882a593Smuzhiyun "nor_bootdelay=-2\0" \ 30*4882a593Smuzhiyun "mtdids=nand0=gpmi-nand,nor0=spi0.0\0" \ 31*4882a593Smuzhiyun "mtdparts=mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red)," \ 32*4882a593Smuzhiyun "-(rescue-system);gpmi-nand:-(ubi)\0" \ 33*4882a593Smuzhiyun "addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0\0" \ 34*4882a593Smuzhiyun "ubiargs=setenv bootargs console=${console},${baudrate} " \ 35*4882a593Smuzhiyun "ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 " \ 36*4882a593Smuzhiyun "ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \ 37*4882a593Smuzhiyun "ubifsload ${fit_addr_r} /boot/system.itb; " \ 38*4882a593Smuzhiyun "imi ${fit_addr_r}\0 " \ 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15) 43*4882a593Smuzhiyun #define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(1, 0) 44*4882a593Smuzhiyun #define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15) 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* Framebuffer */ 47*4882a593Smuzhiyun #define CONFIG_SYS_LDB_CLOCK 33246000 48*4882a593Smuzhiyun #define CONFIG_LG4573 49*4882a593Smuzhiyun #define CONFIG_LG4573_BUS 0 50*4882a593Smuzhiyun #define CONFIG_LG4573_CS 1 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define CONFIG_PWM_IMX 53*4882a593Smuzhiyun #define CONFIG_IMX6_PWM_PER_CLK 66000000 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #include "aristainetos-common.h" 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #endif /* __ARISTAINETOS2B_CONFIG_H */ 58