1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2015 3*4882a593Smuzhiyun * (C) Copyright 2014 4*4882a593Smuzhiyun * Heiko Schocher, DENX Software Engineering, hs@denx.de. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Based on: 7*4882a593Smuzhiyun * Copyright (C) 2012 Freescale Semiconductor, Inc. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Configuration settings for the Freescale i.MX6Q SabreSD board. 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun #ifndef __ARISTAINETOS_CONFIG_H 14*4882a593Smuzhiyun #define __ARISTAINETOS_CONFIG_H 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define CONFIG_SYS_BOARD_VERSION 1 17*4882a593Smuzhiyun #define CONFIG_HOSTNAME aristainetos 18*4882a593Smuzhiyun #define CONFIG_BOARDNAME "aristainetos" 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART5_BASE 21*4882a593Smuzhiyun #define CONSOLE_DEV "ttymxc4" 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define CONFIG_FEC_XCV_TYPE RMII 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_BUS 3 26*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_CS 0 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_BOARD_SETTINGS \ 29*4882a593Smuzhiyun "board_type=aristainetos7@1\0" \ 30*4882a593Smuzhiyun "mtdids=nand0=gpmi-nand,nor0=spi3.0\0" \ 31*4882a593Smuzhiyun "mtdparts=mtdparts=spi3.0:832k(u-boot),64k(env),64k(env-red)," \ 32*4882a593Smuzhiyun "-(rescue-system);gpmi-nand:-(ubi)\0" \ 33*4882a593Smuzhiyun "addmisc=setenv bootargs ${bootargs} consoleblank=0\0" \ 34*4882a593Smuzhiyun "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 35*4882a593Smuzhiyun "ubiargs=setenv bootargs console=${console},${baudrate} " \ 36*4882a593Smuzhiyun "ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 " \ 37*4882a593Smuzhiyun "ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \ 38*4882a593Smuzhiyun "ubifsload ${fit_addr_r} /boot/system.itb; " \ 39*4882a593Smuzhiyun "imi ${fit_addr_r}\0 " 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15) 42*4882a593Smuzhiyun #define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(3, 31) 43*4882a593Smuzhiyun #define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #include "aristainetos-common.h" 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #endif /* __ARISTAINETOS_CONFIG_H */ 48