1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2009-2011 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* 8*4882a593Smuzhiyun * P4080 DS board configuration file 9*4882a593Smuzhiyun * Also supports P4040 DS 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun #define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define CONFIG_PCIE3 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define CONFIG_SATA_SIL 16*4882a593Smuzhiyun #define CONFIG_SYS_SATA_MAX_DEVICE 2 17*4882a593Smuzhiyun #define CONFIG_LIBATA 18*4882a593Smuzhiyun #define CONFIG_LBA48 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define CONFIG_SYS_SRIO 21*4882a593Smuzhiyun #define CONFIG_SRIO1 /* SRIO port 1 */ 22*4882a593Smuzhiyun #define CONFIG_SRIO2 /* SRIO port 2 */ 23*4882a593Smuzhiyun #define CONFIG_SRIO_PCIE_BOOT_MASTER 24*4882a593Smuzhiyun #define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #include "corenet_ds.h" 27