1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2016 Chen-Yu Tsai <wens@csie.org> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * X-Powers AXP809 Power Management IC driver 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #define AXP809_CHIP_ID 0x03 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL1 0x10 12*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL1_DC5LDO_EN (1 << 0) 13*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL1_DCDC1_EN (1 << 1) 14*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL1_DCDC2_EN (1 << 2) 15*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL1_DCDC3_EN (1 << 3) 16*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL1_DCDC4_EN (1 << 4) 17*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL1_DCDC5_EN (1 << 5) 18*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL1_ALDO1_EN (1 << 6) 19*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL1_ALDO2_EN (1 << 7) 20*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL2 0x12 21*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL2_ELDO1_EN (1 << 0) 22*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL2_ELDO2_EN (1 << 1) 23*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL2_ELDO3_EN (1 << 2) 24*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL2_DLDO1_EN (1 << 3) 25*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL2_DLDO2_EN (1 << 4) 26*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL2_ALDO3_EN (1 << 5) 27*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL2_SWOUT_EN (1 << 6) 28*4882a593Smuzhiyun #define AXP809_OUTPUT_CTRL2_DC1SW_EN (1 << 7) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define AXP809_DLDO1_CTRL 0x15 31*4882a593Smuzhiyun #define AXP809_DLDO2_CTRL 0x16 32*4882a593Smuzhiyun #define AXP809_ELDO1_CTRL 0x19 33*4882a593Smuzhiyun #define AXP809_ELDO2_CTRL 0x1a 34*4882a593Smuzhiyun #define AXP809_ELDO3_CTRL 0x1b 35*4882a593Smuzhiyun #define AXP809_DC5LDO_CTRL 0x1c 36*4882a593Smuzhiyun #define AXP809_DCDC1_CTRL 0x21 37*4882a593Smuzhiyun #define AXP809_DCDC2_CTRL 0x22 38*4882a593Smuzhiyun #define AXP809_DCDC3_CTRL 0x23 39*4882a593Smuzhiyun #define AXP809_DCDC4_CTRL 0x24 40*4882a593Smuzhiyun #define AXP809_DCDC5_CTRL 0x25 41*4882a593Smuzhiyun #define AXP809_ALDO1_CTRL 0x28 42*4882a593Smuzhiyun #define AXP809_ALDO2_CTRL 0x29 43*4882a593Smuzhiyun #define AXP809_ALDO3_CTRL 0x2a 44*4882a593Smuzhiyun #define AXP809_SHUTDOWN 0x32 45*4882a593Smuzhiyun #define AXP809_SHUTDOWN_POWEROFF (1 << 7) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* For axp_gpio.c */ 48*4882a593Smuzhiyun #define AXP_POWER_STATUS 0x00 49*4882a593Smuzhiyun #define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5) 50*4882a593Smuzhiyun #define AXP_VBUS_IPSOUT 0x30 51*4882a593Smuzhiyun #define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) 52*4882a593Smuzhiyun #define AXP_MISC_CTRL 0x8f 53*4882a593Smuzhiyun #define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4) 54*4882a593Smuzhiyun #define AXP_GPIO0_CTRL 0x90 55*4882a593Smuzhiyun #define AXP_GPIO1_CTRL 0x92 56*4882a593Smuzhiyun #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ 57*4882a593Smuzhiyun #define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ 58*4882a593Smuzhiyun #define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ 59*4882a593Smuzhiyun #define AXP_GPIO_STATE 0x94 60*4882a593Smuzhiyun #define AXP_GPIO_STATE_OFFSET 0 61