1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun enum axp152_reg { 8*4882a593Smuzhiyun AXP152_CHIP_VERSION = 0x3, 9*4882a593Smuzhiyun AXP152_DCDC2_VOLTAGE = 0x23, 10*4882a593Smuzhiyun AXP152_DCDC3_VOLTAGE = 0x27, 11*4882a593Smuzhiyun AXP152_DCDC4_VOLTAGE = 0x2B, 12*4882a593Smuzhiyun AXP152_LDO2_VOLTAGE = 0x2A, 13*4882a593Smuzhiyun AXP152_SHUTDOWN = 0x32, 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define AXP152_POWEROFF (1 << 7) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* For axp_gpio.c */ 19*4882a593Smuzhiyun #define AXP_GPIO0_CTRL 0x90 20*4882a593Smuzhiyun #define AXP_GPIO1_CTRL 0x91 21*4882a593Smuzhiyun #define AXP_GPIO2_CTRL 0x92 22*4882a593Smuzhiyun #define AXP_GPIO3_CTRL 0x93 23*4882a593Smuzhiyun #define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ 24*4882a593Smuzhiyun #define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ 25*4882a593Smuzhiyun #define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ 26*4882a593Smuzhiyun #define AXP_GPIO_STATE 0x97 27*4882a593Smuzhiyun #define AXP_GPIO_STATE_OFFSET 0 28