1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2000 3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* 9*4882a593Smuzhiyun * Most of the following information was derived from the document 10*4882a593Smuzhiyun * "Information Technology - AT Attachment-3 Interface (ATA-3)" 11*4882a593Smuzhiyun * which can be found at: 12*4882a593Smuzhiyun * http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip 13*4882a593Smuzhiyun * ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP 14*4882a593Smuzhiyun * ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifndef _ATA_H 18*4882a593Smuzhiyun #define _ATA_H 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include <libata.h> 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* Register addressing depends on the hardware design; for instance, 23*4882a593Smuzhiyun * 8-bit (register) and 16-bit (data) accesses might use different 24*4882a593Smuzhiyun * address spaces. This is implemented by the following definitions. 25*4882a593Smuzhiyun */ 26*4882a593Smuzhiyun #ifndef CONFIG_SYS_ATA_STRIDE 27*4882a593Smuzhiyun #define CONFIG_SYS_ATA_STRIDE 1 28*4882a593Smuzhiyun #endif 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define ATA_IO_DATA(x) (CONFIG_SYS_ATA_DATA_OFFSET+((x) * CONFIG_SYS_ATA_STRIDE)) 31*4882a593Smuzhiyun #define ATA_IO_REG(x) (CONFIG_SYS_ATA_REG_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE)) 32*4882a593Smuzhiyun #define ATA_IO_ALT(x) (CONFIG_SYS_ATA_ALT_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE)) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* 35*4882a593Smuzhiyun * I/O Register Descriptions 36*4882a593Smuzhiyun */ 37*4882a593Smuzhiyun #define ATA_DATA_REG ATA_IO_DATA(0) 38*4882a593Smuzhiyun #define ATA_ERROR_REG ATA_IO_REG(1) 39*4882a593Smuzhiyun #define ATA_SECT_CNT ATA_IO_REG(2) 40*4882a593Smuzhiyun #define ATA_SECT_NUM ATA_IO_REG(3) 41*4882a593Smuzhiyun #define ATA_CYL_LOW ATA_IO_REG(4) 42*4882a593Smuzhiyun #define ATA_CYL_HIGH ATA_IO_REG(5) 43*4882a593Smuzhiyun #define ATA_DEV_HD ATA_IO_REG(6) 44*4882a593Smuzhiyun #define ATA_COMMAND ATA_IO_REG(7) 45*4882a593Smuzhiyun #define ATA_DATA_EVEN ATA_IO_REG(8) 46*4882a593Smuzhiyun #define ATA_DATA_ODD ATA_IO_REG(9) 47*4882a593Smuzhiyun #define ATA_STATUS ATA_COMMAND 48*4882a593Smuzhiyun #define ATA_DEV_CTL ATA_IO_ALT(6) 49*4882a593Smuzhiyun #define ATA_LBA_LOW ATA_SECT_NUM 50*4882a593Smuzhiyun #define ATA_LBA_MID ATA_CYL_LOW 51*4882a593Smuzhiyun #define ATA_LBA_HIGH ATA_CYL_HIGH 52*4882a593Smuzhiyun #define ATA_LBA_SEL ATA_DEV_CTL 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* 55*4882a593Smuzhiyun * Status register bits 56*4882a593Smuzhiyun */ 57*4882a593Smuzhiyun #define ATA_STAT_BUSY 0x80 /* Device Busy */ 58*4882a593Smuzhiyun #define ATA_STAT_READY 0x40 /* Device Ready */ 59*4882a593Smuzhiyun #define ATA_STAT_FAULT 0x20 /* Device Fault */ 60*4882a593Smuzhiyun #define ATA_STAT_SEEK 0x10 /* Device Seek Complete */ 61*4882a593Smuzhiyun #define ATA_STAT_DRQ 0x08 /* Data Request (ready) */ 62*4882a593Smuzhiyun #define ATA_STAT_CORR 0x04 /* Corrected Data Error */ 63*4882a593Smuzhiyun #define ATA_STAT_INDEX 0x02 /* Vendor specific */ 64*4882a593Smuzhiyun #define ATA_STAT_ERR 0x01 /* Error */ 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* 67*4882a593Smuzhiyun * Device / Head Register Bits 68*4882a593Smuzhiyun */ 69*4882a593Smuzhiyun #ifndef ATA_DEVICE 70*4882a593Smuzhiyun #define ATA_DEVICE(x) ((x & 1)<<4) 71*4882a593Smuzhiyun #endif /* ATA_DEVICE */ 72*4882a593Smuzhiyun #define ATA_LBA 0xE0 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* 75*4882a593Smuzhiyun * ATA Commands (only mandatory commands listed here) 76*4882a593Smuzhiyun */ 77*4882a593Smuzhiyun #define ATA_CMD_READ 0x20 /* Read Sectors (with retries) */ 78*4882a593Smuzhiyun #define ATA_CMD_READN 0x21 /* Read Sectors ( no retries) */ 79*4882a593Smuzhiyun #define ATA_CMD_WRITE 0x30 /* Write Sectores (with retries)*/ 80*4882a593Smuzhiyun #define ATA_CMD_WRITEN 0x31 /* Write Sectors ( no retries)*/ 81*4882a593Smuzhiyun #define ATA_CMD_VRFY 0x40 /* Read Verify (with retries) */ 82*4882a593Smuzhiyun #define ATA_CMD_VRFYN 0x41 /* Read verify ( no retries) */ 83*4882a593Smuzhiyun #define ATA_CMD_SEEK 0x70 /* Seek */ 84*4882a593Smuzhiyun #define ATA_CMD_DIAG 0x90 /* Execute Device Diagnostic */ 85*4882a593Smuzhiyun #define ATA_CMD_INIT 0x91 /* Initialize Device Parameters */ 86*4882a593Smuzhiyun #define ATA_CMD_RD_MULT 0xC4 /* Read Multiple */ 87*4882a593Smuzhiyun #define ATA_CMD_WR_MULT 0xC5 /* Write Multiple */ 88*4882a593Smuzhiyun #define ATA_CMD_SETMULT 0xC6 /* Set Multiple Mode */ 89*4882a593Smuzhiyun #define ATA_CMD_RD_DMA 0xC8 /* Read DMA (with retries) */ 90*4882a593Smuzhiyun #define ATA_CMD_RD_DMAN 0xC9 /* Read DMS ( no retries) */ 91*4882a593Smuzhiyun #define ATA_CMD_WR_DMA 0xCA /* Write DMA (with retries) */ 92*4882a593Smuzhiyun #define ATA_CMD_WR_DMAN 0xCB /* Write DMA ( no retires) */ 93*4882a593Smuzhiyun #define ATA_CMD_IDENT 0xEC /* Identify Device */ 94*4882a593Smuzhiyun #define ATA_CMD_SETF 0xEF /* Set Features */ 95*4882a593Smuzhiyun #define ATA_CMD_CHK_PWR 0xE5 /* Check Power Mode */ 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun #define ATA_CMD_READ_EXT 0x24 /* Read Sectors (with retries) with 48bit addressing */ 98*4882a593Smuzhiyun #define ATA_CMD_WRITE_EXT 0x34 /* Write Sectores (with retries) with 48bit addressing */ 99*4882a593Smuzhiyun #define ATA_CMD_VRFY_EXT 0x42 /* Read Verify (with retries) with 48bit addressing */ 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define ATA_CMD_FLUSH 0xE7 /* Flush drive cache */ 102*4882a593Smuzhiyun #define ATA_CMD_FLUSH_EXT 0xEA /* Flush drive cache, with 48bit addressing */ 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /* 105*4882a593Smuzhiyun * ATAPI Commands 106*4882a593Smuzhiyun */ 107*4882a593Smuzhiyun #define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */ 108*4882a593Smuzhiyun #define ATAPI_CMD_PACKET 0xA0 /* Packed Command */ 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun #define ATAPI_CMD_INQUIRY 0x12 112*4882a593Smuzhiyun #define ATAPI_CMD_REQ_SENSE 0x03 113*4882a593Smuzhiyun #define ATAPI_CMD_READ_CAP 0x25 114*4882a593Smuzhiyun #define ATAPI_CMD_START_STOP 0x1B 115*4882a593Smuzhiyun #define ATAPI_CMD_READ_12 0xA8 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun #define ATA_GET_ERR() inb(ATA_STATUS) 119*4882a593Smuzhiyun #define ATA_GET_STAT() inb(ATA_STATUS) 120*4882a593Smuzhiyun #define ATA_OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good)) 121*4882a593Smuzhiyun #define ATA_BAD_R_STAT (ATA_STAT_BUSY | ATA_STAT_ERR) 122*4882a593Smuzhiyun #define ATA_BAD_W_STAT (ATA_BAD_R_STAT | ATA_STAT_FAULT) 123*4882a593Smuzhiyun #define ATA_BAD_STAT (ATA_BAD_R_STAT | ATA_STAT_DRQ) 124*4882a593Smuzhiyun #define ATA_DRIVE_READY (ATA_READY_STAT | ATA_STAT_SEEK) 125*4882a593Smuzhiyun #define ATA_DATA_READY (ATA_STAT_DRQ) 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun #define ATA_BLOCKSIZE 512 /* bytes */ 128*4882a593Smuzhiyun #define ATA_BLOCKSHIFT 9 /* 2 ^ ATA_BLOCKSIZESHIFT = 512 */ 129*4882a593Smuzhiyun #define ATA_SECTORWORDS (512 / sizeof(uint32_t)) 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #ifndef ATA_RESET_TIME 132*4882a593Smuzhiyun #define ATA_RESET_TIME 60 /* spec allows up to 31 seconds */ 133*4882a593Smuzhiyun #endif 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */ 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun /* 138*4882a593Smuzhiyun * structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec 139*4882a593Smuzhiyun */ 140*4882a593Smuzhiyun typedef struct hd_driveid { 141*4882a593Smuzhiyun unsigned short config; /* lots of obsolete bit flags */ 142*4882a593Smuzhiyun unsigned short cyls; /* "physical" cyls */ 143*4882a593Smuzhiyun unsigned short reserved2; /* reserved (word 2) */ 144*4882a593Smuzhiyun unsigned short heads; /* "physical" heads */ 145*4882a593Smuzhiyun unsigned short track_bytes; /* unformatted bytes per track */ 146*4882a593Smuzhiyun unsigned short sector_bytes; /* unformatted bytes per sector */ 147*4882a593Smuzhiyun unsigned short sectors; /* "physical" sectors per track */ 148*4882a593Smuzhiyun unsigned short vendor0; /* vendor unique */ 149*4882a593Smuzhiyun unsigned short vendor1; /* vendor unique */ 150*4882a593Smuzhiyun unsigned short vendor2; /* vendor unique */ 151*4882a593Smuzhiyun unsigned char serial_no[20]; /* 0 = not_specified */ 152*4882a593Smuzhiyun unsigned short buf_type; 153*4882a593Smuzhiyun unsigned short buf_size; /* 512 byte increments; 0 = not_specified */ 154*4882a593Smuzhiyun unsigned short ecc_bytes; /* for r/w long cmds; 0 = not_specified */ 155*4882a593Smuzhiyun unsigned char fw_rev[8]; /* 0 = not_specified */ 156*4882a593Smuzhiyun unsigned char model[40]; /* 0 = not_specified */ 157*4882a593Smuzhiyun unsigned char max_multsect; /* 0=not_implemented */ 158*4882a593Smuzhiyun unsigned char vendor3; /* vendor unique */ 159*4882a593Smuzhiyun unsigned short dword_io; /* 0=not_implemented; 1=implemented */ 160*4882a593Smuzhiyun unsigned char vendor4; /* vendor unique */ 161*4882a593Smuzhiyun unsigned char capability; /* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/ 162*4882a593Smuzhiyun unsigned short reserved50; /* reserved (word 50) */ 163*4882a593Smuzhiyun unsigned char vendor5; /* vendor unique */ 164*4882a593Smuzhiyun unsigned char tPIO; /* 0=slow, 1=medium, 2=fast */ 165*4882a593Smuzhiyun unsigned char vendor6; /* vendor unique */ 166*4882a593Smuzhiyun unsigned char tDMA; /* 0=slow, 1=medium, 2=fast */ 167*4882a593Smuzhiyun unsigned short field_valid; /* bits 0:cur_ok 1:eide_ok */ 168*4882a593Smuzhiyun unsigned short cur_cyls; /* logical cylinders */ 169*4882a593Smuzhiyun unsigned short cur_heads; /* logical heads */ 170*4882a593Smuzhiyun unsigned short cur_sectors; /* logical sectors per track */ 171*4882a593Smuzhiyun unsigned short cur_capacity0; /* logical total sectors on drive */ 172*4882a593Smuzhiyun unsigned short cur_capacity1; /* (2 words, misaligned int) */ 173*4882a593Smuzhiyun unsigned char multsect; /* current multiple sector count */ 174*4882a593Smuzhiyun unsigned char multsect_valid; /* when (bit0==1) multsect is ok */ 175*4882a593Smuzhiyun unsigned int lba_capacity; /* total number of sectors */ 176*4882a593Smuzhiyun unsigned short dma_1word; /* single-word dma info */ 177*4882a593Smuzhiyun unsigned short dma_mword; /* multiple-word dma info */ 178*4882a593Smuzhiyun unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */ 179*4882a593Smuzhiyun unsigned short eide_dma_min; /* min mword dma cycle time (ns) */ 180*4882a593Smuzhiyun unsigned short eide_dma_time; /* recommended mword dma cycle time (ns) */ 181*4882a593Smuzhiyun unsigned short eide_pio; /* min cycle time (ns), no IORDY */ 182*4882a593Smuzhiyun unsigned short eide_pio_iordy; /* min cycle time (ns), with IORDY */ 183*4882a593Smuzhiyun unsigned short words69_70[2]; /* reserved words 69-70 */ 184*4882a593Smuzhiyun unsigned short words71_74[4]; /* reserved words 71-74 */ 185*4882a593Smuzhiyun unsigned short queue_depth; /* */ 186*4882a593Smuzhiyun unsigned short words76_79[4]; /* reserved words 76-79 */ 187*4882a593Smuzhiyun unsigned short major_rev_num; /* */ 188*4882a593Smuzhiyun unsigned short minor_rev_num; /* */ 189*4882a593Smuzhiyun unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */ 190*4882a593Smuzhiyun unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/ 191*4882a593Smuzhiyun unsigned short cfsse; /* command set-feature supported extensions */ 192*4882a593Smuzhiyun unsigned short cfs_enable_1; /* command set-feature enabled */ 193*4882a593Smuzhiyun unsigned short cfs_enable_2; /* command set-feature enabled */ 194*4882a593Smuzhiyun unsigned short csf_default; /* command set-feature default */ 195*4882a593Smuzhiyun unsigned short dma_ultra; /* */ 196*4882a593Smuzhiyun unsigned short word89; /* reserved (word 89) */ 197*4882a593Smuzhiyun unsigned short word90; /* reserved (word 90) */ 198*4882a593Smuzhiyun unsigned short CurAPMvalues; /* current APM values */ 199*4882a593Smuzhiyun unsigned short word92; /* reserved (word 92) */ 200*4882a593Smuzhiyun unsigned short hw_config; /* hardware config */ 201*4882a593Smuzhiyun unsigned short words94_99[6];/* reserved words 94-99 */ 202*4882a593Smuzhiyun /*unsigned long long lba48_capacity; /--* 4 16bit values containing lba 48 total number of sectors */ 203*4882a593Smuzhiyun unsigned short lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */ 204*4882a593Smuzhiyun unsigned short words104_125[22];/* reserved words 104-125 */ 205*4882a593Smuzhiyun unsigned short last_lun; /* reserved (word 126) */ 206*4882a593Smuzhiyun unsigned short word127; /* reserved (word 127) */ 207*4882a593Smuzhiyun unsigned short dlf; /* device lock function 208*4882a593Smuzhiyun * 15:9 reserved 209*4882a593Smuzhiyun * 8 security level 1:max 0:high 210*4882a593Smuzhiyun * 7:6 reserved 211*4882a593Smuzhiyun * 5 enhanced erase 212*4882a593Smuzhiyun * 4 expire 213*4882a593Smuzhiyun * 3 frozen 214*4882a593Smuzhiyun * 2 locked 215*4882a593Smuzhiyun * 1 en/disabled 216*4882a593Smuzhiyun * 0 capability 217*4882a593Smuzhiyun */ 218*4882a593Smuzhiyun unsigned short csfo; /* current set features options 219*4882a593Smuzhiyun * 15:4 reserved 220*4882a593Smuzhiyun * 3 auto reassign 221*4882a593Smuzhiyun * 2 reverting 222*4882a593Smuzhiyun * 1 read-look-ahead 223*4882a593Smuzhiyun * 0 write cache 224*4882a593Smuzhiyun */ 225*4882a593Smuzhiyun unsigned short words130_155[26];/* reserved vendor words 130-155 */ 226*4882a593Smuzhiyun unsigned short word156; 227*4882a593Smuzhiyun unsigned short words157_159[3];/* reserved vendor words 157-159 */ 228*4882a593Smuzhiyun unsigned short words160_162[3];/* reserved words 160-162 */ 229*4882a593Smuzhiyun unsigned short cf_advanced_caps; 230*4882a593Smuzhiyun unsigned short words164_255[92];/* reserved words 164-255 */ 231*4882a593Smuzhiyun } hd_driveid_t; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun /* 235*4882a593Smuzhiyun * PIO Mode Configuration 236*4882a593Smuzhiyun * 237*4882a593Smuzhiyun * See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21 238*4882a593Smuzhiyun */ 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun typedef struct { 241*4882a593Smuzhiyun unsigned int t_setup; /* Setup Time in [ns] or clocks */ 242*4882a593Smuzhiyun unsigned int t_length; /* Length Time in [ns] or clocks */ 243*4882a593Smuzhiyun unsigned int t_hold; /* Hold Time in [ns] or clocks */ 244*4882a593Smuzhiyun } 245*4882a593Smuzhiyun pio_config_t; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun #define IDE_MAX_PIO_MODE 4 /* max suppurted PIO mode */ 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun /* ------------------------------------------------------------------------- */ 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun #endif /* _ATA_H */ 252