xref: /OK3568_Linux_fs/u-boot/examples/standalone/smc91111_eeprom.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2004
3*4882a593Smuzhiyun  * Robin Getz rgetz@blacfin.uclinux.org
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Heavily borrowed from the following peoples GPL'ed software:
8*4882a593Smuzhiyun  *  - Wolfgang Denk, DENX Software Engineering, wd@denx.de
9*4882a593Smuzhiyun  *       Das U-Boot
10*4882a593Smuzhiyun  *  - Ladislav Michl ladis@linux-mips.org
11*4882a593Smuzhiyun  *       A rejected patch on the U-Boot mailing list
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <common.h>
15*4882a593Smuzhiyun #include <exports.h>
16*4882a593Smuzhiyun #include "../drivers/net/smc91111.h"
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #ifndef SMC91111_EEPROM_INIT
19*4882a593Smuzhiyun # define SMC91111_EEPROM_INIT()
20*4882a593Smuzhiyun #endif
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
23*4882a593Smuzhiyun #define EEPROM		0x1
24*4882a593Smuzhiyun #define MAC		0x2
25*4882a593Smuzhiyun #define UNKNOWN		0x4
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun void dump_reg (struct eth_device *dev);
28*4882a593Smuzhiyun void dump_eeprom (struct eth_device *dev);
29*4882a593Smuzhiyun int write_eeprom_reg (struct eth_device *dev, int value, int reg);
30*4882a593Smuzhiyun void copy_from_eeprom (struct eth_device *dev);
31*4882a593Smuzhiyun void print_MAC (struct eth_device *dev);
32*4882a593Smuzhiyun int read_eeprom_reg (struct eth_device *dev, int reg);
33*4882a593Smuzhiyun void print_macaddr (struct eth_device *dev);
34*4882a593Smuzhiyun 
smc91111_eeprom(int argc,char * const argv[])35*4882a593Smuzhiyun int smc91111_eeprom (int argc, char * const argv[])
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	int c, i, j, done, line, reg, value, start, what;
38*4882a593Smuzhiyun 	char input[50];
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	struct eth_device dev;
41*4882a593Smuzhiyun 	dev.iobase = CONFIG_SMC91111_BASE;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	/* Print the ABI version */
44*4882a593Smuzhiyun 	app_startup (argv);
45*4882a593Smuzhiyun 	if (XF_VERSION != (int) get_version ()) {
46*4882a593Smuzhiyun 		printf ("Expects ABI version %d\n", XF_VERSION);
47*4882a593Smuzhiyun 		printf ("Actual U-Boot ABI version %d\n",
48*4882a593Smuzhiyun 			(int) get_version ());
49*4882a593Smuzhiyun 		printf ("Can't run\n\n");
50*4882a593Smuzhiyun 		return (0);
51*4882a593Smuzhiyun 	}
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	SMC91111_EEPROM_INIT();
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) {
56*4882a593Smuzhiyun 		printf ("Can't find SMSC91111\n");
57*4882a593Smuzhiyun 		return (0);
58*4882a593Smuzhiyun 	}
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	done = 0;
61*4882a593Smuzhiyun 	what = UNKNOWN;
62*4882a593Smuzhiyun 	printf ("\n");
63*4882a593Smuzhiyun 	while (!done) {
64*4882a593Smuzhiyun 		/* print the prompt */
65*4882a593Smuzhiyun 		printf ("SMC91111> ");
66*4882a593Smuzhiyun 		line = 0;
67*4882a593Smuzhiyun 		i = 0;
68*4882a593Smuzhiyun 		start = 1;
69*4882a593Smuzhiyun 		while (!line) {
70*4882a593Smuzhiyun 			/* Wait for a keystroke */
71*4882a593Smuzhiyun 			while (!tstc ());
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 			c = getc ();
74*4882a593Smuzhiyun 			/* Make Uppercase */
75*4882a593Smuzhiyun 			if (c >= 'Z')
76*4882a593Smuzhiyun 				c -= ('a' - 'A');
77*4882a593Smuzhiyun 			/* printf(" |%02x| ",c); */
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 			switch (c) {
80*4882a593Smuzhiyun 			case '\r':	/* Enter                */
81*4882a593Smuzhiyun 			case '\n':
82*4882a593Smuzhiyun 				input[i] = 0;
83*4882a593Smuzhiyun 				puts ("\r\n");
84*4882a593Smuzhiyun 				line = 1;
85*4882a593Smuzhiyun 				break;
86*4882a593Smuzhiyun 			case '\0':	/* nul                  */
87*4882a593Smuzhiyun 				continue;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 			case 0x03:	/* ^C - break           */
90*4882a593Smuzhiyun 				input[0] = 0;
91*4882a593Smuzhiyun 				i = 0;
92*4882a593Smuzhiyun 				line = 1;
93*4882a593Smuzhiyun 				done = 1;
94*4882a593Smuzhiyun 				break;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 			case 0x5F:
97*4882a593Smuzhiyun 			case 0x08:	/* ^H  - backspace      */
98*4882a593Smuzhiyun 			case 0x7F:	/* DEL - backspace      */
99*4882a593Smuzhiyun 				if (i > 0) {
100*4882a593Smuzhiyun 					puts ("\b \b");
101*4882a593Smuzhiyun 					i--;
102*4882a593Smuzhiyun 				}
103*4882a593Smuzhiyun 				break;
104*4882a593Smuzhiyun 			default:
105*4882a593Smuzhiyun 				if (start) {
106*4882a593Smuzhiyun 					if ((c == 'W') || (c == 'D')
107*4882a593Smuzhiyun 					    || (c == 'M') || (c == 'C')
108*4882a593Smuzhiyun 					    || (c == 'P')) {
109*4882a593Smuzhiyun 						putc (c);
110*4882a593Smuzhiyun 						input[i] = c;
111*4882a593Smuzhiyun 						if (i <= 45)
112*4882a593Smuzhiyun 							i++;
113*4882a593Smuzhiyun 						start = 0;
114*4882a593Smuzhiyun 					}
115*4882a593Smuzhiyun 				} else {
116*4882a593Smuzhiyun 					if ((c >= '0' && c <= '9')
117*4882a593Smuzhiyun 					    || (c >= 'A' && c <= 'F')
118*4882a593Smuzhiyun 					    || (c == 'E') || (c == 'M')
119*4882a593Smuzhiyun 					    || (c == ' ')) {
120*4882a593Smuzhiyun 						putc (c);
121*4882a593Smuzhiyun 						input[i] = c;
122*4882a593Smuzhiyun 						if (i <= 45)
123*4882a593Smuzhiyun 							i++;
124*4882a593Smuzhiyun 						break;
125*4882a593Smuzhiyun 					}
126*4882a593Smuzhiyun 				}
127*4882a593Smuzhiyun 				break;
128*4882a593Smuzhiyun 			}
129*4882a593Smuzhiyun 		}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 		for (; i < 49; i++)
132*4882a593Smuzhiyun 			input[i] = 0;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 		switch (input[0]) {
135*4882a593Smuzhiyun 		case ('W'):
136*4882a593Smuzhiyun 			/* Line should be w reg value */
137*4882a593Smuzhiyun 			i = 0;
138*4882a593Smuzhiyun 			reg = 0;
139*4882a593Smuzhiyun 			value = 0;
140*4882a593Smuzhiyun 			/* Skip to the next space or end) */
141*4882a593Smuzhiyun 			while ((input[i] != ' ') && (input[i] != 0))
142*4882a593Smuzhiyun 				i++;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 			if (input[i] != 0)
145*4882a593Smuzhiyun 				i++;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 			/* Are we writing to EEPROM or MAC */
148*4882a593Smuzhiyun 			switch (input[i]) {
149*4882a593Smuzhiyun 			case ('E'):
150*4882a593Smuzhiyun 				what = EEPROM;
151*4882a593Smuzhiyun 				break;
152*4882a593Smuzhiyun 			case ('M'):
153*4882a593Smuzhiyun 				what = MAC;
154*4882a593Smuzhiyun 				break;
155*4882a593Smuzhiyun 			default:
156*4882a593Smuzhiyun 				what = UNKNOWN;
157*4882a593Smuzhiyun 				break;
158*4882a593Smuzhiyun 			}
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 			/* skip to the next space or end */
161*4882a593Smuzhiyun 			while ((input[i] != ' ') && (input[i] != 0))
162*4882a593Smuzhiyun 				i++;
163*4882a593Smuzhiyun 			if (input[i] != 0)
164*4882a593Smuzhiyun 				i++;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 			/* Find register to write into */
167*4882a593Smuzhiyun 			j = 0;
168*4882a593Smuzhiyun 			while ((input[i] != ' ') && (input[i] != 0)) {
169*4882a593Smuzhiyun 				j = input[i] - 0x30;
170*4882a593Smuzhiyun 				if (j >= 0xA) {
171*4882a593Smuzhiyun 					j -= 0x07;
172*4882a593Smuzhiyun 				}
173*4882a593Smuzhiyun 				reg = (reg * 0x10) + j;
174*4882a593Smuzhiyun 				i++;
175*4882a593Smuzhiyun 			}
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 			while ((input[i] != ' ') && (input[i] != 0))
178*4882a593Smuzhiyun 				i++;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 			if (input[i] != 0)
181*4882a593Smuzhiyun 				i++;
182*4882a593Smuzhiyun 			else
183*4882a593Smuzhiyun 				what = UNKNOWN;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 			/* Get the value to write */
186*4882a593Smuzhiyun 			j = 0;
187*4882a593Smuzhiyun 			while ((input[i] != ' ') && (input[i] != 0)) {
188*4882a593Smuzhiyun 				j = input[i] - 0x30;
189*4882a593Smuzhiyun 				if (j >= 0xA) {
190*4882a593Smuzhiyun 					j -= 0x07;
191*4882a593Smuzhiyun 				}
192*4882a593Smuzhiyun 				value = (value * 0x10) + j;
193*4882a593Smuzhiyun 				i++;
194*4882a593Smuzhiyun 			}
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 			switch (what) {
197*4882a593Smuzhiyun 			case 1:
198*4882a593Smuzhiyun 				printf ("Writing EEPROM register %02x with %04x\n", reg, value);
199*4882a593Smuzhiyun 				write_eeprom_reg (&dev, value, reg);
200*4882a593Smuzhiyun 				break;
201*4882a593Smuzhiyun 			case 2:
202*4882a593Smuzhiyun 				printf ("Writing MAC register bank %i, reg %02x with %04x\n", reg >> 4, reg & 0xE, value);
203*4882a593Smuzhiyun 				SMC_SELECT_BANK (&dev, reg >> 4);
204*4882a593Smuzhiyun 				SMC_outw (&dev, value, reg & 0xE);
205*4882a593Smuzhiyun 				break;
206*4882a593Smuzhiyun 			default:
207*4882a593Smuzhiyun 				printf ("Wrong\n");
208*4882a593Smuzhiyun 				break;
209*4882a593Smuzhiyun 			}
210*4882a593Smuzhiyun 			break;
211*4882a593Smuzhiyun 		case ('D'):
212*4882a593Smuzhiyun 			dump_eeprom (&dev);
213*4882a593Smuzhiyun 			break;
214*4882a593Smuzhiyun 		case ('M'):
215*4882a593Smuzhiyun 			dump_reg (&dev);
216*4882a593Smuzhiyun 			break;
217*4882a593Smuzhiyun 		case ('C'):
218*4882a593Smuzhiyun 			copy_from_eeprom (&dev);
219*4882a593Smuzhiyun 			break;
220*4882a593Smuzhiyun 		case ('P'):
221*4882a593Smuzhiyun 			print_macaddr (&dev);
222*4882a593Smuzhiyun 			break;
223*4882a593Smuzhiyun 		default:
224*4882a593Smuzhiyun 			break;
225*4882a593Smuzhiyun 		}
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	}
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	return (0);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun 
copy_from_eeprom(struct eth_device * dev)232*4882a593Smuzhiyun void copy_from_eeprom (struct eth_device *dev)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun 	int i;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	SMC_SELECT_BANK (dev, 1);
237*4882a593Smuzhiyun 	SMC_outw (dev, (SMC_inw (dev, CTL_REG) & !CTL_EEPROM_SELECT) |
238*4882a593Smuzhiyun 		CTL_RELOAD, CTL_REG);
239*4882a593Smuzhiyun 	i = 100;
240*4882a593Smuzhiyun 	while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --i)
241*4882a593Smuzhiyun 		udelay (100);
242*4882a593Smuzhiyun 	if (i == 0) {
243*4882a593Smuzhiyun 		printf ("Timeout Refreshing EEPROM registers\n");
244*4882a593Smuzhiyun 	} else {
245*4882a593Smuzhiyun 		printf ("EEPROM contents copied to MAC\n");
246*4882a593Smuzhiyun 	}
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
print_macaddr(struct eth_device * dev)250*4882a593Smuzhiyun void print_macaddr (struct eth_device *dev)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	int i, j, k, mac[6];
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	printf ("Current MAC Address in SMSC91111 ");
255*4882a593Smuzhiyun 	SMC_SELECT_BANK (dev, 1);
256*4882a593Smuzhiyun 	for (i = 0; i < 5; i++) {
257*4882a593Smuzhiyun 		printf ("%02x:", SMC_inb (dev, ADDR0_REG + i));
258*4882a593Smuzhiyun 	}
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	printf ("%02x\n", SMC_inb (dev, ADDR0_REG + 5));
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	i = 0;
263*4882a593Smuzhiyun 	for (j = 0x20; j < 0x23; j++) {
264*4882a593Smuzhiyun 		k = read_eeprom_reg (dev, j);
265*4882a593Smuzhiyun 		mac[i] = k & 0xFF;
266*4882a593Smuzhiyun 		i++;
267*4882a593Smuzhiyun 		mac[i] = k >> 8;
268*4882a593Smuzhiyun 		i++;
269*4882a593Smuzhiyun 	}
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	printf ("Current MAC Address in EEPROM    ");
272*4882a593Smuzhiyun 	for (i = 0; i < 5; i++)
273*4882a593Smuzhiyun 		printf ("%02x:", mac[i]);
274*4882a593Smuzhiyun 	printf ("%02x\n", mac[5]);
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun }
dump_eeprom(struct eth_device * dev)277*4882a593Smuzhiyun void dump_eeprom (struct eth_device *dev)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun 	int j, k;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	printf ("IOS2-0    ");
282*4882a593Smuzhiyun 	for (j = 0; j < 8; j++) {
283*4882a593Smuzhiyun 		printf ("%03x     ", j);
284*4882a593Smuzhiyun 	}
285*4882a593Smuzhiyun 	printf ("\n");
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	for (k = 0; k < 4; k++) {
288*4882a593Smuzhiyun 		if (k == 0)
289*4882a593Smuzhiyun 			printf ("CONFIG ");
290*4882a593Smuzhiyun 		if (k == 1)
291*4882a593Smuzhiyun 			printf ("BASE   ");
292*4882a593Smuzhiyun 		if ((k == 2) || (k == 3))
293*4882a593Smuzhiyun 			printf ("       ");
294*4882a593Smuzhiyun 		for (j = 0; j < 0x20; j += 4) {
295*4882a593Smuzhiyun 			printf ("%02x:%04x ", j + k,
296*4882a593Smuzhiyun 				read_eeprom_reg (dev, j + k));
297*4882a593Smuzhiyun 		}
298*4882a593Smuzhiyun 		printf ("\n");
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	for (j = 0x20; j < 0x40; j++) {
302*4882a593Smuzhiyun 		if ((j & 0x07) == 0)
303*4882a593Smuzhiyun 			printf ("\n");
304*4882a593Smuzhiyun 		printf ("%02x:%04x ", j, read_eeprom_reg (dev, j));
305*4882a593Smuzhiyun 	}
306*4882a593Smuzhiyun 	printf ("\n");
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun 
read_eeprom_reg(struct eth_device * dev,int reg)310*4882a593Smuzhiyun int read_eeprom_reg (struct eth_device *dev, int reg)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun 	int timeout;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	SMC_SELECT_BANK (dev, 2);
315*4882a593Smuzhiyun 	SMC_outw (dev, reg, PTR_REG);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	SMC_SELECT_BANK (dev, 1);
318*4882a593Smuzhiyun 	SMC_outw (dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT |
319*4882a593Smuzhiyun 		CTL_RELOAD, CTL_REG);
320*4882a593Smuzhiyun 	timeout = 100;
321*4882a593Smuzhiyun 	while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout)
322*4882a593Smuzhiyun 		udelay (100);
323*4882a593Smuzhiyun 	if (timeout == 0) {
324*4882a593Smuzhiyun 		printf ("Timeout Reading EEPROM register %02x\n", reg);
325*4882a593Smuzhiyun 		return 0;
326*4882a593Smuzhiyun 	}
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	return SMC_inw (dev, GP_REG);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun 
write_eeprom_reg(struct eth_device * dev,int value,int reg)332*4882a593Smuzhiyun int write_eeprom_reg (struct eth_device *dev, int value, int reg)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun 	int timeout;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	SMC_SELECT_BANK (dev, 2);
337*4882a593Smuzhiyun 	SMC_outw (dev, reg, PTR_REG);
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	SMC_SELECT_BANK (dev, 1);
340*4882a593Smuzhiyun 	SMC_outw (dev, value, GP_REG);
341*4882a593Smuzhiyun 	SMC_outw (dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT |
342*4882a593Smuzhiyun 		CTL_STORE, CTL_REG);
343*4882a593Smuzhiyun 	timeout = 100;
344*4882a593Smuzhiyun 	while ((SMC_inw (dev, CTL_REG) & CTL_STORE) && --timeout)
345*4882a593Smuzhiyun 		udelay (100);
346*4882a593Smuzhiyun 	if (timeout == 0) {
347*4882a593Smuzhiyun 		printf ("Timeout Writing EEPROM register %02x\n", reg);
348*4882a593Smuzhiyun 		return 0;
349*4882a593Smuzhiyun 	}
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	return 1;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun 
dump_reg(struct eth_device * dev)355*4882a593Smuzhiyun void dump_reg (struct eth_device *dev)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun 	int i, j;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	printf ("    ");
360*4882a593Smuzhiyun 	for (j = 0; j < 4; j++) {
361*4882a593Smuzhiyun 		printf ("Bank%i ", j);
362*4882a593Smuzhiyun 	}
363*4882a593Smuzhiyun 	printf ("\n");
364*4882a593Smuzhiyun 	for (i = 0; i < 0xF; i += 2) {
365*4882a593Smuzhiyun 		printf ("%02x  ", i);
366*4882a593Smuzhiyun 		for (j = 0; j < 4; j++) {
367*4882a593Smuzhiyun 			SMC_SELECT_BANK (dev, j);
368*4882a593Smuzhiyun 			printf ("%04x  ", SMC_inw (dev, i));
369*4882a593Smuzhiyun 		}
370*4882a593Smuzhiyun 		printf ("\n");
371*4882a593Smuzhiyun 	}
372*4882a593Smuzhiyun }
373