1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2017 Intel Corporation
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun #include <common.h>
7*4882a593Smuzhiyun #include <watchdog.h>
8*4882a593Smuzhiyun #include <asm/scu.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /* Hardware timeout in seconds */
11*4882a593Smuzhiyun #define WDT_PRETIMEOUT 15
12*4882a593Smuzhiyun #define WDT_TIMEOUT_MIN (1 + WDT_PRETIMEOUT)
13*4882a593Smuzhiyun #define WDT_TIMEOUT_MAX 170
14*4882a593Smuzhiyun #define WDT_DEFAULT_TIMEOUT 90
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
17*4882a593Smuzhiyun #define WATCHDOG_HEARTBEAT 60000
18*4882a593Smuzhiyun #else
19*4882a593Smuzhiyun #define WATCHDOG_HEARTBEAT CONFIG_WATCHDOG_TIMEOUT_MSECS
20*4882a593Smuzhiyun #endif
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun enum {
23*4882a593Smuzhiyun SCU_WATCHDOG_START = 0,
24*4882a593Smuzhiyun SCU_WATCHDOG_STOP = 1,
25*4882a593Smuzhiyun SCU_WATCHDOG_KEEPALIVE = 2,
26*4882a593Smuzhiyun SCU_WATCHDOG_SET_ACTION_ON_TIMEOUT = 3,
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun
hw_watchdog_reset(void)29*4882a593Smuzhiyun void hw_watchdog_reset(void)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun static unsigned long last;
32*4882a593Smuzhiyun unsigned long now;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun if (gd->timer)
35*4882a593Smuzhiyun now = timer_get_us();
36*4882a593Smuzhiyun else
37*4882a593Smuzhiyun now = rdtsc() / 1000;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* Do not flood SCU */
40*4882a593Smuzhiyun if (last > now)
41*4882a593Smuzhiyun last = 0;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun if (unlikely((now - last) > (WDT_PRETIMEOUT / 2) * 1000000)) {
44*4882a593Smuzhiyun last = now;
45*4882a593Smuzhiyun scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_KEEPALIVE);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
hw_watchdog_disable(void)49*4882a593Smuzhiyun int hw_watchdog_disable(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun return scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_STOP);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
hw_watchdog_init(void)54*4882a593Smuzhiyun void hw_watchdog_init(void)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun u32 timeout = WATCHDOG_HEARTBEAT / 1000;
57*4882a593Smuzhiyun int in_size;
58*4882a593Smuzhiyun struct ipc_wd_start {
59*4882a593Smuzhiyun u32 pretimeout;
60*4882a593Smuzhiyun u32 timeout;
61*4882a593Smuzhiyun } ipc_wd_start = { timeout - WDT_PRETIMEOUT, timeout };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun * SCU expects the input size for watchdog IPC
65*4882a593Smuzhiyun * to be based on 4 bytes
66*4882a593Smuzhiyun */
67*4882a593Smuzhiyun in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun scu_ipc_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_START,
70*4882a593Smuzhiyun (u32 *)&ipc_wd_start, in_size, NULL, 0);
71*4882a593Smuzhiyun }
72