xref: /OK3568_Linux_fs/u-boot/drivers/video/pwm_backlight.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2016 Google, Inc
3*4882a593Smuzhiyun  * Written by Simon Glass <sjg@chromium.org>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <dm.h>
10*4882a593Smuzhiyun #include <backlight.h>
11*4882a593Smuzhiyun #include <pwm.h>
12*4882a593Smuzhiyun #include <asm/gpio.h>
13*4882a593Smuzhiyun #include <power/regulator.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun struct pwm_backlight_priv {
18*4882a593Smuzhiyun 	struct udevice *reg;
19*4882a593Smuzhiyun 	struct gpio_desc enable;
20*4882a593Smuzhiyun 	struct udevice *pwm;
21*4882a593Smuzhiyun 	uint channel;
22*4882a593Smuzhiyun 	uint period_ns;
23*4882a593Smuzhiyun 	bool polarity;
24*4882a593Smuzhiyun 	uint default_level;
25*4882a593Smuzhiyun 	uint min_level;
26*4882a593Smuzhiyun 	uint max_level;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun 
pwm_backlight_enable(struct udevice * dev)29*4882a593Smuzhiyun static int pwm_backlight_enable(struct udevice *dev)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	struct pwm_backlight_priv *priv = dev_get_priv(dev);
32*4882a593Smuzhiyun 	struct dm_regulator_uclass_platdata *plat;
33*4882a593Smuzhiyun 	uint duty_cycle;
34*4882a593Smuzhiyun 	int ret;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 	if (priv->reg) {
37*4882a593Smuzhiyun 		plat = dev_get_uclass_platdata(priv->reg);
38*4882a593Smuzhiyun 		debug("%s: Enable '%s', regulator '%s'/'%s'\n", __func__,
39*4882a593Smuzhiyun 		      dev->name, priv->reg->name, plat->name);
40*4882a593Smuzhiyun 		ret = regulator_set_enable(priv->reg, true);
41*4882a593Smuzhiyun 		if (ret) {
42*4882a593Smuzhiyun 			debug("%s: Cannot enable regulator for PWM '%s'\n",
43*4882a593Smuzhiyun 			      __func__, dev->name);
44*4882a593Smuzhiyun 			return ret;
45*4882a593Smuzhiyun 		}
46*4882a593Smuzhiyun 		mdelay(120);
47*4882a593Smuzhiyun 	}
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	ret = pwm_set_invert(priv->pwm, priv->channel, priv->polarity);
50*4882a593Smuzhiyun 	if (ret) {
51*4882a593Smuzhiyun 		dev_err(dev, "Failed to invert PWM\n");
52*4882a593Smuzhiyun 		return ret;
53*4882a593Smuzhiyun 	}
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	duty_cycle = priv->period_ns * (priv->default_level - priv->min_level) /
56*4882a593Smuzhiyun 		(priv->max_level - priv->min_level + 1);
57*4882a593Smuzhiyun 	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns,
58*4882a593Smuzhiyun 			     duty_cycle);
59*4882a593Smuzhiyun 	if (ret)
60*4882a593Smuzhiyun 		return ret;
61*4882a593Smuzhiyun 	ret = pwm_set_enable(priv->pwm, priv->channel, true);
62*4882a593Smuzhiyun 	if (ret)
63*4882a593Smuzhiyun 		return ret;
64*4882a593Smuzhiyun 	mdelay(10);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&priv->enable))
67*4882a593Smuzhiyun 		dm_gpio_set_value(&priv->enable, 1);
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	return 0;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
pwm_backlight_disable(struct udevice * dev)72*4882a593Smuzhiyun static int pwm_backlight_disable(struct udevice *dev)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct pwm_backlight_priv *priv = dev_get_priv(dev);
75*4882a593Smuzhiyun 	struct dm_regulator_uclass_platdata *plat;
76*4882a593Smuzhiyun 	int ret;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, 0);
79*4882a593Smuzhiyun 	if (ret)
80*4882a593Smuzhiyun 		return ret;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	/*
83*4882a593Smuzhiyun 	 * Sometimes there is not "enable-gpios", we have to set pwm output
84*4882a593Smuzhiyun 	 * 0% or 100% duty to play role like "enable-gpios", so we should not
85*4882a593Smuzhiyun 	 * disable pwm, let's keep it enabled.
86*4882a593Smuzhiyun 	 */
87*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&priv->enable)) {
88*4882a593Smuzhiyun 		ret = pwm_set_enable(priv->pwm, priv->channel, false);
89*4882a593Smuzhiyun 		if (ret)
90*4882a593Smuzhiyun 			return ret;
91*4882a593Smuzhiyun 	}
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	mdelay(10);
94*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&priv->enable))
95*4882a593Smuzhiyun 		dm_gpio_set_value(&priv->enable, 0);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	if (priv->reg) {
98*4882a593Smuzhiyun 		plat = dev_get_uclass_platdata(priv->reg);
99*4882a593Smuzhiyun 		debug("%s: Disable '%s', regulator '%s'/'%s'\n", __func__,
100*4882a593Smuzhiyun 		      dev->name, priv->reg->name, plat->name);
101*4882a593Smuzhiyun 		ret = regulator_set_enable(priv->reg, false);
102*4882a593Smuzhiyun 		if (ret) {
103*4882a593Smuzhiyun 			debug("%s: Cannot enable regulator for PWM '%s'\n",
104*4882a593Smuzhiyun 			      __func__, dev->name);
105*4882a593Smuzhiyun 		}
106*4882a593Smuzhiyun 		mdelay(120);
107*4882a593Smuzhiyun 	}
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	return 0;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
pwm_backlight_ofdata_to_platdata(struct udevice * dev)112*4882a593Smuzhiyun static int pwm_backlight_ofdata_to_platdata(struct udevice *dev)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	struct pwm_backlight_priv *priv = dev_get_priv(dev);
115*4882a593Smuzhiyun 	struct ofnode_phandle_args args;
116*4882a593Smuzhiyun 	int index, ret, count, len;
117*4882a593Smuzhiyun 	const u32 *cell;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	debug("%s: start\n", __func__);
120*4882a593Smuzhiyun 	ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
121*4882a593Smuzhiyun 					   "power-supply", &priv->reg);
122*4882a593Smuzhiyun 	if (ret)
123*4882a593Smuzhiyun 		debug("%s: Cannot get power supply: ret=%d\n", __func__, ret);
124*4882a593Smuzhiyun 	ret = gpio_request_by_name(dev, "enable-gpios", 0, &priv->enable,
125*4882a593Smuzhiyun 				   GPIOD_IS_OUT);
126*4882a593Smuzhiyun 	if (ret) {
127*4882a593Smuzhiyun 		debug("%s: Warning: cannot get enable GPIO: ret=%d\n",
128*4882a593Smuzhiyun 		      __func__, ret);
129*4882a593Smuzhiyun 		if (ret != -ENOENT)
130*4882a593Smuzhiyun 			return ret;
131*4882a593Smuzhiyun 	}
132*4882a593Smuzhiyun 	ret = dev_read_phandle_with_args(dev, "pwms", "#pwm-cells", 0, 0,
133*4882a593Smuzhiyun 					 &args);
134*4882a593Smuzhiyun 	if (ret) {
135*4882a593Smuzhiyun 		debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret);
136*4882a593Smuzhiyun 		return ret;
137*4882a593Smuzhiyun 	}
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);
140*4882a593Smuzhiyun 	if (ret) {
141*4882a593Smuzhiyun 		debug("%s: Cannot get PWM: ret=%d\n", __func__, ret);
142*4882a593Smuzhiyun 		return ret;
143*4882a593Smuzhiyun 	}
144*4882a593Smuzhiyun 	priv->channel = args.args[0];
145*4882a593Smuzhiyun 	priv->period_ns = args.args[1];
146*4882a593Smuzhiyun 	priv->polarity = args.args[2];
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	index = dev_read_u32_default(dev, "default-brightness-level", 255);
149*4882a593Smuzhiyun 	cell = dev_read_prop(dev, "brightness-levels", &len);
150*4882a593Smuzhiyun 	count = len / sizeof(u32);
151*4882a593Smuzhiyun 	if (cell && count > index) {
152*4882a593Smuzhiyun 		priv->default_level = fdt32_to_cpu(cell[index]);
153*4882a593Smuzhiyun 		priv->max_level = fdt32_to_cpu(cell[count - 1]);
154*4882a593Smuzhiyun 		/* Rockchip dts may use a invert sequence level array */
155*4882a593Smuzhiyun 		if(fdt32_to_cpu(cell[0]) > priv->max_level)
156*4882a593Smuzhiyun 			priv->max_level = fdt32_to_cpu(cell[0]);
157*4882a593Smuzhiyun 	} else {
158*4882a593Smuzhiyun 		priv->default_level = index;
159*4882a593Smuzhiyun 		priv->max_level = 255;
160*4882a593Smuzhiyun 	}
161*4882a593Smuzhiyun 	debug("%s: done\n", __func__);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	return 0;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun 
pwm_backlight_probe(struct udevice * dev)167*4882a593Smuzhiyun static int pwm_backlight_probe(struct udevice *dev)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun 	return 0;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun static const struct backlight_ops pwm_backlight_ops = {
173*4882a593Smuzhiyun 	.enable	= pwm_backlight_enable,
174*4882a593Smuzhiyun 	.disable = pwm_backlight_disable,
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun static const struct udevice_id pwm_backlight_ids[] = {
178*4882a593Smuzhiyun 	{ .compatible = "pwm-backlight" },
179*4882a593Smuzhiyun 	{ }
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun U_BOOT_DRIVER(pwm_backlight) = {
183*4882a593Smuzhiyun 	.name	= "pwm_backlight",
184*4882a593Smuzhiyun 	.id	= UCLASS_PANEL_BACKLIGHT,
185*4882a593Smuzhiyun 	.of_match = pwm_backlight_ids,
186*4882a593Smuzhiyun 	.ops	= &pwm_backlight_ops,
187*4882a593Smuzhiyun 	.ofdata_to_platdata	= pwm_backlight_ofdata_to_platdata,
188*4882a593Smuzhiyun 	.probe		= pwm_backlight_probe,
189*4882a593Smuzhiyun 	.priv_auto_alloc_size	= sizeof(struct pwm_backlight_priv),
190*4882a593Smuzhiyun };
191