1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Hitachi tx18d42vm LVDS LCD panel driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <asm/gpio.h>
12*4882a593Smuzhiyun #include <errno.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun /*
15*4882a593Smuzhiyun * Very simple write only SPI support, this does not use the generic SPI infra
16*4882a593Smuzhiyun * because that assumes R/W SPI, requiring a MISO pin. Also the necessary glue
17*4882a593Smuzhiyun * code alone would be larger then this minimal version.
18*4882a593Smuzhiyun */
lcd_panel_spi_write(int cs,int clk,int mosi,unsigned int data,int bits)19*4882a593Smuzhiyun static void lcd_panel_spi_write(int cs, int clk, int mosi,
20*4882a593Smuzhiyun unsigned int data, int bits)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun int i, offset;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun gpio_direction_output(cs, 0);
25*4882a593Smuzhiyun for (i = 0; i < bits; i++) {
26*4882a593Smuzhiyun gpio_direction_output(clk, 0);
27*4882a593Smuzhiyun offset = (bits - 1) - i;
28*4882a593Smuzhiyun gpio_direction_output(mosi, (data >> offset) & 1);
29*4882a593Smuzhiyun udelay(2);
30*4882a593Smuzhiyun gpio_direction_output(clk, 1);
31*4882a593Smuzhiyun udelay(2);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun gpio_direction_output(cs, 1);
34*4882a593Smuzhiyun udelay(2);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
hitachi_tx18d42vm_init(void)37*4882a593Smuzhiyun int hitachi_tx18d42vm_init(void)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun const u16 init_data[] = {
40*4882a593Smuzhiyun 0x0029, /* reset */
41*4882a593Smuzhiyun 0x0025, /* standby */
42*4882a593Smuzhiyun 0x0840, /* enable normally black */
43*4882a593Smuzhiyun 0x0430, /* enable FRC/dither */
44*4882a593Smuzhiyun 0x385f, /* enter test mode(1) */
45*4882a593Smuzhiyun 0x3ca4, /* enter test mode(2) */
46*4882a593Smuzhiyun 0x3409, /* enable SDRRS, enlarge OE width */
47*4882a593Smuzhiyun 0x4041, /* adopt 2 line / 1 dot */
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun int i, cs, clk, mosi, ret = 0;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun cs = name_to_gpio(CONFIG_VIDEO_LCD_SPI_CS);
52*4882a593Smuzhiyun clk = name_to_gpio(CONFIG_VIDEO_LCD_SPI_SCLK);
53*4882a593Smuzhiyun mosi = name_to_gpio(CONFIG_VIDEO_LCD_SPI_MOSI);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun if (cs == -1 || clk == -1 || mosi == 1) {
56*4882a593Smuzhiyun printf("Error tx18d42vm spi gpio config is invalid\n");
57*4882a593Smuzhiyun return -EINVAL;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun if (gpio_request(cs, "tx18d42vm-spi-cs") != 0 ||
61*4882a593Smuzhiyun gpio_request(clk, "tx18d42vm-spi-clk") != 0 ||
62*4882a593Smuzhiyun gpio_request(mosi, "tx18d42vm-spi-mosi") != 0) {
63*4882a593Smuzhiyun printf("Error cannot request tx18d42vm spi gpios\n");
64*4882a593Smuzhiyun ret = -EBUSY;
65*4882a593Smuzhiyun goto out;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(init_data); i++)
69*4882a593Smuzhiyun lcd_panel_spi_write(cs, clk, mosi, init_data[i], 16);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun mdelay(50); /* All the tx18d42vm drivers have a delay here ? */
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun lcd_panel_spi_write(cs, clk, mosi, 0x00ad, 16); /* display on */
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun out:
76*4882a593Smuzhiyun gpio_free(mosi);
77*4882a593Smuzhiyun gpio_free(clk);
78*4882a593Smuzhiyun gpio_free(cs);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return ret;
81*4882a593Smuzhiyun }
82