xref: /OK3568_Linux_fs/u-boot/drivers/video/drm/rockchip_rgb.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm/of_access.h>
9*4882a593Smuzhiyun #include <errno.h>
10*4882a593Smuzhiyun #include <syscon.h>
11*4882a593Smuzhiyun #include <regmap.h>
12*4882a593Smuzhiyun #include <dm/device.h>
13*4882a593Smuzhiyun #include <dm/read.h>
14*4882a593Smuzhiyun #include <dm/pinctrl.h>
15*4882a593Smuzhiyun #include <linux/media-bus-format.h>
16*4882a593Smuzhiyun #include <asm/gpio.h>
17*4882a593Smuzhiyun #include <backlight.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include "rockchip_display.h"
20*4882a593Smuzhiyun #include "rockchip_crtc.h"
21*4882a593Smuzhiyun #include "rockchip_connector.h"
22*4882a593Smuzhiyun #include "rockchip_phy.h"
23*4882a593Smuzhiyun #include "rockchip_panel.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define HIWORD_UPDATE(v, h, l)		(((v) << (l)) | (GENMASK(h, l) << 16))
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define PX30_GRF_PD_VO_CON1		0x0438
28*4882a593Smuzhiyun #define PX30_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
29*4882a593Smuzhiyun #define PX30_RGB_VOP_SEL(v)		HIWORD_UPDATE(v, 2, 2)
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define RK1808_GRF_PD_VO_CON1		0x0444
32*4882a593Smuzhiyun #define RK1808_RGB_DATA_SYNC_BYPASS(v)	HIWORD_UPDATE(v, 3, 3)
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define RV1106_VENC_GRF_VOP_IO_WRAPPER	0x1000c
35*4882a593Smuzhiyun #define RV1106_IO_BYPASS_SEL(v)		HIWORD_UPDATE(v, 0, 1)
36*4882a593Smuzhiyun #define RV1106_VOGRF_VOP_PIPE_BYPASS	0x60034
37*4882a593Smuzhiyun #define RV1106_VOP_PIPE_BYPASS(v)	HIWORD_UPDATE(v, 0, 1)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define RV1126_GRF_IOFUNC_CON3          0x1026c
40*4882a593Smuzhiyun #define RV1126_LCDC_IO_BYPASS(v)        HIWORD_UPDATE(v, 0, 0)
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define RK3288_GRF_SOC_CON6		0x025c
43*4882a593Smuzhiyun #define RK3288_LVDS_LCDC_SEL(v)		HIWORD_UPDATE(v,  3,  3)
44*4882a593Smuzhiyun #define RK3288_GRF_SOC_CON7		0x0260
45*4882a593Smuzhiyun #define RK3288_LVDS_PWRDWN(v)		HIWORD_UPDATE(v, 15, 15)
46*4882a593Smuzhiyun #define RK3288_LVDS_CON_ENABLE_2(v)	HIWORD_UPDATE(v, 12, 12)
47*4882a593Smuzhiyun #define RK3288_LVDS_CON_ENABLE_1(v)	HIWORD_UPDATE(v, 11, 11)
48*4882a593Smuzhiyun #define RK3288_LVDS_CON_CLKINV(v)	HIWORD_UPDATE(v,  8,  8)
49*4882a593Smuzhiyun #define RK3288_LVDS_CON_TTL_EN(v)	HIWORD_UPDATE(v,  6,  6)
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define RK3368_GRF_SOC_CON15		0x043c
52*4882a593Smuzhiyun #define RK3368_FORCE_JETAG(v)		HIWORD_UPDATE(v,  13,  13)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #define RK3562_GRF_IOC_VO_IO_CON	0x10500
55*4882a593Smuzhiyun #define RK3562_RGB_DATA_BYPASS(v)	HIWORD_UPDATE(v, 6, 6)
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #define RK3568_GRF_VO_CON1		0X0364
58*4882a593Smuzhiyun #define RK3568_RGB_DATA_BYPASS(v)	HIWORD_UPDATE(v, 6, 6)
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun struct rockchip_rgb;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun struct rockchip_rgb_funcs {
63*4882a593Smuzhiyun 	void (*prepare)(struct rockchip_rgb *rgb, int pipe);
64*4882a593Smuzhiyun 	void (*unprepare)(struct rockchip_rgb *rgb);
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun struct rockchip_rgb {
68*4882a593Smuzhiyun 	struct rockchip_connector connector;
69*4882a593Smuzhiyun 	int id;
70*4882a593Smuzhiyun 	struct udevice *dev;
71*4882a593Smuzhiyun 	struct regmap *grf;
72*4882a593Smuzhiyun 	bool data_sync_bypass;
73*4882a593Smuzhiyun 	struct rockchip_phy *phy;
74*4882a593Smuzhiyun 	const struct rockchip_rgb_funcs *funcs;
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun struct mcu_cmd_header {
78*4882a593Smuzhiyun 	u8 data_type;
79*4882a593Smuzhiyun 	u8 delay;
80*4882a593Smuzhiyun 	u8 payload_length;
81*4882a593Smuzhiyun } __packed;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun struct mcu_cmd_desc {
84*4882a593Smuzhiyun 	struct mcu_cmd_header header;
85*4882a593Smuzhiyun 	const u8 *payload;
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun struct mcu_cmd_seq {
89*4882a593Smuzhiyun 	struct mcu_cmd_desc *cmds;
90*4882a593Smuzhiyun 	unsigned int cmd_cnt;
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun struct rockchip_mcu_panel_desc {
94*4882a593Smuzhiyun 	struct mcu_cmd_seq *init_seq;
95*4882a593Smuzhiyun 	struct mcu_cmd_seq *exit_seq;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	struct {
98*4882a593Smuzhiyun 		unsigned int width;
99*4882a593Smuzhiyun 		unsigned int height;
100*4882a593Smuzhiyun 	} size;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	struct {
103*4882a593Smuzhiyun 		unsigned int prepare;
104*4882a593Smuzhiyun 		unsigned int enable;
105*4882a593Smuzhiyun 		unsigned int disable;
106*4882a593Smuzhiyun 		unsigned int unprepare;
107*4882a593Smuzhiyun 		unsigned int reset;
108*4882a593Smuzhiyun 		unsigned int init;
109*4882a593Smuzhiyun 	} delay;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	unsigned int bpc;
112*4882a593Smuzhiyun 	u32 bus_format;
113*4882a593Smuzhiyun 	u32 bus_flags;
114*4882a593Smuzhiyun 	bool power_invert;
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun struct rockchip_mcu_panel {
118*4882a593Smuzhiyun 	struct rockchip_panel base;
119*4882a593Smuzhiyun 	struct rockchip_mcu_panel_desc *desc;
120*4882a593Smuzhiyun 	struct udevice *power_supply;
121*4882a593Smuzhiyun 	struct udevice *backlight;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	struct gpio_desc enable_gpio;
124*4882a593Smuzhiyun 	struct gpio_desc reset_gpio;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	bool prepared;
127*4882a593Smuzhiyun 	bool enabled;
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
to_rockchip_mcu_panel(struct rockchip_panel * panel)130*4882a593Smuzhiyun static inline struct rockchip_mcu_panel *to_rockchip_mcu_panel(struct rockchip_panel *panel)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	return container_of(panel, struct rockchip_mcu_panel, base);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
rockchip_rgb_connector_prepare(struct rockchip_connector * conn,struct display_state * state)135*4882a593Smuzhiyun static int rockchip_rgb_connector_prepare(struct rockchip_connector *conn,
136*4882a593Smuzhiyun 					  struct display_state *state)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	struct rockchip_rgb *rgb = dev_get_priv(conn->dev);
139*4882a593Smuzhiyun 	struct crtc_state *crtc_state = &state->crtc_state;
140*4882a593Smuzhiyun 	int pipe = crtc_state->crtc_id;
141*4882a593Smuzhiyun 	int ret;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	pinctrl_select_state(rgb->dev, "default");
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	if (rgb->funcs && rgb->funcs->prepare)
146*4882a593Smuzhiyun 		rgb->funcs->prepare(rgb, pipe);
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	if (rgb->phy) {
149*4882a593Smuzhiyun 		ret = rockchip_phy_set_mode(rgb->phy, PHY_MODE_VIDEO_TTL);
150*4882a593Smuzhiyun 		if (ret) {
151*4882a593Smuzhiyun 			dev_err(rgb->dev, "failed to set phy mode: %d\n", ret);
152*4882a593Smuzhiyun 			return ret;
153*4882a593Smuzhiyun 		}
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 		rockchip_phy_power_on(rgb->phy);
156*4882a593Smuzhiyun 	}
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	return 0;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun 
rockchip_rgb_connector_unprepare(struct rockchip_connector * conn,struct display_state * state)161*4882a593Smuzhiyun static void rockchip_rgb_connector_unprepare(struct rockchip_connector *conn,
162*4882a593Smuzhiyun 					     struct display_state *state)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct rockchip_rgb *rgb = dev_get_priv(conn->dev);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	if (rgb->phy)
167*4882a593Smuzhiyun 		rockchip_phy_power_off(rgb->phy);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	if (rgb->funcs && rgb->funcs->unprepare)
170*4882a593Smuzhiyun 		rgb->funcs->unprepare(rgb);
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	pinctrl_select_state(rgb->dev, "sleep");
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
rockchip_rgb_connector_init(struct rockchip_connector * conn,struct display_state * state)175*4882a593Smuzhiyun static int rockchip_rgb_connector_init(struct rockchip_connector *conn, struct display_state *state)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	struct rockchip_rgb *rgb = dev_get_priv(conn->dev);
178*4882a593Smuzhiyun 	struct connector_state *conn_state = &state->conn_state;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	rgb->phy = conn->phy;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	conn_state->color_space = V4L2_COLORSPACE_DEFAULT;
183*4882a593Smuzhiyun 	conn_state->disp_info  = rockchip_get_disp_info(conn_state->type, rgb->id);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	switch (conn_state->bus_format) {
186*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_RGB666_1X18:
187*4882a593Smuzhiyun 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P666;
188*4882a593Smuzhiyun 		conn_state->output_if = VOP_OUTPUT_IF_RGB;
189*4882a593Smuzhiyun 		break;
190*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_RGB565_1X16:
191*4882a593Smuzhiyun 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P565;
192*4882a593Smuzhiyun 		conn_state->output_if = VOP_OUTPUT_IF_RGB;
193*4882a593Smuzhiyun 		break;
194*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_SRGB888_3X8:
195*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_SBGR888_3X8:
196*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_SRBG888_3X8:
197*4882a593Smuzhiyun 		conn_state->output_mode = ROCKCHIP_OUT_MODE_S888;
198*4882a593Smuzhiyun 		conn_state->output_if = VOP_OUTPUT_IF_RGB;
199*4882a593Smuzhiyun 		break;
200*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_SRGB888_DUMMY_4X8:
201*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_SBGR888_DUMMY_4X8:
202*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_SRBG888_DUMMY_4X8:
203*4882a593Smuzhiyun 		conn_state->output_mode = ROCKCHIP_OUT_MODE_S888_DUMMY;
204*4882a593Smuzhiyun 		conn_state->output_if = VOP_OUTPUT_IF_RGB;
205*4882a593Smuzhiyun 		break;
206*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_YUYV8_2X8:
207*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_YVYU8_2X8:
208*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_UYVY8_2X8:
209*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_VYUY8_2X8:
210*4882a593Smuzhiyun 		conn_state->output_mode = ROCKCHIP_OUT_MODE_BT656;
211*4882a593Smuzhiyun 		conn_state->output_if = VOP_OUTPUT_IF_BT656;
212*4882a593Smuzhiyun 		break;
213*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_YUYV8_1X16:
214*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_YVYU8_1X16:
215*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_UYVY8_1X16:
216*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_VYUY8_1X16:
217*4882a593Smuzhiyun 		conn_state->output_mode = ROCKCHIP_OUT_MODE_BT1120;
218*4882a593Smuzhiyun 		conn_state->output_if = VOP_OUTPUT_IF_BT1120;
219*4882a593Smuzhiyun 		break;
220*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_RGB888_1X24:
221*4882a593Smuzhiyun 	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
222*4882a593Smuzhiyun 	default:
223*4882a593Smuzhiyun 		conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
224*4882a593Smuzhiyun 		conn_state->output_if = VOP_OUTPUT_IF_RGB;
225*4882a593Smuzhiyun 		break;
226*4882a593Smuzhiyun 	}
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	return 0;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun static const struct rockchip_connector_funcs rockchip_rgb_connector_funcs = {
232*4882a593Smuzhiyun 	.init = rockchip_rgb_connector_init,
233*4882a593Smuzhiyun 	.prepare = rockchip_rgb_connector_prepare,
234*4882a593Smuzhiyun 	.unprepare = rockchip_rgb_connector_unprepare,
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun 
rockchip_mcu_panel_send_cmds(struct display_state * state,struct mcu_cmd_seq * cmds)237*4882a593Smuzhiyun static int rockchip_mcu_panel_send_cmds(struct display_state *state,
238*4882a593Smuzhiyun 					struct mcu_cmd_seq *cmds)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun 	int i;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	if (!cmds)
243*4882a593Smuzhiyun 		return -EINVAL;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	display_send_mcu_cmd(state, MCU_SETBYPASS, 1);
246*4882a593Smuzhiyun 	for (i = 0; i < cmds->cmd_cnt; i++) {
247*4882a593Smuzhiyun 		struct mcu_cmd_desc *desc = &cmds->cmds[i];
248*4882a593Smuzhiyun 		int value = 0;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 		value = desc->payload[0];
251*4882a593Smuzhiyun 		display_send_mcu_cmd(state, desc->header.data_type, value);
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 		if (desc->header.delay)
254*4882a593Smuzhiyun 			mdelay(desc->header.delay);
255*4882a593Smuzhiyun 	}
256*4882a593Smuzhiyun 	display_send_mcu_cmd(state, MCU_SETBYPASS, 0);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	return 0;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun 
rockchip_mcu_panel_prepare(struct rockchip_panel * panel)261*4882a593Smuzhiyun static void rockchip_mcu_panel_prepare(struct rockchip_panel *panel)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun 	struct rockchip_mcu_panel *mcu_panel = to_rockchip_mcu_panel(panel);
264*4882a593Smuzhiyun 	int ret;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	if (mcu_panel->prepared)
267*4882a593Smuzhiyun 		return;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&mcu_panel->enable_gpio))
270*4882a593Smuzhiyun 		dm_gpio_set_value(&mcu_panel->enable_gpio, 1);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	if (mcu_panel->desc->delay.prepare)
273*4882a593Smuzhiyun 		mdelay(mcu_panel->desc->delay.prepare);
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&mcu_panel->reset_gpio))
276*4882a593Smuzhiyun 		dm_gpio_set_value(&mcu_panel->reset_gpio, 1);
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	if (mcu_panel->desc->delay.reset)
279*4882a593Smuzhiyun 		mdelay(mcu_panel->desc->delay.reset);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&mcu_panel->reset_gpio))
282*4882a593Smuzhiyun 		dm_gpio_set_value(&mcu_panel->reset_gpio, 0);
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	if (mcu_panel->desc->delay.init)
285*4882a593Smuzhiyun 		mdelay(mcu_panel->desc->delay.init);
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	if (mcu_panel->desc->init_seq) {
288*4882a593Smuzhiyun 		ret = rockchip_mcu_panel_send_cmds(panel->state, mcu_panel->desc->init_seq);
289*4882a593Smuzhiyun 		if (ret)
290*4882a593Smuzhiyun 			printf("failed to send mcu panel init cmds: %d\n", ret);
291*4882a593Smuzhiyun 	}
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	mcu_panel->prepared = true;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun 
rockchip_mcu_panel_unprepare(struct rockchip_panel * panel)296*4882a593Smuzhiyun static void rockchip_mcu_panel_unprepare(struct rockchip_panel *panel)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun 	struct rockchip_mcu_panel *mcu_panel = to_rockchip_mcu_panel(panel);
299*4882a593Smuzhiyun 	int ret;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	if (!mcu_panel->prepared)
302*4882a593Smuzhiyun 		return;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	if (mcu_panel->desc->exit_seq) {
305*4882a593Smuzhiyun 		ret = rockchip_mcu_panel_send_cmds(panel->state, mcu_panel->desc->exit_seq);
306*4882a593Smuzhiyun 		if (ret)
307*4882a593Smuzhiyun 			printf("failed to send mcu panel exit cmds: %d\n", ret);
308*4882a593Smuzhiyun 	}
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&mcu_panel->reset_gpio))
311*4882a593Smuzhiyun 		dm_gpio_set_value(&mcu_panel->reset_gpio, 1);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	if (dm_gpio_is_valid(&mcu_panel->enable_gpio))
314*4882a593Smuzhiyun 		dm_gpio_set_value(&mcu_panel->enable_gpio, 0);
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	if (mcu_panel->desc->delay.unprepare)
317*4882a593Smuzhiyun 		mdelay(mcu_panel->desc->delay.unprepare);
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	mcu_panel->prepared = false;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun 
rockchip_mcu_panel_enable(struct rockchip_panel * panel)322*4882a593Smuzhiyun static void rockchip_mcu_panel_enable(struct rockchip_panel *panel)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun 	struct rockchip_mcu_panel *mcu_panel = to_rockchip_mcu_panel(panel);
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	if (mcu_panel->enabled)
327*4882a593Smuzhiyun 		return;
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	if (mcu_panel->desc->delay.enable)
330*4882a593Smuzhiyun 		mdelay(mcu_panel->desc->delay.enable);
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	if (mcu_panel->backlight)
333*4882a593Smuzhiyun 		backlight_enable(mcu_panel->backlight);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	mcu_panel->enabled = true;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun 
rockchip_mcu_panel_disable(struct rockchip_panel * panel)338*4882a593Smuzhiyun static void rockchip_mcu_panel_disable(struct rockchip_panel *panel)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun 	struct rockchip_mcu_panel *mcu_panel = to_rockchip_mcu_panel(panel);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	if (!mcu_panel->enabled)
343*4882a593Smuzhiyun 		return;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	if (mcu_panel->backlight)
346*4882a593Smuzhiyun 		backlight_disable(mcu_panel->backlight);
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	if (mcu_panel->desc->delay.disable)
349*4882a593Smuzhiyun 		mdelay(mcu_panel->desc->delay.disable);
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	mcu_panel->enabled = false;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun static const struct rockchip_panel_funcs rockchip_mcu_panel_funcs = {
355*4882a593Smuzhiyun 	.prepare = rockchip_mcu_panel_prepare,
356*4882a593Smuzhiyun 	.unprepare = rockchip_mcu_panel_unprepare,
357*4882a593Smuzhiyun 	.enable = rockchip_mcu_panel_enable,
358*4882a593Smuzhiyun 	.disable = rockchip_mcu_panel_disable,
359*4882a593Smuzhiyun };
360*4882a593Smuzhiyun 
rockchip_mcu_panel_parse_cmds(const u8 * data,int length,struct mcu_cmd_seq * pcmds)361*4882a593Smuzhiyun static int rockchip_mcu_panel_parse_cmds(const u8 *data, int length,
362*4882a593Smuzhiyun 					 struct mcu_cmd_seq *pcmds)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun 	int len;
365*4882a593Smuzhiyun 	const u8 *buf;
366*4882a593Smuzhiyun 	const struct mcu_cmd_header *header;
367*4882a593Smuzhiyun 	int i, cnt = 0;
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	/* scan commands */
370*4882a593Smuzhiyun 	cnt = 0;
371*4882a593Smuzhiyun 	buf = data;
372*4882a593Smuzhiyun 	len = length;
373*4882a593Smuzhiyun 	while (len > sizeof(*header)) {
374*4882a593Smuzhiyun 		header = (const struct mcu_cmd_header *)buf;
375*4882a593Smuzhiyun 		buf += sizeof(*header) + header->payload_length;
376*4882a593Smuzhiyun 		len -= sizeof(*header) + header->payload_length;
377*4882a593Smuzhiyun 		cnt++;
378*4882a593Smuzhiyun 	}
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	pcmds->cmds = calloc(cnt, sizeof(struct mcu_cmd_desc));
381*4882a593Smuzhiyun 	if (!pcmds->cmds)
382*4882a593Smuzhiyun 		return -ENOMEM;
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	pcmds->cmd_cnt = cnt;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	buf = data;
387*4882a593Smuzhiyun 	len = length;
388*4882a593Smuzhiyun 	for (i = 0; i < cnt; i++) {
389*4882a593Smuzhiyun 		struct mcu_cmd_desc *desc = &pcmds->cmds[i];
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 		header = (const struct mcu_cmd_header *)buf;
392*4882a593Smuzhiyun 		length -= sizeof(*header);
393*4882a593Smuzhiyun 		buf += sizeof(*header);
394*4882a593Smuzhiyun 		desc->header.data_type = header->data_type;
395*4882a593Smuzhiyun 		desc->header.delay = header->delay;
396*4882a593Smuzhiyun 		desc->header.payload_length = header->payload_length;
397*4882a593Smuzhiyun 		desc->payload = buf;
398*4882a593Smuzhiyun 		buf += header->payload_length;
399*4882a593Smuzhiyun 		length -= header->payload_length;
400*4882a593Smuzhiyun 	}
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	return 0;
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun 
rockchip_mcu_panel_init(struct rockchip_mcu_panel * mcu_panel,ofnode mcu_panel_node)405*4882a593Smuzhiyun static int rockchip_mcu_panel_init(struct rockchip_mcu_panel *mcu_panel, ofnode mcu_panel_node)
406*4882a593Smuzhiyun {
407*4882a593Smuzhiyun 	const void *data;
408*4882a593Smuzhiyun 	int len;
409*4882a593Smuzhiyun 	int ret;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	ret = gpio_request_by_name_nodev(mcu_panel_node, "enable-gpios", 0,
412*4882a593Smuzhiyun 					 &mcu_panel->enable_gpio, GPIOD_IS_OUT);
413*4882a593Smuzhiyun 	if (ret && ret != -ENOENT) {
414*4882a593Smuzhiyun 		printf("%s: Cannot get mcu panel enable GPIO: %d\n", __func__, ret);
415*4882a593Smuzhiyun 		return ret;
416*4882a593Smuzhiyun 	}
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	ret = gpio_request_by_name_nodev(mcu_panel_node, "reset-gpios", 0,
419*4882a593Smuzhiyun 					 &mcu_panel->reset_gpio, GPIOD_IS_OUT);
420*4882a593Smuzhiyun 	if (ret && ret != -ENOENT) {
421*4882a593Smuzhiyun 		printf("%s: Cannot get mcu panel reset GPIO: %d\n", __func__, ret);
422*4882a593Smuzhiyun 		return ret;
423*4882a593Smuzhiyun 	}
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	mcu_panel->desc = malloc(sizeof(struct rockchip_mcu_panel_desc));
426*4882a593Smuzhiyun 	if (!mcu_panel->desc)
427*4882a593Smuzhiyun 		return -ENOMEM;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	mcu_panel->desc->power_invert = ofnode_read_bool(mcu_panel_node, "power-invert");
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	mcu_panel->desc->delay.prepare = ofnode_read_u32_default(mcu_panel_node, "prepare-delay-ms", 0);
432*4882a593Smuzhiyun 	mcu_panel->desc->delay.unprepare = ofnode_read_u32_default(mcu_panel_node, "unprepare-delay-ms", 0);
433*4882a593Smuzhiyun 	mcu_panel->desc->delay.enable = ofnode_read_u32_default(mcu_panel_node, "enable-delay-ms", 0);
434*4882a593Smuzhiyun 	mcu_panel->desc->delay.disable = ofnode_read_u32_default(mcu_panel_node, "disable-delay-ms", 0);
435*4882a593Smuzhiyun 	mcu_panel->desc->delay.init = ofnode_read_u32_default(mcu_panel_node, "init-delay-ms", 0);
436*4882a593Smuzhiyun 	mcu_panel->desc->delay.reset = ofnode_read_u32_default(mcu_panel_node, "reset-delay-ms", 0);
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	mcu_panel->desc->bus_format = ofnode_read_u32_default(mcu_panel_node, "bus-format",
439*4882a593Smuzhiyun 							      MEDIA_BUS_FMT_RBG888_1X24);
440*4882a593Smuzhiyun 	mcu_panel->desc->bpc = ofnode_read_u32_default(mcu_panel_node, "bpc", 8);
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	data = ofnode_get_property(mcu_panel_node, "panel-init-sequence", &len);
443*4882a593Smuzhiyun 	if (data) {
444*4882a593Smuzhiyun 		mcu_panel->desc->init_seq = calloc(1, sizeof(*mcu_panel->desc->init_seq));
445*4882a593Smuzhiyun 		if (!mcu_panel->desc->init_seq)
446*4882a593Smuzhiyun 			return -ENOMEM;
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 		ret = rockchip_mcu_panel_parse_cmds(data, len, mcu_panel->desc->init_seq);
449*4882a593Smuzhiyun 		if (ret) {
450*4882a593Smuzhiyun 			printf("failed to parse panel init sequence\n");
451*4882a593Smuzhiyun 			goto free_on_cmds;
452*4882a593Smuzhiyun 		}
453*4882a593Smuzhiyun 	}
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	data = ofnode_get_property(mcu_panel_node, "panel-exit-sequence", &len);
456*4882a593Smuzhiyun 	if (data) {
457*4882a593Smuzhiyun 		mcu_panel->desc->exit_seq = calloc(1, sizeof(*mcu_panel->desc->exit_seq));
458*4882a593Smuzhiyun 		if (!mcu_panel->desc->exit_seq) {
459*4882a593Smuzhiyun 			ret = -ENOMEM;
460*4882a593Smuzhiyun 			goto free_on_cmds;
461*4882a593Smuzhiyun 		}
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 		ret = rockchip_mcu_panel_parse_cmds(data, len, mcu_panel->desc->exit_seq);
464*4882a593Smuzhiyun 		if (ret) {
465*4882a593Smuzhiyun 			printf("failed to parse panel exit sequence\n");
466*4882a593Smuzhiyun 			goto free_cmds;
467*4882a593Smuzhiyun 		}
468*4882a593Smuzhiyun 	}
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	return 0;
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun free_cmds:
473*4882a593Smuzhiyun 	free(mcu_panel->desc->exit_seq);
474*4882a593Smuzhiyun free_on_cmds:
475*4882a593Smuzhiyun 	free(mcu_panel->desc->init_seq);
476*4882a593Smuzhiyun 	return ret;
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun 
rockchip_rgb_probe(struct udevice * dev)479*4882a593Smuzhiyun static int rockchip_rgb_probe(struct udevice *dev)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun 	struct rockchip_rgb *rgb = dev_get_priv(dev);
482*4882a593Smuzhiyun 	ofnode mcu_panel_node;
483*4882a593Smuzhiyun 	int phandle;
484*4882a593Smuzhiyun 	int ret;
485*4882a593Smuzhiyun 	struct udevice *syscon;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	rgb->dev = dev;
488*4882a593Smuzhiyun 	rgb->funcs = (const struct rockchip_rgb_funcs *)dev_get_driver_data(dev);
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	ret = uclass_get_device_by_name(UCLASS_SYSCON, "syscon@fdc60000", &syscon);
491*4882a593Smuzhiyun 	rgb->grf = syscon_get_regmap(syscon);
492*4882a593Smuzhiyun 	rgb->data_sync_bypass = dev_read_bool(dev, "rockchip,data-sync-bypass");
493*4882a593Smuzhiyun 	rgb->id = of_alias_get_id(ofnode_to_np(dev->node), "rgb");
494*4882a593Smuzhiyun 	if (rgb->id < 0)
495*4882a593Smuzhiyun 		rgb->id = 0;
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	mcu_panel_node = dev_read_subnode(dev, "mcu-panel");
498*4882a593Smuzhiyun 	if (ofnode_valid(mcu_panel_node) && ofnode_is_available(mcu_panel_node)) {
499*4882a593Smuzhiyun 		struct rockchip_mcu_panel *mcu_panel;
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 		mcu_panel = malloc(sizeof(struct rockchip_mcu_panel));
502*4882a593Smuzhiyun 		if (!mcu_panel) {
503*4882a593Smuzhiyun 			printf("failed to alloc mcu_panel data\n");
504*4882a593Smuzhiyun 			return -ENOMEM;
505*4882a593Smuzhiyun 		}
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 		ret = rockchip_mcu_panel_init(mcu_panel, mcu_panel_node);
508*4882a593Smuzhiyun 		if (ret < 0) {
509*4882a593Smuzhiyun 			printf("failed to init mcu_panel: %d\n", ret);
510*4882a593Smuzhiyun 			return ret;
511*4882a593Smuzhiyun 		}
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 		phandle = ofnode_read_u32_default(mcu_panel_node, "backlight", -1);
514*4882a593Smuzhiyun 		if (phandle < 0) {
515*4882a593Smuzhiyun 			printf("failed to find backlight phandle\n");
516*4882a593Smuzhiyun 			return -EINVAL;
517*4882a593Smuzhiyun 		}
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 		ret = uclass_get_device_by_phandle_id(UCLASS_PANEL_BACKLIGHT, phandle,
520*4882a593Smuzhiyun 						      &mcu_panel->backlight);
521*4882a593Smuzhiyun 		if (ret && ret != -ENOENT) {
522*4882a593Smuzhiyun 			printf("%s: failed to get backlight device: %d\n", __func__, ret);
523*4882a593Smuzhiyun 			return ret;
524*4882a593Smuzhiyun 		}
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 		mcu_panel->base.dev = dev;
527*4882a593Smuzhiyun 		mcu_panel->base.bus_format = mcu_panel->desc->bus_format;
528*4882a593Smuzhiyun 		mcu_panel->base.bpc = mcu_panel->desc->bpc;
529*4882a593Smuzhiyun 		mcu_panel->base.funcs = &rockchip_mcu_panel_funcs;
530*4882a593Smuzhiyun 		mcu_panel->enabled = false;
531*4882a593Smuzhiyun 		mcu_panel->prepared = false;
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 		rgb->connector.panel = &mcu_panel->base;
534*4882a593Smuzhiyun 	}
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	rockchip_connector_bind(&rgb->connector, dev, rgb->id, &rockchip_rgb_connector_funcs,
537*4882a593Smuzhiyun 				NULL, DRM_MODE_CONNECTOR_LVDS);
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	return 0;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun 
rv1106_rgb_prepare(struct rockchip_rgb * rgb,int pipe)542*4882a593Smuzhiyun static void rv1106_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun 	regmap_write(rgb->grf, RV1106_VENC_GRF_VOP_IO_WRAPPER,
545*4882a593Smuzhiyun 		     RV1106_IO_BYPASS_SEL(rgb->data_sync_bypass ? 0x3 : 0x0));
546*4882a593Smuzhiyun 	regmap_write(rgb->grf, RV1106_VOGRF_VOP_PIPE_BYPASS,
547*4882a593Smuzhiyun 		     RV1106_VOP_PIPE_BYPASS(rgb->data_sync_bypass ? 0x3 : 0x0));
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun static const struct rockchip_rgb_funcs rv1106_rgb_funcs = {
551*4882a593Smuzhiyun 	.prepare = rv1106_rgb_prepare,
552*4882a593Smuzhiyun };
553*4882a593Smuzhiyun 
rv1126_rgb_prepare(struct rockchip_rgb * rgb,int pipe)554*4882a593Smuzhiyun static void rv1126_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun 	regmap_write(rgb->grf, RV1126_GRF_IOFUNC_CON3,
557*4882a593Smuzhiyun 		     RV1126_LCDC_IO_BYPASS(rgb->data_sync_bypass));
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun static const struct rockchip_rgb_funcs rv1126_rgb_funcs = {
561*4882a593Smuzhiyun 	.prepare = rv1126_rgb_prepare,
562*4882a593Smuzhiyun };
563*4882a593Smuzhiyun 
px30_rgb_prepare(struct rockchip_rgb * rgb,int pipe)564*4882a593Smuzhiyun static void px30_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
565*4882a593Smuzhiyun {
566*4882a593Smuzhiyun 	regmap_write(rgb->grf, PX30_GRF_PD_VO_CON1, PX30_RGB_VOP_SEL(pipe) |
567*4882a593Smuzhiyun 		     PX30_RGB_DATA_SYNC_BYPASS(rgb->data_sync_bypass));
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun static const struct rockchip_rgb_funcs px30_rgb_funcs = {
571*4882a593Smuzhiyun 	.prepare = px30_rgb_prepare,
572*4882a593Smuzhiyun };
573*4882a593Smuzhiyun 
rk1808_rgb_prepare(struct rockchip_rgb * rgb,int pipe)574*4882a593Smuzhiyun static void rk1808_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
575*4882a593Smuzhiyun {
576*4882a593Smuzhiyun 	regmap_write(rgb->grf, RK1808_GRF_PD_VO_CON1,
577*4882a593Smuzhiyun 		     RK1808_RGB_DATA_SYNC_BYPASS(rgb->data_sync_bypass));
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun static const struct rockchip_rgb_funcs rk1808_rgb_funcs = {
581*4882a593Smuzhiyun 	.prepare = rk1808_rgb_prepare,
582*4882a593Smuzhiyun };
583*4882a593Smuzhiyun 
rk3288_rgb_prepare(struct rockchip_rgb * rgb,int pipe)584*4882a593Smuzhiyun static void rk3288_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun 	regmap_write(rgb->grf, RK3288_GRF_SOC_CON6, RK3288_LVDS_LCDC_SEL(pipe));
587*4882a593Smuzhiyun 	regmap_write(rgb->grf, RK3288_GRF_SOC_CON7,
588*4882a593Smuzhiyun 		     RK3288_LVDS_PWRDWN(0) | RK3288_LVDS_CON_ENABLE_2(1) |
589*4882a593Smuzhiyun 		     RK3288_LVDS_CON_ENABLE_1(1) | RK3288_LVDS_CON_CLKINV(0) |
590*4882a593Smuzhiyun 		     RK3288_LVDS_CON_TTL_EN(1));
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun 
rk3288_rgb_unprepare(struct rockchip_rgb * rgb)593*4882a593Smuzhiyun static void rk3288_rgb_unprepare(struct rockchip_rgb *rgb)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun 	regmap_write(rgb->grf, RK3288_GRF_SOC_CON7,
596*4882a593Smuzhiyun 		     RK3288_LVDS_PWRDWN(1) | RK3288_LVDS_CON_ENABLE_2(0) |
597*4882a593Smuzhiyun 		     RK3288_LVDS_CON_ENABLE_1(0) | RK3288_LVDS_CON_TTL_EN(0));
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun static const struct rockchip_rgb_funcs rk3288_rgb_funcs = {
601*4882a593Smuzhiyun 	.prepare = rk3288_rgb_prepare,
602*4882a593Smuzhiyun 	.unprepare = rk3288_rgb_unprepare,
603*4882a593Smuzhiyun };
604*4882a593Smuzhiyun 
rk3368_rgb_prepare(struct rockchip_rgb * rgb,int pipe)605*4882a593Smuzhiyun static void rk3368_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
606*4882a593Smuzhiyun {
607*4882a593Smuzhiyun 	regmap_write(rgb->grf, RK3368_GRF_SOC_CON15, RK3368_FORCE_JETAG(0));
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun static const struct rockchip_rgb_funcs rk3368_rgb_funcs = {
611*4882a593Smuzhiyun 	.prepare = rk3368_rgb_prepare,
612*4882a593Smuzhiyun };
613*4882a593Smuzhiyun 
rk3562_rgb_prepare(struct rockchip_rgb * rgb,int pipe)614*4882a593Smuzhiyun static void rk3562_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun 	regmap_write(rgb->grf, RK3562_GRF_IOC_VO_IO_CON,
617*4882a593Smuzhiyun 		     RK3562_RGB_DATA_BYPASS(rgb->data_sync_bypass));
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun static const struct rockchip_rgb_funcs rk3562_rgb_funcs = {
621*4882a593Smuzhiyun 	.prepare = rk3562_rgb_prepare,
622*4882a593Smuzhiyun };
623*4882a593Smuzhiyun 
rk3568_rgb_prepare(struct rockchip_rgb * rgb,int pipe)624*4882a593Smuzhiyun static void rk3568_rgb_prepare(struct rockchip_rgb *rgb, int pipe)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun 	regmap_write(rgb->grf, RK3568_GRF_VO_CON1, RK3568_RGB_DATA_BYPASS(rgb->data_sync_bypass));
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun 
629*4882a593Smuzhiyun static const struct rockchip_rgb_funcs rk3568_rgb_funcs = {
630*4882a593Smuzhiyun 	.prepare = rk3568_rgb_prepare,
631*4882a593Smuzhiyun };
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun static const struct udevice_id rockchip_rgb_ids[] = {
634*4882a593Smuzhiyun 	{
635*4882a593Smuzhiyun 		.compatible = "rockchip,px30-rgb",
636*4882a593Smuzhiyun 		.data = (ulong)&px30_rgb_funcs,
637*4882a593Smuzhiyun 	},
638*4882a593Smuzhiyun 	{
639*4882a593Smuzhiyun 		.compatible = "rockchip,rk1808-rgb",
640*4882a593Smuzhiyun 		.data = (ulong)&rk1808_rgb_funcs,
641*4882a593Smuzhiyun 	},
642*4882a593Smuzhiyun 	{
643*4882a593Smuzhiyun 		.compatible = "rockchip,rk3066-rgb",
644*4882a593Smuzhiyun 	},
645*4882a593Smuzhiyun 	{
646*4882a593Smuzhiyun 		.compatible = "rockchip,rk3128-rgb",
647*4882a593Smuzhiyun 	},
648*4882a593Smuzhiyun 	{
649*4882a593Smuzhiyun 		.compatible = "rockchip,rk3288-rgb",
650*4882a593Smuzhiyun 		.data = (ulong)&rk3288_rgb_funcs,
651*4882a593Smuzhiyun 	},
652*4882a593Smuzhiyun 	{
653*4882a593Smuzhiyun 		.compatible = "rockchip,rk3308-rgb",
654*4882a593Smuzhiyun 	},
655*4882a593Smuzhiyun 	{
656*4882a593Smuzhiyun 		.compatible = "rockchip,rk3368-rgb",
657*4882a593Smuzhiyun 		.data = (ulong)&rk3368_rgb_funcs,
658*4882a593Smuzhiyun 	},
659*4882a593Smuzhiyun 	{
660*4882a593Smuzhiyun 		.compatible = "rockchip,rk3562-rgb",
661*4882a593Smuzhiyun 		.data = (ulong)&rk3562_rgb_funcs,
662*4882a593Smuzhiyun 	},
663*4882a593Smuzhiyun 	{
664*4882a593Smuzhiyun 		.compatible = "rockchip,rk3568-rgb",
665*4882a593Smuzhiyun 		.data = (ulong)&rk3568_rgb_funcs,
666*4882a593Smuzhiyun 	},
667*4882a593Smuzhiyun 	{
668*4882a593Smuzhiyun 		.compatible = "rockchip,rv1106-rgb",
669*4882a593Smuzhiyun 		.data = (ulong)&rv1106_rgb_funcs,
670*4882a593Smuzhiyun 	},
671*4882a593Smuzhiyun 	{
672*4882a593Smuzhiyun 		.compatible = "rockchip,rv1108-rgb",
673*4882a593Smuzhiyun 	},
674*4882a593Smuzhiyun 	{
675*4882a593Smuzhiyun 		.compatible = "rockchip,rv1126-rgb",
676*4882a593Smuzhiyun 		.data = (ulong)&rv1126_rgb_funcs,
677*4882a593Smuzhiyun 	},
678*4882a593Smuzhiyun 	{}
679*4882a593Smuzhiyun };
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_rgb) = {
682*4882a593Smuzhiyun 	.name = "rockchip_rgb",
683*4882a593Smuzhiyun 	.id = UCLASS_DISPLAY,
684*4882a593Smuzhiyun 	.of_match = rockchip_rgb_ids,
685*4882a593Smuzhiyun 	.probe = rockchip_rgb_probe,
686*4882a593Smuzhiyun 	.priv_auto_alloc_size = sizeof(struct rockchip_rgb),
687*4882a593Smuzhiyun };
688