1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) Rockchip Electronics Co.Ltd 4*4882a593Smuzhiyun * Author: 5*4882a593Smuzhiyun * Zhang Yubing <yubing.zhang@rock-chips.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _ROCKCHIP_POST_CSC_H 9*4882a593Smuzhiyun #define _ROCKCHIP_POST_CSC_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/kernel.h> 12*4882a593Smuzhiyun #include <edid.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun struct post_csc_coef { 15*4882a593Smuzhiyun s32 csc_coef00; 16*4882a593Smuzhiyun s32 csc_coef01; 17*4882a593Smuzhiyun s32 csc_coef02; 18*4882a593Smuzhiyun s32 csc_coef10; 19*4882a593Smuzhiyun s32 csc_coef11; 20*4882a593Smuzhiyun s32 csc_coef12; 21*4882a593Smuzhiyun s32 csc_coef20; 22*4882a593Smuzhiyun s32 csc_coef21; 23*4882a593Smuzhiyun s32 csc_coef22; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun s32 csc_dc0; 26*4882a593Smuzhiyun s32 csc_dc1; 27*4882a593Smuzhiyun s32 csc_dc2; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun u32 range_type; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun int rockchip_calc_post_csc(struct csc_info *csc, struct post_csc_coef *csc_coef, 33*4882a593Smuzhiyun int csc_mode, bool is_input_yuv, bool is_output_yuv); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #endif 36