1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _ROCKCHIP_PHY_H_ 8*4882a593Smuzhiyun #define _ROCKCHIP_PHY_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun enum phy_mode { 11*4882a593Smuzhiyun PHY_MODE_INVALID, 12*4882a593Smuzhiyun PHY_MODE_MIPI_DPHY, 13*4882a593Smuzhiyun PHY_MODE_VIDEO_LVDS, 14*4882a593Smuzhiyun PHY_MODE_VIDEO_TTL, 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun struct rockchip_phy; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun struct rockchip_phy_funcs { 20*4882a593Smuzhiyun int (*init)(struct rockchip_phy *phy); 21*4882a593Smuzhiyun int (*power_on)(struct rockchip_phy *phy); 22*4882a593Smuzhiyun int (*power_off)(struct rockchip_phy *phy); 23*4882a593Smuzhiyun unsigned long (*set_pll)(struct rockchip_phy *phy, unsigned long rate); 24*4882a593Smuzhiyun int (*set_bus_width)(struct rockchip_phy *phy, u32 bus_width); 25*4882a593Smuzhiyun long (*round_rate)(struct rockchip_phy *phy, unsigned long rate); 26*4882a593Smuzhiyun int (*set_mode)(struct rockchip_phy *phy, enum phy_mode mode); 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun struct rockchip_phy { 30*4882a593Smuzhiyun struct udevice *dev; 31*4882a593Smuzhiyun const struct rockchip_phy_funcs *funcs; 32*4882a593Smuzhiyun const void *data; 33*4882a593Smuzhiyun int soc_type; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun int rockchip_phy_init(struct rockchip_phy *phy); 37*4882a593Smuzhiyun int rockchip_phy_power_off(struct rockchip_phy *phy); 38*4882a593Smuzhiyun int rockchip_phy_power_on(struct rockchip_phy *phy); 39*4882a593Smuzhiyun unsigned long rockchip_phy_set_pll(struct rockchip_phy *phy, 40*4882a593Smuzhiyun unsigned long rate); 41*4882a593Smuzhiyun int rockchip_phy_set_bus_width(struct rockchip_phy *phy, u32 bus_width); 42*4882a593Smuzhiyun long rockchip_phy_round_rate(struct rockchip_phy *phy, unsigned long rate); 43*4882a593Smuzhiyun int rockchip_phy_set_mode(struct rockchip_phy *phy, enum phy_mode mode); 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #endif 46