1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <drm/drm_mipi_dsi.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <config.h>
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <errno.h>
12*4882a593Smuzhiyun #include <malloc.h>
13*4882a593Smuzhiyun #include <video.h>
14*4882a593Smuzhiyun #include <backlight.h>
15*4882a593Smuzhiyun #include <spi.h>
16*4882a593Smuzhiyun #include <asm/gpio.h>
17*4882a593Smuzhiyun #include <dm/device.h>
18*4882a593Smuzhiyun #include <dm/read.h>
19*4882a593Smuzhiyun #include <dm/uclass.h>
20*4882a593Smuzhiyun #include <dm/uclass-id.h>
21*4882a593Smuzhiyun #include <linux/media-bus-format.h>
22*4882a593Smuzhiyun #include <power/regulator.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include "rockchip_display.h"
25*4882a593Smuzhiyun #include "rockchip_crtc.h"
26*4882a593Smuzhiyun #include "rockchip_connector.h"
27*4882a593Smuzhiyun #include "rockchip_panel.h"
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun struct rockchip_cmd_header {
30*4882a593Smuzhiyun u8 data_type;
31*4882a593Smuzhiyun u8 delay_ms;
32*4882a593Smuzhiyun u8 payload_length;
33*4882a593Smuzhiyun } __packed;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun struct rockchip_cmd_desc {
36*4882a593Smuzhiyun struct rockchip_cmd_header header;
37*4882a593Smuzhiyun const u8 *payload;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun struct rockchip_panel_cmds {
41*4882a593Smuzhiyun struct rockchip_cmd_desc *cmds;
42*4882a593Smuzhiyun int cmd_cnt;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun struct rockchip_panel_plat {
46*4882a593Smuzhiyun bool power_invert;
47*4882a593Smuzhiyun u32 bus_format;
48*4882a593Smuzhiyun unsigned int bpc;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun struct {
51*4882a593Smuzhiyun unsigned int prepare;
52*4882a593Smuzhiyun unsigned int unprepare;
53*4882a593Smuzhiyun unsigned int enable;
54*4882a593Smuzhiyun unsigned int disable;
55*4882a593Smuzhiyun unsigned int reset;
56*4882a593Smuzhiyun unsigned int init;
57*4882a593Smuzhiyun } delay;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun struct rockchip_panel_cmds *on_cmds;
60*4882a593Smuzhiyun struct rockchip_panel_cmds *off_cmds;
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun struct rockchip_panel_priv {
64*4882a593Smuzhiyun bool prepared;
65*4882a593Smuzhiyun bool enabled;
66*4882a593Smuzhiyun struct udevice *power_supply;
67*4882a593Smuzhiyun struct udevice *backlight;
68*4882a593Smuzhiyun struct spi_slave *spi_slave;
69*4882a593Smuzhiyun struct gpio_desc enable_gpio;
70*4882a593Smuzhiyun struct gpio_desc reset_gpio;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun int cmd_type;
73*4882a593Smuzhiyun struct gpio_desc spi_sdi_gpio;
74*4882a593Smuzhiyun struct gpio_desc spi_scl_gpio;
75*4882a593Smuzhiyun struct gpio_desc spi_cs_gpio;
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
get_panel_cmd_type(const char * s)78*4882a593Smuzhiyun static inline int get_panel_cmd_type(const char *s)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun if (!s)
81*4882a593Smuzhiyun return -EINVAL;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun if (strncmp(s, "spi", 3) == 0)
84*4882a593Smuzhiyun return CMD_TYPE_SPI;
85*4882a593Smuzhiyun else if (strncmp(s, "mcu", 3) == 0)
86*4882a593Smuzhiyun return CMD_TYPE_MCU;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return CMD_TYPE_DEFAULT;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
rockchip_panel_parse_cmds(const u8 * data,int length,struct rockchip_panel_cmds * pcmds)91*4882a593Smuzhiyun static int rockchip_panel_parse_cmds(const u8 *data, int length,
92*4882a593Smuzhiyun struct rockchip_panel_cmds *pcmds)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun int len;
95*4882a593Smuzhiyun const u8 *buf;
96*4882a593Smuzhiyun const struct rockchip_cmd_header *header;
97*4882a593Smuzhiyun int i, cnt = 0;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* scan commands */
100*4882a593Smuzhiyun cnt = 0;
101*4882a593Smuzhiyun buf = data;
102*4882a593Smuzhiyun len = length;
103*4882a593Smuzhiyun while (len > sizeof(*header)) {
104*4882a593Smuzhiyun header = (const struct rockchip_cmd_header *)buf;
105*4882a593Smuzhiyun buf += sizeof(*header) + header->payload_length;
106*4882a593Smuzhiyun len -= sizeof(*header) + header->payload_length;
107*4882a593Smuzhiyun cnt++;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun pcmds->cmds = calloc(cnt, sizeof(struct rockchip_cmd_desc));
111*4882a593Smuzhiyun if (!pcmds->cmds)
112*4882a593Smuzhiyun return -ENOMEM;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun pcmds->cmd_cnt = cnt;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun buf = data;
117*4882a593Smuzhiyun len = length;
118*4882a593Smuzhiyun for (i = 0; i < cnt; i++) {
119*4882a593Smuzhiyun struct rockchip_cmd_desc *desc = &pcmds->cmds[i];
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun header = (const struct rockchip_cmd_header *)buf;
122*4882a593Smuzhiyun length -= sizeof(*header);
123*4882a593Smuzhiyun buf += sizeof(*header);
124*4882a593Smuzhiyun desc->header.data_type = header->data_type;
125*4882a593Smuzhiyun desc->header.delay_ms = header->delay_ms;
126*4882a593Smuzhiyun desc->header.payload_length = header->payload_length;
127*4882a593Smuzhiyun desc->payload = buf;
128*4882a593Smuzhiyun buf += header->payload_length;
129*4882a593Smuzhiyun length -= header->payload_length;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun return 0;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
rockchip_panel_write_spi_cmds(struct rockchip_panel_priv * priv,u8 type,int value)135*4882a593Smuzhiyun static void rockchip_panel_write_spi_cmds(struct rockchip_panel_priv *priv,
136*4882a593Smuzhiyun u8 type, int value)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun int i;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun dm_gpio_set_value(&priv->spi_cs_gpio, 0);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun if (type == 0)
143*4882a593Smuzhiyun value &= (~(1 << 8));
144*4882a593Smuzhiyun else
145*4882a593Smuzhiyun value |= (1 << 8);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun for (i = 0; i < 9; i++) {
148*4882a593Smuzhiyun if (value & 0x100)
149*4882a593Smuzhiyun dm_gpio_set_value(&priv->spi_sdi_gpio, 1);
150*4882a593Smuzhiyun else
151*4882a593Smuzhiyun dm_gpio_set_value(&priv->spi_sdi_gpio, 0);
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun dm_gpio_set_value(&priv->spi_scl_gpio, 0);
154*4882a593Smuzhiyun udelay(10);
155*4882a593Smuzhiyun dm_gpio_set_value(&priv->spi_scl_gpio, 1);
156*4882a593Smuzhiyun value <<= 1;
157*4882a593Smuzhiyun udelay(10);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun dm_gpio_set_value(&priv->spi_cs_gpio, 1);
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
rockchip_panel_send_mcu_cmds(struct rockchip_panel * panel,struct display_state * state,struct rockchip_panel_cmds * cmds)163*4882a593Smuzhiyun static int rockchip_panel_send_mcu_cmds(struct rockchip_panel *panel, struct display_state *state,
164*4882a593Smuzhiyun struct rockchip_panel_cmds *cmds)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun int i;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (!cmds)
169*4882a593Smuzhiyun return -EINVAL;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun display_send_mcu_cmd(state, MCU_SETBYPASS, 1);
172*4882a593Smuzhiyun for (i = 0; i < cmds->cmd_cnt; i++) {
173*4882a593Smuzhiyun struct rockchip_cmd_desc *desc = &cmds->cmds[i];
174*4882a593Smuzhiyun int value = 0;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun value = desc->payload[0];
177*4882a593Smuzhiyun display_send_mcu_cmd(state, desc->header.data_type, value);
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun if (desc->header.delay_ms)
180*4882a593Smuzhiyun mdelay(desc->header.delay_ms);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun display_send_mcu_cmd(state, MCU_SETBYPASS, 0);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun return 0;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
rockchip_panel_send_spi_cmds(struct rockchip_panel * panel,struct display_state * state,struct rockchip_panel_cmds * cmds)187*4882a593Smuzhiyun static int rockchip_panel_send_spi_cmds(struct rockchip_panel *panel, struct display_state *state,
188*4882a593Smuzhiyun struct rockchip_panel_cmds *cmds)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
191*4882a593Smuzhiyun int i;
192*4882a593Smuzhiyun int ret;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun if (!cmds)
195*4882a593Smuzhiyun return -EINVAL;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun if (priv->spi_slave) {
198*4882a593Smuzhiyun ret = spi_claim_bus(priv->spi_slave);
199*4882a593Smuzhiyun if (ret) {
200*4882a593Smuzhiyun printf("%s: Failed to claim spi bus: %d\n", __func__, ret);
201*4882a593Smuzhiyun return -EINVAL;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun for (i = 0; i < cmds->cmd_cnt; i++) {
206*4882a593Smuzhiyun struct rockchip_cmd_desc *desc = &cmds->cmds[i];
207*4882a593Smuzhiyun int value = 0;
208*4882a593Smuzhiyun u16 mask = 0;
209*4882a593Smuzhiyun u16 data = 0;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun if (priv->spi_slave) {
212*4882a593Smuzhiyun mask = desc->header.data_type ? 0x100 : 0;
213*4882a593Smuzhiyun data = (mask | desc->payload[0]) << 7;;
214*4882a593Smuzhiyun data = ((data & 0xff) << 8) | (data >> 8);
215*4882a593Smuzhiyun value = mask | desc->payload[0];
216*4882a593Smuzhiyun ret = spi_xfer(priv->spi_slave, 9, &data, NULL, SPI_XFER_ONCE);
217*4882a593Smuzhiyun if (ret)
218*4882a593Smuzhiyun printf("%s: Failed to xfer spi cmd 0x%x: %d\n",
219*4882a593Smuzhiyun __func__, desc->payload[0], ret);
220*4882a593Smuzhiyun } else {
221*4882a593Smuzhiyun if (desc->header.payload_length == 2)
222*4882a593Smuzhiyun value = (desc->payload[0] << 8) | desc->payload[1];
223*4882a593Smuzhiyun else
224*4882a593Smuzhiyun value = desc->payload[0];
225*4882a593Smuzhiyun rockchip_panel_write_spi_cmds(priv, desc->header.data_type, value);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun if (desc->header.delay_ms)
229*4882a593Smuzhiyun mdelay(desc->header.delay_ms);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun if (priv->spi_slave)
233*4882a593Smuzhiyun spi_release_bus(priv->spi_slave);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun return 0;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
rockchip_panel_send_dsi_cmds(struct mipi_dsi_device * dsi,struct rockchip_panel_cmds * cmds)238*4882a593Smuzhiyun static int rockchip_panel_send_dsi_cmds(struct mipi_dsi_device *dsi,
239*4882a593Smuzhiyun struct rockchip_panel_cmds *cmds)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun int i, ret;
242*4882a593Smuzhiyun struct drm_dsc_picture_parameter_set *pps = NULL;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun if (!cmds)
245*4882a593Smuzhiyun return -EINVAL;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun for (i = 0; i < cmds->cmd_cnt; i++) {
248*4882a593Smuzhiyun struct rockchip_cmd_desc *desc = &cmds->cmds[i];
249*4882a593Smuzhiyun const struct rockchip_cmd_header *header = &desc->header;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun switch (header->data_type) {
252*4882a593Smuzhiyun case MIPI_DSI_COMPRESSION_MODE:
253*4882a593Smuzhiyun ret = mipi_dsi_compression_mode(dsi, desc->payload[0]);
254*4882a593Smuzhiyun break;
255*4882a593Smuzhiyun case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
256*4882a593Smuzhiyun case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
257*4882a593Smuzhiyun case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
258*4882a593Smuzhiyun case MIPI_DSI_GENERIC_LONG_WRITE:
259*4882a593Smuzhiyun ret = mipi_dsi_generic_write(dsi, desc->payload,
260*4882a593Smuzhiyun header->payload_length);
261*4882a593Smuzhiyun break;
262*4882a593Smuzhiyun case MIPI_DSI_DCS_SHORT_WRITE:
263*4882a593Smuzhiyun case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
264*4882a593Smuzhiyun case MIPI_DSI_DCS_LONG_WRITE:
265*4882a593Smuzhiyun ret = mipi_dsi_dcs_write_buffer(dsi, desc->payload,
266*4882a593Smuzhiyun header->payload_length);
267*4882a593Smuzhiyun break;
268*4882a593Smuzhiyun case MIPI_DSI_PICTURE_PARAMETER_SET:
269*4882a593Smuzhiyun pps = kzalloc(sizeof(*pps), GFP_KERNEL);
270*4882a593Smuzhiyun if (!pps)
271*4882a593Smuzhiyun return -ENOMEM;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun memcpy(pps, desc->payload, header->payload_length);
274*4882a593Smuzhiyun ret = mipi_dsi_picture_parameter_set(dsi, pps);
275*4882a593Smuzhiyun kfree(pps);
276*4882a593Smuzhiyun break;
277*4882a593Smuzhiyun default:
278*4882a593Smuzhiyun printf("unsupport command data type: %d\n",
279*4882a593Smuzhiyun header->data_type);
280*4882a593Smuzhiyun return -EINVAL;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun if (ret < 0) {
284*4882a593Smuzhiyun printf("failed to write cmd%d: %d\n", i, ret);
285*4882a593Smuzhiyun return ret;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (header->delay_ms)
289*4882a593Smuzhiyun mdelay(header->delay_ms);
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun return 0;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
panel_simple_prepare(struct rockchip_panel * panel)295*4882a593Smuzhiyun static void panel_simple_prepare(struct rockchip_panel *panel)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
298*4882a593Smuzhiyun struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
299*4882a593Smuzhiyun struct mipi_dsi_device *dsi = dev_get_parent_platdata(panel->dev);
300*4882a593Smuzhiyun int ret;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun if (priv->prepared)
303*4882a593Smuzhiyun return;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun if (priv->power_supply)
306*4882a593Smuzhiyun regulator_set_enable(priv->power_supply, !plat->power_invert);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun if (dm_gpio_is_valid(&priv->enable_gpio))
309*4882a593Smuzhiyun dm_gpio_set_value(&priv->enable_gpio, 1);
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun if (plat->delay.prepare)
312*4882a593Smuzhiyun mdelay(plat->delay.prepare);
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun if (dm_gpio_is_valid(&priv->reset_gpio))
315*4882a593Smuzhiyun dm_gpio_set_value(&priv->reset_gpio, 1);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun if (plat->delay.reset)
318*4882a593Smuzhiyun mdelay(plat->delay.reset);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun if (dm_gpio_is_valid(&priv->reset_gpio))
321*4882a593Smuzhiyun dm_gpio_set_value(&priv->reset_gpio, 0);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun if (plat->delay.init)
324*4882a593Smuzhiyun mdelay(plat->delay.init);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun if (plat->on_cmds) {
327*4882a593Smuzhiyun if (priv->cmd_type == CMD_TYPE_SPI)
328*4882a593Smuzhiyun ret = rockchip_panel_send_spi_cmds(panel, panel->state,
329*4882a593Smuzhiyun plat->on_cmds);
330*4882a593Smuzhiyun else if (priv->cmd_type == CMD_TYPE_MCU)
331*4882a593Smuzhiyun ret = rockchip_panel_send_mcu_cmds(panel, panel->state,
332*4882a593Smuzhiyun plat->on_cmds);
333*4882a593Smuzhiyun else
334*4882a593Smuzhiyun ret = rockchip_panel_send_dsi_cmds(dsi, plat->on_cmds);
335*4882a593Smuzhiyun if (ret)
336*4882a593Smuzhiyun printf("failed to send on cmds: %d\n", ret);
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun priv->prepared = true;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
panel_simple_unprepare(struct rockchip_panel * panel)342*4882a593Smuzhiyun static void panel_simple_unprepare(struct rockchip_panel *panel)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
345*4882a593Smuzhiyun struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
346*4882a593Smuzhiyun struct mipi_dsi_device *dsi = dev_get_parent_platdata(panel->dev);
347*4882a593Smuzhiyun int ret;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun if (!priv->prepared)
350*4882a593Smuzhiyun return;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun if (plat->off_cmds) {
353*4882a593Smuzhiyun if (priv->cmd_type == CMD_TYPE_SPI)
354*4882a593Smuzhiyun ret = rockchip_panel_send_spi_cmds(panel, panel->state,
355*4882a593Smuzhiyun plat->off_cmds);
356*4882a593Smuzhiyun else if (priv->cmd_type == CMD_TYPE_MCU)
357*4882a593Smuzhiyun ret = rockchip_panel_send_mcu_cmds(panel, panel->state,
358*4882a593Smuzhiyun plat->off_cmds);
359*4882a593Smuzhiyun else
360*4882a593Smuzhiyun ret = rockchip_panel_send_dsi_cmds(dsi, plat->off_cmds);
361*4882a593Smuzhiyun if (ret)
362*4882a593Smuzhiyun printf("failed to send off cmds: %d\n", ret);
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun if (dm_gpio_is_valid(&priv->reset_gpio))
366*4882a593Smuzhiyun dm_gpio_set_value(&priv->reset_gpio, 1);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun if (dm_gpio_is_valid(&priv->enable_gpio))
369*4882a593Smuzhiyun dm_gpio_set_value(&priv->enable_gpio, 0);
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun if (priv->power_supply)
372*4882a593Smuzhiyun regulator_set_enable(priv->power_supply, plat->power_invert);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun if (plat->delay.unprepare)
375*4882a593Smuzhiyun mdelay(plat->delay.unprepare);
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun priv->prepared = false;
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun
panel_simple_enable(struct rockchip_panel * panel)380*4882a593Smuzhiyun static void panel_simple_enable(struct rockchip_panel *panel)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
383*4882a593Smuzhiyun struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun if (priv->enabled)
386*4882a593Smuzhiyun return;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun if (plat->delay.enable)
389*4882a593Smuzhiyun mdelay(plat->delay.enable);
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun if (priv->backlight)
392*4882a593Smuzhiyun backlight_enable(priv->backlight);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun priv->enabled = true;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun
panel_simple_disable(struct rockchip_panel * panel)397*4882a593Smuzhiyun static void panel_simple_disable(struct rockchip_panel *panel)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun struct rockchip_panel_plat *plat = dev_get_platdata(panel->dev);
400*4882a593Smuzhiyun struct rockchip_panel_priv *priv = dev_get_priv(panel->dev);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun if (!priv->enabled)
403*4882a593Smuzhiyun return;
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun if (priv->backlight)
406*4882a593Smuzhiyun backlight_disable(priv->backlight);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun if (plat->delay.disable)
409*4882a593Smuzhiyun mdelay(plat->delay.disable);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun priv->enabled = false;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun static const struct rockchip_panel_funcs rockchip_panel_funcs = {
415*4882a593Smuzhiyun .prepare = panel_simple_prepare,
416*4882a593Smuzhiyun .unprepare = panel_simple_unprepare,
417*4882a593Smuzhiyun .enable = panel_simple_enable,
418*4882a593Smuzhiyun .disable = panel_simple_disable,
419*4882a593Smuzhiyun };
420*4882a593Smuzhiyun
rockchip_panel_ofdata_to_platdata(struct udevice * dev)421*4882a593Smuzhiyun static int rockchip_panel_ofdata_to_platdata(struct udevice *dev)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun struct rockchip_panel_plat *plat = dev_get_platdata(dev);
424*4882a593Smuzhiyun const void *data;
425*4882a593Smuzhiyun int len = 0;
426*4882a593Smuzhiyun int ret;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun plat->power_invert = dev_read_bool(dev, "power-invert");
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun plat->delay.prepare = dev_read_u32_default(dev, "prepare-delay-ms", 0);
431*4882a593Smuzhiyun plat->delay.unprepare = dev_read_u32_default(dev, "unprepare-delay-ms", 0);
432*4882a593Smuzhiyun plat->delay.enable = dev_read_u32_default(dev, "enable-delay-ms", 0);
433*4882a593Smuzhiyun plat->delay.disable = dev_read_u32_default(dev, "disable-delay-ms", 0);
434*4882a593Smuzhiyun plat->delay.init = dev_read_u32_default(dev, "init-delay-ms", 0);
435*4882a593Smuzhiyun plat->delay.reset = dev_read_u32_default(dev, "reset-delay-ms", 0);
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun plat->bus_format = dev_read_u32_default(dev, "bus-format",
438*4882a593Smuzhiyun MEDIA_BUS_FMT_RBG888_1X24);
439*4882a593Smuzhiyun plat->bpc = dev_read_u32_default(dev, "bpc", 8);
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun data = dev_read_prop(dev, "panel-init-sequence", &len);
442*4882a593Smuzhiyun if (data) {
443*4882a593Smuzhiyun plat->on_cmds = calloc(1, sizeof(*plat->on_cmds));
444*4882a593Smuzhiyun if (!plat->on_cmds)
445*4882a593Smuzhiyun return -ENOMEM;
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun ret = rockchip_panel_parse_cmds(data, len, plat->on_cmds);
448*4882a593Smuzhiyun if (ret) {
449*4882a593Smuzhiyun printf("failed to parse panel init sequence\n");
450*4882a593Smuzhiyun goto free_on_cmds;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun data = dev_read_prop(dev, "panel-exit-sequence", &len);
455*4882a593Smuzhiyun if (data) {
456*4882a593Smuzhiyun plat->off_cmds = calloc(1, sizeof(*plat->off_cmds));
457*4882a593Smuzhiyun if (!plat->off_cmds) {
458*4882a593Smuzhiyun ret = -ENOMEM;
459*4882a593Smuzhiyun goto free_on_cmds;
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun ret = rockchip_panel_parse_cmds(data, len, plat->off_cmds);
463*4882a593Smuzhiyun if (ret) {
464*4882a593Smuzhiyun printf("failed to parse panel exit sequence\n");
465*4882a593Smuzhiyun goto free_cmds;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun return 0;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun free_cmds:
472*4882a593Smuzhiyun free(plat->off_cmds);
473*4882a593Smuzhiyun free_on_cmds:
474*4882a593Smuzhiyun free(plat->on_cmds);
475*4882a593Smuzhiyun return ret;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
rockchip_panel_probe(struct udevice * dev)478*4882a593Smuzhiyun static int rockchip_panel_probe(struct udevice *dev)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun struct rockchip_panel_priv *priv = dev_get_priv(dev);
481*4882a593Smuzhiyun struct rockchip_panel_plat *plat = dev_get_platdata(dev);
482*4882a593Smuzhiyun struct rockchip_panel *panel;
483*4882a593Smuzhiyun int ret;
484*4882a593Smuzhiyun const char *cmd_type;
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun ret = gpio_request_by_name(dev, "enable-gpios", 0,
487*4882a593Smuzhiyun &priv->enable_gpio, GPIOD_IS_OUT);
488*4882a593Smuzhiyun if (ret && ret != -ENOENT) {
489*4882a593Smuzhiyun printf("%s: Cannot get enable GPIO: %d\n", __func__, ret);
490*4882a593Smuzhiyun return ret;
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun ret = gpio_request_by_name(dev, "reset-gpios", 0,
494*4882a593Smuzhiyun &priv->reset_gpio, GPIOD_IS_OUT);
495*4882a593Smuzhiyun if (ret && ret != -ENOENT) {
496*4882a593Smuzhiyun printf("%s: Cannot get reset GPIO: %d\n", __func__, ret);
497*4882a593Smuzhiyun return ret;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
501*4882a593Smuzhiyun "backlight", &priv->backlight);
502*4882a593Smuzhiyun if (ret && ret != -ENOENT) {
503*4882a593Smuzhiyun printf("%s: Cannot get backlight: %d\n", __func__, ret);
504*4882a593Smuzhiyun return ret;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
508*4882a593Smuzhiyun "power-supply", &priv->power_supply);
509*4882a593Smuzhiyun if (ret && ret != -ENOENT) {
510*4882a593Smuzhiyun printf("%s: Cannot get power supply: %d\n", __func__, ret);
511*4882a593Smuzhiyun return ret;
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun ret = dev_read_string_index(dev, "rockchip,cmd-type", 0, &cmd_type);
515*4882a593Smuzhiyun if (ret)
516*4882a593Smuzhiyun priv->cmd_type = CMD_TYPE_DEFAULT;
517*4882a593Smuzhiyun else
518*4882a593Smuzhiyun priv->cmd_type = get_panel_cmd_type(cmd_type);
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun if (priv->cmd_type == CMD_TYPE_SPI) {
521*4882a593Smuzhiyun ofnode parent = ofnode_get_parent(dev->node);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun if (ofnode_valid(parent)) {
524*4882a593Smuzhiyun struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
525*4882a593Smuzhiyun struct udevice *spi = dev_get_parent(dev);
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun if (spi->seq < 0) {
528*4882a593Smuzhiyun printf("%s: Failed to get spi bus num\n", __func__);
529*4882a593Smuzhiyun return -EINVAL;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun priv->spi_slave = spi_setup_slave(spi->seq, plat->cs, plat->max_hz,
533*4882a593Smuzhiyun plat->mode);
534*4882a593Smuzhiyun if (!priv->spi_slave) {
535*4882a593Smuzhiyun printf("%s: Failed to setup spi slave: %d\n", __func__, ret);
536*4882a593Smuzhiyun return -EINVAL;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun } else {
539*4882a593Smuzhiyun ret = gpio_request_by_name(dev, "spi-sdi-gpios", 0,
540*4882a593Smuzhiyun &priv->spi_sdi_gpio, GPIOD_IS_OUT);
541*4882a593Smuzhiyun if (ret && ret != -ENOENT) {
542*4882a593Smuzhiyun printf("%s: Cannot get spi sdi GPIO: %d\n", __func__, ret);
543*4882a593Smuzhiyun return ret;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun ret = gpio_request_by_name(dev, "spi-scl-gpios", 0,
546*4882a593Smuzhiyun &priv->spi_scl_gpio, GPIOD_IS_OUT);
547*4882a593Smuzhiyun if (ret && ret != -ENOENT) {
548*4882a593Smuzhiyun printf("%s: Cannot get spi scl GPIO: %d\n", __func__, ret);
549*4882a593Smuzhiyun return ret;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun ret = gpio_request_by_name(dev, "spi-cs-gpios", 0,
552*4882a593Smuzhiyun &priv->spi_cs_gpio, GPIOD_IS_OUT);
553*4882a593Smuzhiyun if (ret && ret != -ENOENT) {
554*4882a593Smuzhiyun printf("%s: Cannot get spi cs GPIO: %d\n", __func__, ret);
555*4882a593Smuzhiyun return ret;
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun dm_gpio_set_value(&priv->spi_sdi_gpio, 1);
558*4882a593Smuzhiyun dm_gpio_set_value(&priv->spi_scl_gpio, 1);
559*4882a593Smuzhiyun dm_gpio_set_value(&priv->spi_cs_gpio, 1);
560*4882a593Smuzhiyun dm_gpio_set_value(&priv->reset_gpio, 0);
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun panel = calloc(1, sizeof(*panel));
565*4882a593Smuzhiyun if (!panel)
566*4882a593Smuzhiyun return -ENOMEM;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun dev->driver_data = (ulong)panel;
569*4882a593Smuzhiyun panel->dev = dev;
570*4882a593Smuzhiyun panel->bus_format = plat->bus_format;
571*4882a593Smuzhiyun panel->bpc = plat->bpc;
572*4882a593Smuzhiyun panel->funcs = &rockchip_panel_funcs;
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun return 0;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun static const struct udevice_id rockchip_panel_ids[] = {
578*4882a593Smuzhiyun { .compatible = "simple-panel", },
579*4882a593Smuzhiyun { .compatible = "simple-panel-dsi", },
580*4882a593Smuzhiyun { .compatible = "simple-panel-spi", },
581*4882a593Smuzhiyun {}
582*4882a593Smuzhiyun };
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_panel) = {
585*4882a593Smuzhiyun .name = "rockchip_panel",
586*4882a593Smuzhiyun .id = UCLASS_PANEL,
587*4882a593Smuzhiyun .of_match = rockchip_panel_ids,
588*4882a593Smuzhiyun .ofdata_to_platdata = rockchip_panel_ofdata_to_platdata,
589*4882a593Smuzhiyun .probe = rockchip_panel_probe,
590*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct rockchip_panel_priv),
591*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct rockchip_panel_plat),
592*4882a593Smuzhiyun };
593