1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <asm/unaligned.h>
8*4882a593Smuzhiyun #include <boot_rkimg.h>
9*4882a593Smuzhiyun #include <config.h>
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <errno.h>
12*4882a593Smuzhiyun #include <linux/libfdt.h>
13*4882a593Smuzhiyun #include <fdtdec.h>
14*4882a593Smuzhiyun #include <fdt_support.h>
15*4882a593Smuzhiyun #include <linux/hdmi.h>
16*4882a593Smuzhiyun #include <linux/list.h>
17*4882a593Smuzhiyun #include <linux/compat.h>
18*4882a593Smuzhiyun #include <linux/media-bus-format.h>
19*4882a593Smuzhiyun #include <malloc.h>
20*4882a593Smuzhiyun #include <video.h>
21*4882a593Smuzhiyun #include <video_rockchip.h>
22*4882a593Smuzhiyun #include <video_bridge.h>
23*4882a593Smuzhiyun #include <dm/device.h>
24*4882a593Smuzhiyun #include <dm/uclass-internal.h>
25*4882a593Smuzhiyun #include <asm/arch-rockchip/resource_img.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include "bmp_helper.h"
28*4882a593Smuzhiyun #include "rockchip_display.h"
29*4882a593Smuzhiyun #include "rockchip_crtc.h"
30*4882a593Smuzhiyun #include "rockchip_connector.h"
31*4882a593Smuzhiyun #include "rockchip_bridge.h"
32*4882a593Smuzhiyun #include "rockchip_phy.h"
33*4882a593Smuzhiyun #include "rockchip_panel.h"
34*4882a593Smuzhiyun #include <dm.h>
35*4882a593Smuzhiyun #include <dm/of_access.h>
36*4882a593Smuzhiyun #include <dm/ofnode.h>
37*4882a593Smuzhiyun #include <asm/io.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define DRIVER_VERSION "v1.0.1"
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /***********************************************************************
42*4882a593Smuzhiyun * Rockchip UBOOT DRM driver version
43*4882a593Smuzhiyun *
44*4882a593Smuzhiyun * v1.0.0 : add basic version for rockchip drm driver(hjc)
45*4882a593Smuzhiyun * v1.0.1 : add much dsi update(hjc)
46*4882a593Smuzhiyun *
47*4882a593Smuzhiyun **********************************************************************/
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define RK_BLK_SIZE 512
50*4882a593Smuzhiyun #define BMP_PROCESSED_FLAG 8399
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
53*4882a593Smuzhiyun static LIST_HEAD(rockchip_display_list);
54*4882a593Smuzhiyun static LIST_HEAD(logo_cache_list);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static unsigned long memory_start;
57*4882a593Smuzhiyun static unsigned long cubic_lut_memory_start;
58*4882a593Smuzhiyun static unsigned long memory_end;
59*4882a593Smuzhiyun static struct base2_info base_parameter;
60*4882a593Smuzhiyun static u32 align_size = PAGE_SIZE;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /*
63*4882a593Smuzhiyun * the phy types are used by different connectors in public.
64*4882a593Smuzhiyun * The current version only has inno hdmi phy for hdmi and tve.
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun enum public_use_phy {
67*4882a593Smuzhiyun NONE,
68*4882a593Smuzhiyun INNO_HDMI_PHY
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* save public phy data */
72*4882a593Smuzhiyun struct public_phy_data {
73*4882a593Smuzhiyun const struct rockchip_phy *phy_drv;
74*4882a593Smuzhiyun int phy_node;
75*4882a593Smuzhiyun int public_phy_type;
76*4882a593Smuzhiyun bool phy_init;
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun
rockchip_get_baseparameter(void)79*4882a593Smuzhiyun int rockchip_get_baseparameter(void)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun struct blk_desc *dev_desc;
82*4882a593Smuzhiyun disk_partition_t part_info;
83*4882a593Smuzhiyun int block_num = 2048;
84*4882a593Smuzhiyun char baseparameter_buf[block_num * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
85*4882a593Smuzhiyun int ret = 0;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun dev_desc = rockchip_get_bootdev();
88*4882a593Smuzhiyun if (!dev_desc) {
89*4882a593Smuzhiyun printf("%s: Could not find device\n", __func__);
90*4882a593Smuzhiyun return -ENOENT;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (part_get_info_by_name(dev_desc, "baseparameter", &part_info) < 0) {
94*4882a593Smuzhiyun printf("Could not find baseparameter partition\n");
95*4882a593Smuzhiyun return -ENOENT;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun ret = blk_dread(dev_desc, part_info.start, block_num, (void *)baseparameter_buf);
99*4882a593Smuzhiyun if (ret < 0) {
100*4882a593Smuzhiyun printf("read baseparameter failed\n");
101*4882a593Smuzhiyun return ret;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun memcpy(&base_parameter, baseparameter_buf, sizeof(base_parameter));
105*4882a593Smuzhiyun if (strncasecmp(base_parameter.head_flag, "BASP", 4)) {
106*4882a593Smuzhiyun printf("warning: bad baseparameter\n");
107*4882a593Smuzhiyun memset(&base_parameter, 0, sizeof(base_parameter));
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun rockchip_display_make_crc32_table();
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun return ret;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
rockchip_get_disp_info(int type,int id)114*4882a593Smuzhiyun struct base2_disp_info *rockchip_get_disp_info(int type, int id)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun struct base2_disp_info *disp_info;
117*4882a593Smuzhiyun struct base2_disp_header *disp_header;
118*4882a593Smuzhiyun int i = 0, offset = -1;
119*4882a593Smuzhiyun u32 crc_val;
120*4882a593Smuzhiyun u32 base2_length;
121*4882a593Smuzhiyun void *base_parameter_addr = (void *)&base_parameter;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
124*4882a593Smuzhiyun disp_header = &base_parameter.disp_header[i];
125*4882a593Smuzhiyun if (disp_header->connector_type == type &&
126*4882a593Smuzhiyun disp_header->connector_id == id) {
127*4882a593Smuzhiyun printf("disp info %d, type:%d, id:%d\n", i, type, id);
128*4882a593Smuzhiyun offset = disp_header->offset;
129*4882a593Smuzhiyun break;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun if (offset < 0)
134*4882a593Smuzhiyun return NULL;
135*4882a593Smuzhiyun disp_info = base_parameter_addr + offset;
136*4882a593Smuzhiyun if (disp_info->screen_info[0].type != type ||
137*4882a593Smuzhiyun disp_info->screen_info[0].id != id) {
138*4882a593Smuzhiyun printf("base2_disp_info couldn't be found, screen_info type[%d] or id[%d] mismatched\n",
139*4882a593Smuzhiyun disp_info->screen_info[0].type,
140*4882a593Smuzhiyun disp_info->screen_info[0].id);
141*4882a593Smuzhiyun return NULL;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun if (strncasecmp(disp_info->disp_head_flag, "DISP", 4))
145*4882a593Smuzhiyun return NULL;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if (base_parameter.major_version == 3 && base_parameter.minor_version == 0) {
148*4882a593Smuzhiyun crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info,
149*4882a593Smuzhiyun sizeof(struct base2_disp_info) - 4);
150*4882a593Smuzhiyun if (crc_val != disp_info->crc2) {
151*4882a593Smuzhiyun printf("error: connector type[%d], id[%d] disp info crc2 check error\n",
152*4882a593Smuzhiyun type, id);
153*4882a593Smuzhiyun return NULL;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun } else {
156*4882a593Smuzhiyun base2_length = sizeof(struct base2_disp_info) - sizeof(struct csc_info) -
157*4882a593Smuzhiyun sizeof(struct acm_data) - 10 * 1024 - 4;
158*4882a593Smuzhiyun crc_val = rockchip_display_crc32c_cal((unsigned char *)disp_info, base2_length - 4);
159*4882a593Smuzhiyun if (crc_val != disp_info->crc) {
160*4882a593Smuzhiyun printf("error: connector type[%d], id[%d] disp info crc check error\n",
161*4882a593Smuzhiyun type, id);
162*4882a593Smuzhiyun return NULL;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun return disp_info;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /* check which kind of public phy does connector use */
check_public_use_phy(struct rockchip_connector * conn)170*4882a593Smuzhiyun static int check_public_use_phy(struct rockchip_connector *conn)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun int ret = NONE;
173*4882a593Smuzhiyun #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun if (!strncmp(dev_read_name(conn->dev), "tve", 3) ||
176*4882a593Smuzhiyun !strncmp(dev_read_name(conn->dev), "hdmi", 4))
177*4882a593Smuzhiyun ret = INNO_HDMI_PHY;
178*4882a593Smuzhiyun #endif
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun return ret;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /*
184*4882a593Smuzhiyun * get public phy driver and initialize it.
185*4882a593Smuzhiyun * The current version only has inno hdmi phy for hdmi and tve.
186*4882a593Smuzhiyun */
get_public_phy(struct rockchip_connector * conn,struct public_phy_data * data)187*4882a593Smuzhiyun static int get_public_phy(struct rockchip_connector *conn,
188*4882a593Smuzhiyun struct public_phy_data *data)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun struct rockchip_phy *phy;
191*4882a593Smuzhiyun struct udevice *dev;
192*4882a593Smuzhiyun int ret = 0;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun switch (data->public_phy_type) {
195*4882a593Smuzhiyun case INNO_HDMI_PHY:
196*4882a593Smuzhiyun #if defined(CONFIG_ROCKCHIP_RK3328)
197*4882a593Smuzhiyun ret = uclass_get_device_by_name(UCLASS_PHY,
198*4882a593Smuzhiyun "hdmiphy@ff430000", &dev);
199*4882a593Smuzhiyun #elif defined(CONFIG_ROCKCHIP_RK322X)
200*4882a593Smuzhiyun ret = uclass_get_device_by_name(UCLASS_PHY,
201*4882a593Smuzhiyun "hdmi-phy@12030000", &dev);
202*4882a593Smuzhiyun #else
203*4882a593Smuzhiyun ret = -EINVAL;
204*4882a593Smuzhiyun #endif
205*4882a593Smuzhiyun if (ret) {
206*4882a593Smuzhiyun printf("Warn: can't find phy driver\n");
207*4882a593Smuzhiyun return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun phy = (struct rockchip_phy *)dev_get_driver_data(dev);
211*4882a593Smuzhiyun if (!phy) {
212*4882a593Smuzhiyun printf("failed to get phy driver\n");
213*4882a593Smuzhiyun return 0;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun ret = rockchip_phy_init(phy);
217*4882a593Smuzhiyun if (ret) {
218*4882a593Smuzhiyun printf("failed to init phy driver\n");
219*4882a593Smuzhiyun return ret;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun conn->phy = phy;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun debug("inno hdmi phy init success, save it\n");
224*4882a593Smuzhiyun data->phy_drv = conn->phy;
225*4882a593Smuzhiyun data->phy_init = true;
226*4882a593Smuzhiyun return 0;
227*4882a593Smuzhiyun default:
228*4882a593Smuzhiyun return -EINVAL;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
init_display_buffer(ulong base)232*4882a593Smuzhiyun static void init_display_buffer(ulong base)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun memory_start = ALIGN(base + DRM_ROCKCHIP_FB_SIZE, align_size);
235*4882a593Smuzhiyun memory_end = memory_start;
236*4882a593Smuzhiyun cubic_lut_memory_start = ALIGN(memory_start + MEMORY_POOL_SIZE, align_size);
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
get_display_buffer(int size)239*4882a593Smuzhiyun void *get_display_buffer(int size)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun unsigned long roundup_memory = roundup(memory_end, PAGE_SIZE);
242*4882a593Smuzhiyun void *buf;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun if (roundup_memory + size > memory_start + MEMORY_POOL_SIZE) {
245*4882a593Smuzhiyun printf("failed to alloc %dbyte memory to display\n", size);
246*4882a593Smuzhiyun return NULL;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun buf = (void *)roundup_memory;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun memory_end = roundup_memory + size;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun return buf;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
get_display_size(void)255*4882a593Smuzhiyun static unsigned long get_display_size(void)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun return memory_end - memory_start;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
get_single_cubic_lut_size(void)260*4882a593Smuzhiyun static unsigned long get_single_cubic_lut_size(void)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun ulong cubic_lut_size;
263*4882a593Smuzhiyun int cubic_lut_step = CONFIG_ROCKCHIP_CUBIC_LUT_SIZE;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun /* This is depend on IC designed */
266*4882a593Smuzhiyun cubic_lut_size = (cubic_lut_step * cubic_lut_step * cubic_lut_step + 1) / 2 * 16;
267*4882a593Smuzhiyun cubic_lut_size = roundup(cubic_lut_size, PAGE_SIZE);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun return cubic_lut_size;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
get_cubic_lut_offset(int crtc_id)272*4882a593Smuzhiyun static unsigned long get_cubic_lut_offset(int crtc_id)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun return crtc_id * get_single_cubic_lut_size();
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun
get_cubic_lut_buffer(int crtc_id)277*4882a593Smuzhiyun unsigned long get_cubic_lut_buffer(int crtc_id)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun return cubic_lut_memory_start + crtc_id * get_single_cubic_lut_size();
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
get_cubic_memory_size(void)282*4882a593Smuzhiyun static unsigned long get_cubic_memory_size(void)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun /* Max support 4 cubic lut */
285*4882a593Smuzhiyun return get_single_cubic_lut_size() * 4;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
can_direct_logo(int bpp)288*4882a593Smuzhiyun bool can_direct_logo(int bpp)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun return bpp == 16 || bpp == 32;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
connector_phy_init(struct rockchip_connector * conn,struct public_phy_data * data)293*4882a593Smuzhiyun static int connector_phy_init(struct rockchip_connector *conn,
294*4882a593Smuzhiyun struct public_phy_data *data)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun int type;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun /* does this connector use public phy with others */
299*4882a593Smuzhiyun type = check_public_use_phy(conn);
300*4882a593Smuzhiyun if (type == INNO_HDMI_PHY) {
301*4882a593Smuzhiyun /* there is no public phy was initialized */
302*4882a593Smuzhiyun if (!data->phy_init) {
303*4882a593Smuzhiyun debug("start get public phy\n");
304*4882a593Smuzhiyun data->public_phy_type = type;
305*4882a593Smuzhiyun if (get_public_phy(conn, data)) {
306*4882a593Smuzhiyun printf("can't find correct public phy type\n");
307*4882a593Smuzhiyun free(data);
308*4882a593Smuzhiyun return -EINVAL;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /* if this phy has been initialized, get it directly */
314*4882a593Smuzhiyun conn->phy = (struct rockchip_phy *)data->phy_drv;
315*4882a593Smuzhiyun return 0;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
rockchip_ofnode_get_display_mode(ofnode node,struct drm_display_mode * mode,u32 * bus_flags)321*4882a593Smuzhiyun int rockchip_ofnode_get_display_mode(ofnode node, struct drm_display_mode *mode, u32 *bus_flags)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun int hactive, vactive, pixelclock;
324*4882a593Smuzhiyun int hfront_porch, hback_porch, hsync_len;
325*4882a593Smuzhiyun int vfront_porch, vback_porch, vsync_len;
326*4882a593Smuzhiyun int val, flags = 0;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun #define FDT_GET_BOOL(val, name) \
329*4882a593Smuzhiyun val = ofnode_read_bool(node, name);
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun #define FDT_GET_INT(val, name) \
332*4882a593Smuzhiyun val = ofnode_read_s32_default(node, name, -1); \
333*4882a593Smuzhiyun if (val < 0) { \
334*4882a593Smuzhiyun printf("Can't get %s\n", name); \
335*4882a593Smuzhiyun return -ENXIO; \
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun #define FDT_GET_INT_DEFAULT(val, name, default) \
339*4882a593Smuzhiyun val = ofnode_read_s32_default(node, name, default);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun FDT_GET_INT(hactive, "hactive");
342*4882a593Smuzhiyun FDT_GET_INT(vactive, "vactive");
343*4882a593Smuzhiyun FDT_GET_INT(pixelclock, "clock-frequency");
344*4882a593Smuzhiyun FDT_GET_INT(hsync_len, "hsync-len");
345*4882a593Smuzhiyun FDT_GET_INT(hfront_porch, "hfront-porch");
346*4882a593Smuzhiyun FDT_GET_INT(hback_porch, "hback-porch");
347*4882a593Smuzhiyun FDT_GET_INT(vsync_len, "vsync-len");
348*4882a593Smuzhiyun FDT_GET_INT(vfront_porch, "vfront-porch");
349*4882a593Smuzhiyun FDT_GET_INT(vback_porch, "vback-porch");
350*4882a593Smuzhiyun FDT_GET_INT(val, "hsync-active");
351*4882a593Smuzhiyun flags |= val ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
352*4882a593Smuzhiyun FDT_GET_INT(val, "vsync-active");
353*4882a593Smuzhiyun flags |= val ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun FDT_GET_BOOL(val, "interlaced");
356*4882a593Smuzhiyun flags |= val ? DRM_MODE_FLAG_INTERLACE : 0;
357*4882a593Smuzhiyun FDT_GET_BOOL(val, "doublescan");
358*4882a593Smuzhiyun flags |= val ? DRM_MODE_FLAG_DBLSCAN : 0;
359*4882a593Smuzhiyun FDT_GET_BOOL(val, "doubleclk");
360*4882a593Smuzhiyun flags |= val ? DISPLAY_FLAGS_DOUBLECLK : 0;
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun FDT_GET_INT(val, "de-active");
363*4882a593Smuzhiyun *bus_flags |= val ? DRM_BUS_FLAG_DE_HIGH : DRM_BUS_FLAG_DE_LOW;
364*4882a593Smuzhiyun FDT_GET_INT(val, "pixelclk-active");
365*4882a593Smuzhiyun *bus_flags |= val ? DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE : DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun FDT_GET_INT_DEFAULT(val, "screen-rotate", 0);
368*4882a593Smuzhiyun if (val == DRM_MODE_FLAG_XMIRROR) {
369*4882a593Smuzhiyun flags |= DRM_MODE_FLAG_XMIRROR;
370*4882a593Smuzhiyun } else if (val == DRM_MODE_FLAG_YMIRROR) {
371*4882a593Smuzhiyun flags |= DRM_MODE_FLAG_YMIRROR;
372*4882a593Smuzhiyun } else if (val == DRM_MODE_FLAG_XYMIRROR) {
373*4882a593Smuzhiyun flags |= DRM_MODE_FLAG_XMIRROR;
374*4882a593Smuzhiyun flags |= DRM_MODE_FLAG_YMIRROR;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun mode->hdisplay = hactive;
377*4882a593Smuzhiyun mode->hsync_start = mode->hdisplay + hfront_porch;
378*4882a593Smuzhiyun mode->hsync_end = mode->hsync_start + hsync_len;
379*4882a593Smuzhiyun mode->htotal = mode->hsync_end + hback_porch;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun mode->vdisplay = vactive;
382*4882a593Smuzhiyun mode->vsync_start = mode->vdisplay + vfront_porch;
383*4882a593Smuzhiyun mode->vsync_end = mode->vsync_start + vsync_len;
384*4882a593Smuzhiyun mode->vtotal = mode->vsync_end + vback_porch;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun mode->clock = pixelclock / 1000;
387*4882a593Smuzhiyun mode->flags = flags;
388*4882a593Smuzhiyun mode->vrefresh = drm_mode_vrefresh(mode);
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun return 0;
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
display_get_force_timing_from_dts(ofnode node,struct drm_display_mode * mode,u32 * bus_flags)393*4882a593Smuzhiyun static int display_get_force_timing_from_dts(ofnode node,
394*4882a593Smuzhiyun struct drm_display_mode *mode,
395*4882a593Smuzhiyun u32 *bus_flags)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun int ret = 0;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun ret = rockchip_ofnode_get_display_mode(node, mode, bus_flags);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun if (ret) {
402*4882a593Smuzhiyun mode->clock = 74250;
403*4882a593Smuzhiyun mode->flags = 0x5;
404*4882a593Smuzhiyun mode->hdisplay = 1280;
405*4882a593Smuzhiyun mode->hsync_start = 1390;
406*4882a593Smuzhiyun mode->hsync_end = 1430;
407*4882a593Smuzhiyun mode->htotal = 1650;
408*4882a593Smuzhiyun mode->hskew = 0;
409*4882a593Smuzhiyun mode->vdisplay = 720;
410*4882a593Smuzhiyun mode->vsync_start = 725;
411*4882a593Smuzhiyun mode->vsync_end = 730;
412*4882a593Smuzhiyun mode->vtotal = 750;
413*4882a593Smuzhiyun mode->vrefresh = 60;
414*4882a593Smuzhiyun mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
415*4882a593Smuzhiyun mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun printf("route node %s force_timing, use %dx%dp%d as default mode\n",
419*4882a593Smuzhiyun ret ? "undefine" : "define", mode->hdisplay, mode->vdisplay,
420*4882a593Smuzhiyun mode->vscan);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun return 0;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
display_get_timing_from_dts(struct rockchip_panel * panel,struct drm_display_mode * mode,u32 * bus_flags)425*4882a593Smuzhiyun static int display_get_timing_from_dts(struct rockchip_panel *panel,
426*4882a593Smuzhiyun struct drm_display_mode *mode,
427*4882a593Smuzhiyun u32 *bus_flags)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun struct ofnode_phandle_args args;
430*4882a593Smuzhiyun ofnode dt, timing, mcu_panel;
431*4882a593Smuzhiyun int ret;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun mcu_panel = dev_read_subnode(panel->dev, "mcu-panel");
434*4882a593Smuzhiyun dt = dev_read_subnode(panel->dev, "display-timings");
435*4882a593Smuzhiyun if (ofnode_valid(dt)) {
436*4882a593Smuzhiyun ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
437*4882a593Smuzhiyun 0, 0, &args);
438*4882a593Smuzhiyun if (ret)
439*4882a593Smuzhiyun return ret;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun timing = args.node;
442*4882a593Smuzhiyun } else if (ofnode_valid(mcu_panel)) {
443*4882a593Smuzhiyun dt = ofnode_find_subnode(mcu_panel, "display-timings");
444*4882a593Smuzhiyun ret = ofnode_parse_phandle_with_args(dt, "native-mode", NULL,
445*4882a593Smuzhiyun 0, 0, &args);
446*4882a593Smuzhiyun if (ret)
447*4882a593Smuzhiyun return ret;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun timing = args.node;
450*4882a593Smuzhiyun } else {
451*4882a593Smuzhiyun timing = dev_read_subnode(panel->dev, "panel-timing");
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun if (!ofnode_valid(timing)) {
455*4882a593Smuzhiyun printf("failed to get display timings from DT\n");
456*4882a593Smuzhiyun return -ENXIO;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun rockchip_ofnode_get_display_mode(timing, mode, bus_flags);
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_ROCKCHIP_RK3568) || IS_ENABLED(CONFIG_ROCKCHIP_RK3588)) {
462*4882a593Smuzhiyun if (mode->hdisplay % 4) {
463*4882a593Smuzhiyun int old_hdisplay = mode->hdisplay;
464*4882a593Smuzhiyun int align = 4 - (mode->hdisplay % 4);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun mode->hdisplay += align;
467*4882a593Smuzhiyun mode->hsync_start += align;
468*4882a593Smuzhiyun mode->hsync_end += align;
469*4882a593Smuzhiyun mode->htotal += align;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun ofnode_write_u32_array(timing, "hactive", (u32 *)&mode->hdisplay, 1);
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun printf("WARN: hactive need to be aligned with 4-pixel, %d -> %d\n",
474*4882a593Smuzhiyun old_hdisplay, mode->hdisplay);
475*4882a593Smuzhiyun }
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun return 0;
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun
display_get_timing(struct display_state * state)481*4882a593Smuzhiyun static int display_get_timing(struct display_state *state)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun struct connector_state *conn_state = &state->conn_state;
484*4882a593Smuzhiyun struct drm_display_mode *mode = &conn_state->mode;
485*4882a593Smuzhiyun const struct drm_display_mode *m;
486*4882a593Smuzhiyun struct rockchip_panel *panel = conn_state->connector->panel;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun if (panel->funcs->get_mode)
489*4882a593Smuzhiyun return panel->funcs->get_mode(panel, mode);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun if (dev_of_valid(panel->dev) &&
492*4882a593Smuzhiyun !display_get_timing_from_dts(panel, mode, &conn_state->bus_flags)) {
493*4882a593Smuzhiyun printf("Using display timing dts\n");
494*4882a593Smuzhiyun return 0;
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun if (panel->data) {
498*4882a593Smuzhiyun m = (const struct drm_display_mode *)panel->data;
499*4882a593Smuzhiyun memcpy(mode, m, sizeof(*m));
500*4882a593Smuzhiyun printf("Using display timing from compatible panel driver\n");
501*4882a593Smuzhiyun return 0;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun return -ENODEV;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
display_pre_init(void)507*4882a593Smuzhiyun static int display_pre_init(void)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun struct display_state *state;
510*4882a593Smuzhiyun int ret = 0;
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun list_for_each_entry(state, &rockchip_display_list, head) {
513*4882a593Smuzhiyun struct connector_state *conn_state = &state->conn_state;
514*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
515*4882a593Smuzhiyun struct rockchip_crtc *crtc = crtc_state->crtc;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun ret = rockchip_connector_pre_init(state);
518*4882a593Smuzhiyun if (ret)
519*4882a593Smuzhiyun printf("pre init conn error\n");
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun crtc->vps[crtc_state->crtc_id].output_type = conn_state->type;
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun return ret;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
display_use_force_mode(struct display_state * state)526*4882a593Smuzhiyun static int display_use_force_mode(struct display_state *state)
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun struct connector_state *conn_state = &state->conn_state;
529*4882a593Smuzhiyun struct drm_display_mode *mode = &conn_state->mode;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun conn_state->bpc = 8;
532*4882a593Smuzhiyun memcpy(mode, &state->force_mode, sizeof(struct drm_display_mode));
533*4882a593Smuzhiyun conn_state->bus_format = state->force_bus_format;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun return 0;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun
display_get_edid_mode(struct display_state * state)538*4882a593Smuzhiyun static int display_get_edid_mode(struct display_state *state)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun int ret = 0;
541*4882a593Smuzhiyun struct connector_state *conn_state = &state->conn_state;
542*4882a593Smuzhiyun struct drm_display_mode *mode = &conn_state->mode;
543*4882a593Smuzhiyun int bpc;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun ret = edid_get_drm_mode(conn_state->edid, sizeof(conn_state->edid), mode, &bpc);
546*4882a593Smuzhiyun if (!ret) {
547*4882a593Smuzhiyun conn_state->bpc = bpc;
548*4882a593Smuzhiyun edid_print_info((void *)&conn_state->edid);
549*4882a593Smuzhiyun } else {
550*4882a593Smuzhiyun conn_state->bpc = 8;
551*4882a593Smuzhiyun mode->clock = 74250;
552*4882a593Smuzhiyun mode->flags = 0x5;
553*4882a593Smuzhiyun mode->hdisplay = 1280;
554*4882a593Smuzhiyun mode->hsync_start = 1390;
555*4882a593Smuzhiyun mode->hsync_end = 1430;
556*4882a593Smuzhiyun mode->htotal = 1650;
557*4882a593Smuzhiyun mode->hskew = 0;
558*4882a593Smuzhiyun mode->vdisplay = 720;
559*4882a593Smuzhiyun mode->vsync_start = 725;
560*4882a593Smuzhiyun mode->vsync_end = 730;
561*4882a593Smuzhiyun mode->vtotal = 750;
562*4882a593Smuzhiyun mode->vrefresh = 60;
563*4882a593Smuzhiyun mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
564*4882a593Smuzhiyun mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun printf("error: %s get mode from edid failed, use 720p60 as default mode\n",
567*4882a593Smuzhiyun state->conn_state.connector->dev->name);
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun return ret;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
display_mode_valid(struct display_state * state)573*4882a593Smuzhiyun static int display_mode_valid(struct display_state *state)
574*4882a593Smuzhiyun {
575*4882a593Smuzhiyun struct connector_state *conn_state = &state->conn_state;
576*4882a593Smuzhiyun struct rockchip_connector *conn = conn_state->connector;
577*4882a593Smuzhiyun const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
578*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
579*4882a593Smuzhiyun const struct rockchip_crtc *crtc = crtc_state->crtc;
580*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
581*4882a593Smuzhiyun int ret;
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun if (conn_funcs->mode_valid && state->enabled_at_spl == false) {
584*4882a593Smuzhiyun ret = conn_funcs->mode_valid(conn, state);
585*4882a593Smuzhiyun if (ret)
586*4882a593Smuzhiyun return ret;
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun if (crtc_funcs->mode_valid) {
590*4882a593Smuzhiyun ret = crtc_funcs->mode_valid(state);
591*4882a593Smuzhiyun if (ret)
592*4882a593Smuzhiyun return ret;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun return 0;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun
display_mode_fixup(struct display_state * state)598*4882a593Smuzhiyun static int display_mode_fixup(struct display_state *state)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
601*4882a593Smuzhiyun const struct rockchip_crtc *crtc = crtc_state->crtc;
602*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
603*4882a593Smuzhiyun int ret;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun if (crtc_funcs->mode_fixup) {
606*4882a593Smuzhiyun ret = crtc_funcs->mode_fixup(state);
607*4882a593Smuzhiyun if (ret)
608*4882a593Smuzhiyun return ret;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun return 0;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
display_init(struct display_state * state)614*4882a593Smuzhiyun static int display_init(struct display_state *state)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun struct connector_state *conn_state = &state->conn_state;
617*4882a593Smuzhiyun struct rockchip_connector *conn = conn_state->connector;
618*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
619*4882a593Smuzhiyun struct rockchip_crtc *crtc = crtc_state->crtc;
620*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
621*4882a593Smuzhiyun struct drm_display_mode *mode = &conn_state->mode;
622*4882a593Smuzhiyun const char *compatible;
623*4882a593Smuzhiyun int ret = 0;
624*4882a593Smuzhiyun static bool __print_once = false;
625*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
626*4882a593Smuzhiyun struct spl_display_info *spl_disp_info = (struct spl_display_info *)CONFIG_SPL_VIDEO_BUF;
627*4882a593Smuzhiyun #endif
628*4882a593Smuzhiyun if (!__print_once) {
629*4882a593Smuzhiyun __print_once = true;
630*4882a593Smuzhiyun printf("Rockchip UBOOT DRM driver version: %s\n", DRIVER_VERSION);
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun if (state->is_init)
634*4882a593Smuzhiyun return 0;
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun if (!crtc_funcs) {
637*4882a593Smuzhiyun printf("failed to find crtc functions\n");
638*4882a593Smuzhiyun return -ENXIO;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
642*4882a593Smuzhiyun if (state->conn_state.type == DRM_MODE_CONNECTOR_HDMIA)
643*4882a593Smuzhiyun state->enabled_at_spl = spl_disp_info->enabled == 1 ? true : false;
644*4882a593Smuzhiyun if (state->enabled_at_spl)
645*4882a593Smuzhiyun printf("HDMI enabled at SPL\n");
646*4882a593Smuzhiyun #endif
647*4882a593Smuzhiyun if (crtc_state->crtc->active && !crtc_state->ports_node &&
648*4882a593Smuzhiyun memcmp(&crtc_state->crtc->active_mode, &conn_state->mode,
649*4882a593Smuzhiyun sizeof(struct drm_display_mode))) {
650*4882a593Smuzhiyun printf("%s has been used for output type: %d, mode: %dx%dp%d\n",
651*4882a593Smuzhiyun crtc_state->dev->name,
652*4882a593Smuzhiyun crtc_state->crtc->active_mode.type,
653*4882a593Smuzhiyun crtc_state->crtc->active_mode.hdisplay,
654*4882a593Smuzhiyun crtc_state->crtc->active_mode.vdisplay,
655*4882a593Smuzhiyun crtc_state->crtc->active_mode.vrefresh);
656*4882a593Smuzhiyun return -ENODEV;
657*4882a593Smuzhiyun }
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun if (crtc_funcs->preinit) {
660*4882a593Smuzhiyun ret = crtc_funcs->preinit(state);
661*4882a593Smuzhiyun if (ret)
662*4882a593Smuzhiyun return ret;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun if (state->enabled_at_spl == false) {
666*4882a593Smuzhiyun ret = rockchip_connector_init(state);
667*4882a593Smuzhiyun if (ret)
668*4882a593Smuzhiyun goto deinit;
669*4882a593Smuzhiyun }
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun /*
672*4882a593Smuzhiyun * support hotplug, but not connect;
673*4882a593Smuzhiyun */
674*4882a593Smuzhiyun #ifdef CONFIG_DRM_ROCKCHIP_TVE
675*4882a593Smuzhiyun if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_TV) {
676*4882a593Smuzhiyun printf("hdmi plugin ,skip tve\n");
677*4882a593Smuzhiyun goto deinit;
678*4882a593Smuzhiyun }
679*4882a593Smuzhiyun #elif defined(CONFIG_DRM_ROCKCHIP_RK1000)
680*4882a593Smuzhiyun if (crtc->hdmi_hpd && conn_state->type == DRM_MODE_CONNECTOR_LVDS) {
681*4882a593Smuzhiyun printf("hdmi plugin ,skip tve\n");
682*4882a593Smuzhiyun goto deinit;
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun #endif
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun ret = rockchip_connector_detect(state);
687*4882a593Smuzhiyun #if defined(CONFIG_DRM_ROCKCHIP_TVE) || defined(CONFIG_DRM_ROCKCHIP_RK1000)
688*4882a593Smuzhiyun if (conn_state->type == DRM_MODE_CONNECTOR_HDMIA)
689*4882a593Smuzhiyun crtc->hdmi_hpd = ret;
690*4882a593Smuzhiyun if (state->enabled_at_spl)
691*4882a593Smuzhiyun crtc->hdmi_hpd = true;
692*4882a593Smuzhiyun #endif
693*4882a593Smuzhiyun if (!ret && !state->force_output)
694*4882a593Smuzhiyun goto deinit;
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun ret = 0;
697*4882a593Smuzhiyun if (state->enabled_at_spl == true) {
698*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
699*4882a593Smuzhiyun struct drm_display_mode *mode = &conn_state->mode;
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun memcpy(mode, &spl_disp_info->mode, sizeof(*mode));
702*4882a593Smuzhiyun conn_state->bus_format = spl_disp_info->bus_format;
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun printf("%s get display mode from spl:%dx%d, bus format:0x%x\n",
705*4882a593Smuzhiyun conn->dev->name, mode->hdisplay, mode->vdisplay, conn_state->bus_format);
706*4882a593Smuzhiyun #endif
707*4882a593Smuzhiyun } else if (conn->panel) {
708*4882a593Smuzhiyun ret = display_get_timing(state);
709*4882a593Smuzhiyun if (!ret)
710*4882a593Smuzhiyun conn_state->bpc = conn->panel->bpc;
711*4882a593Smuzhiyun #if defined(CONFIG_I2C_EDID)
712*4882a593Smuzhiyun if (ret < 0 && conn->funcs->get_edid) {
713*4882a593Smuzhiyun rockchip_panel_prepare(conn->panel);
714*4882a593Smuzhiyun ret = conn->funcs->get_edid(conn, state);
715*4882a593Smuzhiyun if (!ret)
716*4882a593Smuzhiyun display_get_edid_mode(state);
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun #endif
719*4882a593Smuzhiyun } else if (conn->bridge) {
720*4882a593Smuzhiyun ret = video_bridge_read_edid(conn->bridge->dev,
721*4882a593Smuzhiyun conn_state->edid, EDID_SIZE);
722*4882a593Smuzhiyun if (ret > 0) {
723*4882a593Smuzhiyun #if defined(CONFIG_I2C_EDID)
724*4882a593Smuzhiyun display_get_edid_mode(state);
725*4882a593Smuzhiyun #endif
726*4882a593Smuzhiyun } else {
727*4882a593Smuzhiyun ret = video_bridge_get_timing(conn->bridge->dev);
728*4882a593Smuzhiyun }
729*4882a593Smuzhiyun } else if (conn->funcs->get_timing) {
730*4882a593Smuzhiyun ret = conn->funcs->get_timing(conn, state);
731*4882a593Smuzhiyun } else if (conn->funcs->get_edid) {
732*4882a593Smuzhiyun ret = conn->funcs->get_edid(conn, state);
733*4882a593Smuzhiyun #if defined(CONFIG_I2C_EDID)
734*4882a593Smuzhiyun if (!ret)
735*4882a593Smuzhiyun display_get_edid_mode(state);
736*4882a593Smuzhiyun #endif
737*4882a593Smuzhiyun }
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun if (!ret && conn_state->secondary) {
740*4882a593Smuzhiyun struct rockchip_connector *connector = conn_state->secondary;
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun if (connector->panel) {
743*4882a593Smuzhiyun if (connector->panel->funcs->get_mode) {
744*4882a593Smuzhiyun struct drm_display_mode *_mode = drm_mode_create();
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun ret = connector->panel->funcs->get_mode(connector->panel, _mode);
747*4882a593Smuzhiyun if (!ret && !drm_mode_equal(_mode, mode))
748*4882a593Smuzhiyun ret = -EINVAL;
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun drm_mode_destroy(_mode);
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun if (ret && !state->force_output)
756*4882a593Smuzhiyun goto deinit;
757*4882a593Smuzhiyun if (state->force_output)
758*4882a593Smuzhiyun display_use_force_mode(state);
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun if (display_mode_valid(state))
761*4882a593Smuzhiyun goto deinit;
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun /* rk356x series drive mipi pixdata on posedge */
764*4882a593Smuzhiyun compatible = dev_read_string(conn->dev, "compatible");
765*4882a593Smuzhiyun if (!strcmp(compatible, "rockchip,rk3568-mipi-dsi")) {
766*4882a593Smuzhiyun conn_state->bus_flags &= ~DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
767*4882a593Smuzhiyun conn_state->bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun printf("%s: %s detailed mode clock %u kHz, flags[%x]\n"
771*4882a593Smuzhiyun " H: %04d %04d %04d %04d\n"
772*4882a593Smuzhiyun " V: %04d %04d %04d %04d\n"
773*4882a593Smuzhiyun "bus_format: %x\n",
774*4882a593Smuzhiyun conn->dev->name,
775*4882a593Smuzhiyun state->force_output ? "use force output" : "",
776*4882a593Smuzhiyun mode->clock, mode->flags,
777*4882a593Smuzhiyun mode->hdisplay, mode->hsync_start,
778*4882a593Smuzhiyun mode->hsync_end, mode->htotal,
779*4882a593Smuzhiyun mode->vdisplay, mode->vsync_start,
780*4882a593Smuzhiyun mode->vsync_end, mode->vtotal,
781*4882a593Smuzhiyun conn_state->bus_format);
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun if (display_mode_fixup(state))
784*4882a593Smuzhiyun goto deinit;
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun if (conn->bridge)
787*4882a593Smuzhiyun rockchip_bridge_mode_set(conn->bridge, &conn_state->mode);
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun if (crtc_funcs->init && state->enabled_at_spl == false) {
790*4882a593Smuzhiyun ret = crtc_funcs->init(state);
791*4882a593Smuzhiyun if (ret)
792*4882a593Smuzhiyun goto deinit;
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun state->is_init = 1;
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun crtc_state->crtc->active = true;
797*4882a593Smuzhiyun memcpy(&crtc_state->crtc->active_mode,
798*4882a593Smuzhiyun &conn_state->mode, sizeof(struct drm_display_mode));
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun return 0;
801*4882a593Smuzhiyun
802*4882a593Smuzhiyun deinit:
803*4882a593Smuzhiyun rockchip_connector_deinit(state);
804*4882a593Smuzhiyun return ret;
805*4882a593Smuzhiyun }
806*4882a593Smuzhiyun
display_send_mcu_cmd(struct display_state * state,u32 type,u32 val)807*4882a593Smuzhiyun int display_send_mcu_cmd(struct display_state *state, u32 type, u32 val)
808*4882a593Smuzhiyun {
809*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
810*4882a593Smuzhiyun const struct rockchip_crtc *crtc = crtc_state->crtc;
811*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
812*4882a593Smuzhiyun int ret;
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun if (!state->is_init)
815*4882a593Smuzhiyun return -EINVAL;
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun if (crtc_funcs->send_mcu_cmd) {
818*4882a593Smuzhiyun ret = crtc_funcs->send_mcu_cmd(state, type, val);
819*4882a593Smuzhiyun if (ret)
820*4882a593Smuzhiyun return ret;
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun return 0;
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun
display_set_plane(struct display_state * state)826*4882a593Smuzhiyun static int display_set_plane(struct display_state *state)
827*4882a593Smuzhiyun {
828*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
829*4882a593Smuzhiyun const struct rockchip_crtc *crtc = crtc_state->crtc;
830*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
831*4882a593Smuzhiyun int ret;
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun if (!state->is_init)
834*4882a593Smuzhiyun return -EINVAL;
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun if (crtc_funcs->set_plane) {
837*4882a593Smuzhiyun ret = crtc_funcs->set_plane(state);
838*4882a593Smuzhiyun if (ret)
839*4882a593Smuzhiyun return ret;
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun return 0;
843*4882a593Smuzhiyun }
844*4882a593Smuzhiyun
display_enable(struct display_state * state)845*4882a593Smuzhiyun static int display_enable(struct display_state *state)
846*4882a593Smuzhiyun {
847*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
848*4882a593Smuzhiyun const struct rockchip_crtc *crtc = crtc_state->crtc;
849*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun if (!state->is_init)
852*4882a593Smuzhiyun return -EINVAL;
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun if (state->is_enable)
855*4882a593Smuzhiyun return 0;
856*4882a593Smuzhiyun
857*4882a593Smuzhiyun if (crtc_funcs->prepare)
858*4882a593Smuzhiyun crtc_funcs->prepare(state);
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun if (state->enabled_at_spl == false)
861*4882a593Smuzhiyun rockchip_connector_pre_enable(state);
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun if (crtc_funcs->enable)
864*4882a593Smuzhiyun crtc_funcs->enable(state);
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun if (state->enabled_at_spl == false)
867*4882a593Smuzhiyun rockchip_connector_enable(state);
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun if (crtc_state->soft_te)
870*4882a593Smuzhiyun crtc_funcs->apply_soft_te(state);
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun state->is_enable = true;
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun return 0;
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun
display_disable(struct display_state * state)877*4882a593Smuzhiyun static int display_disable(struct display_state *state)
878*4882a593Smuzhiyun {
879*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
880*4882a593Smuzhiyun const struct rockchip_crtc *crtc = crtc_state->crtc;
881*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun if (!state->is_init)
884*4882a593Smuzhiyun return 0;
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun if (!state->is_enable)
887*4882a593Smuzhiyun return 0;
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun rockchip_connector_disable(state);
890*4882a593Smuzhiyun
891*4882a593Smuzhiyun if (crtc_funcs->disable)
892*4882a593Smuzhiyun crtc_funcs->disable(state);
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun rockchip_connector_post_disable(state);
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun state->is_enable = 0;
897*4882a593Smuzhiyun state->is_init = 0;
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun return 0;
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun
display_check(struct display_state * state)902*4882a593Smuzhiyun static int display_check(struct display_state *state)
903*4882a593Smuzhiyun {
904*4882a593Smuzhiyun struct connector_state *conn_state = &state->conn_state;
905*4882a593Smuzhiyun struct rockchip_connector *conn = conn_state->connector;
906*4882a593Smuzhiyun const struct rockchip_connector_funcs *conn_funcs = conn->funcs;
907*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
908*4882a593Smuzhiyun const struct rockchip_crtc *crtc = crtc_state->crtc;
909*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs = crtc->funcs;
910*4882a593Smuzhiyun int ret;
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun if (!state->is_init)
913*4882a593Smuzhiyun return 0;
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun if (conn_funcs->check) {
916*4882a593Smuzhiyun ret = conn_funcs->check(conn, state);
917*4882a593Smuzhiyun if (ret)
918*4882a593Smuzhiyun goto check_fail;
919*4882a593Smuzhiyun }
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun if (crtc_funcs->check) {
922*4882a593Smuzhiyun ret = crtc_funcs->check(state);
923*4882a593Smuzhiyun if (ret)
924*4882a593Smuzhiyun goto check_fail;
925*4882a593Smuzhiyun }
926*4882a593Smuzhiyun
927*4882a593Smuzhiyun if (crtc_funcs->plane_check) {
928*4882a593Smuzhiyun ret = crtc_funcs->plane_check(state);
929*4882a593Smuzhiyun if (ret)
930*4882a593Smuzhiyun goto check_fail;
931*4882a593Smuzhiyun }
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun return 0;
934*4882a593Smuzhiyun
935*4882a593Smuzhiyun check_fail:
936*4882a593Smuzhiyun state->is_init = false;
937*4882a593Smuzhiyun return ret;
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun
display_logo(struct display_state * state)940*4882a593Smuzhiyun static int display_logo(struct display_state *state)
941*4882a593Smuzhiyun {
942*4882a593Smuzhiyun struct crtc_state *crtc_state = &state->crtc_state;
943*4882a593Smuzhiyun struct connector_state *conn_state = &state->conn_state;
944*4882a593Smuzhiyun struct logo_info *logo = &state->logo;
945*4882a593Smuzhiyun int hdisplay, vdisplay, ret;
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun ret = display_init(state);
948*4882a593Smuzhiyun if (!state->is_init || ret)
949*4882a593Smuzhiyun return -ENODEV;
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun switch (logo->bpp) {
952*4882a593Smuzhiyun case 16:
953*4882a593Smuzhiyun crtc_state->format = ROCKCHIP_FMT_RGB565;
954*4882a593Smuzhiyun break;
955*4882a593Smuzhiyun case 24:
956*4882a593Smuzhiyun crtc_state->format = ROCKCHIP_FMT_RGB888;
957*4882a593Smuzhiyun break;
958*4882a593Smuzhiyun case 32:
959*4882a593Smuzhiyun crtc_state->format = ROCKCHIP_FMT_ARGB8888;
960*4882a593Smuzhiyun break;
961*4882a593Smuzhiyun default:
962*4882a593Smuzhiyun printf("can't support bmp bits[%d]\n", logo->bpp);
963*4882a593Smuzhiyun return -EINVAL;
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun hdisplay = conn_state->mode.crtc_hdisplay;
966*4882a593Smuzhiyun vdisplay = conn_state->mode.vdisplay;
967*4882a593Smuzhiyun crtc_state->src_rect.w = logo->width;
968*4882a593Smuzhiyun crtc_state->src_rect.h = logo->height;
969*4882a593Smuzhiyun crtc_state->src_rect.x = 0;
970*4882a593Smuzhiyun crtc_state->src_rect.y = 0;
971*4882a593Smuzhiyun crtc_state->ymirror = logo->ymirror;
972*4882a593Smuzhiyun crtc_state->rb_swap = 0;
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun crtc_state->dma_addr = (u32)(unsigned long)logo->mem + logo->offset;
975*4882a593Smuzhiyun crtc_state->xvir = ALIGN(crtc_state->src_rect.w * logo->bpp, 32) >> 5;
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun if (state->logo_mode == ROCKCHIP_DISPLAY_FULLSCREEN) {
978*4882a593Smuzhiyun crtc_state->crtc_rect.x = 0;
979*4882a593Smuzhiyun crtc_state->crtc_rect.y = 0;
980*4882a593Smuzhiyun crtc_state->crtc_rect.w = hdisplay;
981*4882a593Smuzhiyun crtc_state->crtc_rect.h = vdisplay;
982*4882a593Smuzhiyun } else {
983*4882a593Smuzhiyun if (crtc_state->src_rect.w >= hdisplay) {
984*4882a593Smuzhiyun crtc_state->crtc_rect.x = 0;
985*4882a593Smuzhiyun crtc_state->crtc_rect.w = hdisplay;
986*4882a593Smuzhiyun } else {
987*4882a593Smuzhiyun crtc_state->crtc_rect.x = (hdisplay - crtc_state->src_rect.w) / 2;
988*4882a593Smuzhiyun crtc_state->crtc_rect.w = crtc_state->src_rect.w;
989*4882a593Smuzhiyun }
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun if (crtc_state->src_rect.h >= vdisplay) {
992*4882a593Smuzhiyun crtc_state->crtc_rect.y = 0;
993*4882a593Smuzhiyun crtc_state->crtc_rect.h = vdisplay;
994*4882a593Smuzhiyun } else {
995*4882a593Smuzhiyun crtc_state->crtc_rect.y = (vdisplay - crtc_state->src_rect.h) / 2;
996*4882a593Smuzhiyun crtc_state->crtc_rect.h = crtc_state->src_rect.h;
997*4882a593Smuzhiyun }
998*4882a593Smuzhiyun }
999*4882a593Smuzhiyun
1000*4882a593Smuzhiyun display_check(state);
1001*4882a593Smuzhiyun display_set_plane(state);
1002*4882a593Smuzhiyun display_enable(state);
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun return 0;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun
get_crtc_id(ofnode connect,bool is_ports_node)1007*4882a593Smuzhiyun static int get_crtc_id(ofnode connect, bool is_ports_node)
1008*4882a593Smuzhiyun {
1009*4882a593Smuzhiyun struct device_node *port_node;
1010*4882a593Smuzhiyun struct device_node *remote;
1011*4882a593Smuzhiyun int phandle;
1012*4882a593Smuzhiyun int val;
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun if (is_ports_node) {
1015*4882a593Smuzhiyun port_node = of_get_parent(connect.np);
1016*4882a593Smuzhiyun if (!port_node)
1017*4882a593Smuzhiyun goto err;
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun val = ofnode_read_u32_default(np_to_ofnode(port_node), "reg", -1);
1020*4882a593Smuzhiyun if (val < 0)
1021*4882a593Smuzhiyun goto err;
1022*4882a593Smuzhiyun } else {
1023*4882a593Smuzhiyun phandle = ofnode_read_u32_default(connect, "remote-endpoint", -1);
1024*4882a593Smuzhiyun if (phandle < 0)
1025*4882a593Smuzhiyun goto err;
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun remote = of_find_node_by_phandle(phandle);
1028*4882a593Smuzhiyun if (!remote)
1029*4882a593Smuzhiyun goto err;
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun val = ofnode_read_u32_default(np_to_ofnode(remote), "reg", -1);
1032*4882a593Smuzhiyun if (val < 0)
1033*4882a593Smuzhiyun goto err;
1034*4882a593Smuzhiyun }
1035*4882a593Smuzhiyun
1036*4882a593Smuzhiyun return val;
1037*4882a593Smuzhiyun err:
1038*4882a593Smuzhiyun printf("Can't get crtc id, default set to id = 0\n");
1039*4882a593Smuzhiyun return 0;
1040*4882a593Smuzhiyun }
1041*4882a593Smuzhiyun
get_crtc_mcu_mode(struct crtc_state * crtc_state,struct device_node * port_node,bool is_ports_node)1042*4882a593Smuzhiyun static int get_crtc_mcu_mode(struct crtc_state *crtc_state, struct device_node *port_node,
1043*4882a593Smuzhiyun bool is_ports_node)
1044*4882a593Smuzhiyun {
1045*4882a593Smuzhiyun ofnode mcu_node, vp_node;
1046*4882a593Smuzhiyun int total_pixel, cs_pst, cs_pend, rw_pst, rw_pend;
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun if (is_ports_node) {
1049*4882a593Smuzhiyun vp_node = np_to_ofnode(port_node);
1050*4882a593Smuzhiyun mcu_node = ofnode_find_subnode(vp_node, "mcu-timing");
1051*4882a593Smuzhiyun if (!ofnode_valid(mcu_node))
1052*4882a593Smuzhiyun return -ENODEV;
1053*4882a593Smuzhiyun } else {
1054*4882a593Smuzhiyun mcu_node = dev_read_subnode(crtc_state->dev, "mcu-timing");
1055*4882a593Smuzhiyun if (!ofnode_valid(mcu_node))
1056*4882a593Smuzhiyun return -ENODEV;
1057*4882a593Smuzhiyun }
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun #define FDT_GET_MCU_INT(val, name) \
1060*4882a593Smuzhiyun do { \
1061*4882a593Smuzhiyun val = ofnode_read_s32_default(mcu_node, name, -1); \
1062*4882a593Smuzhiyun if (val < 0) { \
1063*4882a593Smuzhiyun printf("Can't get %s\n", name); \
1064*4882a593Smuzhiyun return -ENXIO; \
1065*4882a593Smuzhiyun } \
1066*4882a593Smuzhiyun } while (0)
1067*4882a593Smuzhiyun
1068*4882a593Smuzhiyun FDT_GET_MCU_INT(total_pixel, "mcu-pix-total");
1069*4882a593Smuzhiyun FDT_GET_MCU_INT(cs_pst, "mcu-cs-pst");
1070*4882a593Smuzhiyun FDT_GET_MCU_INT(cs_pend, "mcu-cs-pend");
1071*4882a593Smuzhiyun FDT_GET_MCU_INT(rw_pst, "mcu-rw-pst");
1072*4882a593Smuzhiyun FDT_GET_MCU_INT(rw_pend, "mcu-rw-pend");
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun crtc_state->mcu_timing.mcu_pix_total = total_pixel;
1075*4882a593Smuzhiyun crtc_state->mcu_timing.mcu_cs_pst = cs_pst;
1076*4882a593Smuzhiyun crtc_state->mcu_timing.mcu_cs_pend = cs_pend;
1077*4882a593Smuzhiyun crtc_state->mcu_timing.mcu_rw_pst = rw_pst;
1078*4882a593Smuzhiyun crtc_state->mcu_timing.mcu_rw_pend = rw_pend;
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun return 0;
1081*4882a593Smuzhiyun }
1082*4882a593Smuzhiyun
find_or_alloc_logo_cache(const char * bmp)1083*4882a593Smuzhiyun struct rockchip_logo_cache *find_or_alloc_logo_cache(const char *bmp)
1084*4882a593Smuzhiyun {
1085*4882a593Smuzhiyun struct rockchip_logo_cache *tmp, *logo_cache = NULL;
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun list_for_each_entry(tmp, &logo_cache_list, head) {
1088*4882a593Smuzhiyun if (!strcmp(tmp->name, bmp)) {
1089*4882a593Smuzhiyun logo_cache = tmp;
1090*4882a593Smuzhiyun break;
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun if (!logo_cache) {
1095*4882a593Smuzhiyun logo_cache = malloc(sizeof(*logo_cache));
1096*4882a593Smuzhiyun if (!logo_cache) {
1097*4882a593Smuzhiyun printf("failed to alloc memory for logo cache\n");
1098*4882a593Smuzhiyun return NULL;
1099*4882a593Smuzhiyun }
1100*4882a593Smuzhiyun memset(logo_cache, 0, sizeof(*logo_cache));
1101*4882a593Smuzhiyun strcpy(logo_cache->name, bmp);
1102*4882a593Smuzhiyun INIT_LIST_HEAD(&logo_cache->head);
1103*4882a593Smuzhiyun list_add_tail(&logo_cache->head, &logo_cache_list);
1104*4882a593Smuzhiyun }
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun return logo_cache;
1107*4882a593Smuzhiyun }
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun /* Note: used only for rkfb kernel driver */
load_kernel_bmp_logo(struct logo_info * logo,const char * bmp_name)1110*4882a593Smuzhiyun static int load_kernel_bmp_logo(struct logo_info *logo, const char *bmp_name)
1111*4882a593Smuzhiyun {
1112*4882a593Smuzhiyun #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1113*4882a593Smuzhiyun void *dst = NULL;
1114*4882a593Smuzhiyun int len, size;
1115*4882a593Smuzhiyun struct bmp_header *header;
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun if (!logo || !bmp_name)
1118*4882a593Smuzhiyun return -EINVAL;
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun header = malloc(RK_BLK_SIZE);
1121*4882a593Smuzhiyun if (!header)
1122*4882a593Smuzhiyun return -ENOMEM;
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1125*4882a593Smuzhiyun if (len != RK_BLK_SIZE) {
1126*4882a593Smuzhiyun free(header);
1127*4882a593Smuzhiyun return -EINVAL;
1128*4882a593Smuzhiyun }
1129*4882a593Smuzhiyun size = get_unaligned_le32(&header->file_size);
1130*4882a593Smuzhiyun dst = (void *)(memory_start + MEMORY_POOL_SIZE / 2);
1131*4882a593Smuzhiyun len = rockchip_read_resource_file(dst, bmp_name, 0, size);
1132*4882a593Smuzhiyun if (len != size) {
1133*4882a593Smuzhiyun printf("failed to load bmp %s\n", bmp_name);
1134*4882a593Smuzhiyun free(header);
1135*4882a593Smuzhiyun return -ENOENT;
1136*4882a593Smuzhiyun }
1137*4882a593Smuzhiyun
1138*4882a593Smuzhiyun logo->mem = dst;
1139*4882a593Smuzhiyun #endif
1140*4882a593Smuzhiyun
1141*4882a593Smuzhiyun return 0;
1142*4882a593Smuzhiyun }
1143*4882a593Smuzhiyun
load_bmp_logo(struct logo_info * logo,const char * bmp_name)1144*4882a593Smuzhiyun static int load_bmp_logo(struct logo_info *logo, const char *bmp_name)
1145*4882a593Smuzhiyun {
1146*4882a593Smuzhiyun #ifdef CONFIG_ROCKCHIP_RESOURCE_IMAGE
1147*4882a593Smuzhiyun struct rockchip_logo_cache *logo_cache;
1148*4882a593Smuzhiyun struct bmp_header *header;
1149*4882a593Smuzhiyun void *dst = NULL, *pdst;
1150*4882a593Smuzhiyun int size, len;
1151*4882a593Smuzhiyun int ret = 0;
1152*4882a593Smuzhiyun int reserved = 0;
1153*4882a593Smuzhiyun int dst_size;
1154*4882a593Smuzhiyun
1155*4882a593Smuzhiyun if (!logo || !bmp_name)
1156*4882a593Smuzhiyun return -EINVAL;
1157*4882a593Smuzhiyun logo_cache = find_or_alloc_logo_cache(bmp_name);
1158*4882a593Smuzhiyun if (!logo_cache)
1159*4882a593Smuzhiyun return -ENOMEM;
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun if (logo_cache->logo.mem) {
1162*4882a593Smuzhiyun memcpy(logo, &logo_cache->logo, sizeof(*logo));
1163*4882a593Smuzhiyun return 0;
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun header = malloc(RK_BLK_SIZE);
1167*4882a593Smuzhiyun if (!header)
1168*4882a593Smuzhiyun return -ENOMEM;
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun len = rockchip_read_resource_file(header, bmp_name, 0, RK_BLK_SIZE);
1171*4882a593Smuzhiyun if (len != RK_BLK_SIZE) {
1172*4882a593Smuzhiyun ret = -EINVAL;
1173*4882a593Smuzhiyun goto free_header;
1174*4882a593Smuzhiyun }
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun logo->bpp = get_unaligned_le16(&header->bit_count);
1177*4882a593Smuzhiyun logo->width = get_unaligned_le32(&header->width);
1178*4882a593Smuzhiyun logo->height = get_unaligned_le32(&header->height);
1179*4882a593Smuzhiyun dst_size = logo->width * logo->height * logo->bpp >> 3;
1180*4882a593Smuzhiyun reserved = get_unaligned_le32(&header->reserved);
1181*4882a593Smuzhiyun if (logo->height < 0)
1182*4882a593Smuzhiyun logo->height = -logo->height;
1183*4882a593Smuzhiyun size = get_unaligned_le32(&header->file_size);
1184*4882a593Smuzhiyun if (!can_direct_logo(logo->bpp)) {
1185*4882a593Smuzhiyun if (size > MEMORY_POOL_SIZE) {
1186*4882a593Smuzhiyun printf("failed to use boot buf as temp bmp buffer\n");
1187*4882a593Smuzhiyun ret = -ENOMEM;
1188*4882a593Smuzhiyun goto free_header;
1189*4882a593Smuzhiyun }
1190*4882a593Smuzhiyun pdst = get_display_buffer(size);
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun } else {
1193*4882a593Smuzhiyun pdst = get_display_buffer(size);
1194*4882a593Smuzhiyun dst = pdst;
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun len = rockchip_read_resource_file(pdst, bmp_name, 0, size);
1198*4882a593Smuzhiyun if (len != size) {
1199*4882a593Smuzhiyun printf("failed to load bmp %s\n", bmp_name);
1200*4882a593Smuzhiyun ret = -ENOENT;
1201*4882a593Smuzhiyun goto free_header;
1202*4882a593Smuzhiyun }
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun if (!can_direct_logo(logo->bpp)) {
1205*4882a593Smuzhiyun /*
1206*4882a593Smuzhiyun * TODO: force use 16bpp if bpp less than 16;
1207*4882a593Smuzhiyun */
1208*4882a593Smuzhiyun logo->bpp = (logo->bpp <= 16) ? 16 : logo->bpp;
1209*4882a593Smuzhiyun dst_size = logo->width * logo->height * logo->bpp >> 3;
1210*4882a593Smuzhiyun dst = get_display_buffer(dst_size);
1211*4882a593Smuzhiyun if (!dst) {
1212*4882a593Smuzhiyun ret = -ENOMEM;
1213*4882a593Smuzhiyun goto free_header;
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun if (bmpdecoder(pdst, dst, logo->bpp)) {
1216*4882a593Smuzhiyun printf("failed to decode bmp %s\n", bmp_name);
1217*4882a593Smuzhiyun ret = -EINVAL;
1218*4882a593Smuzhiyun goto free_header;
1219*4882a593Smuzhiyun }
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun logo->offset = 0;
1222*4882a593Smuzhiyun logo->ymirror = 0;
1223*4882a593Smuzhiyun } else {
1224*4882a593Smuzhiyun logo->offset = get_unaligned_le32(&header->data_offset);
1225*4882a593Smuzhiyun if (reserved == BMP_PROCESSED_FLAG)
1226*4882a593Smuzhiyun logo->ymirror = 0;
1227*4882a593Smuzhiyun else
1228*4882a593Smuzhiyun logo->ymirror = 1;
1229*4882a593Smuzhiyun }
1230*4882a593Smuzhiyun logo->mem = dst;
1231*4882a593Smuzhiyun
1232*4882a593Smuzhiyun memcpy(&logo_cache->logo, logo, sizeof(*logo));
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun flush_dcache_range((ulong)dst, ALIGN((ulong)dst + dst_size, CONFIG_SYS_CACHELINE_SIZE));
1235*4882a593Smuzhiyun
1236*4882a593Smuzhiyun free_header:
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun free(header);
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun return ret;
1241*4882a593Smuzhiyun #else
1242*4882a593Smuzhiyun return -EINVAL;
1243*4882a593Smuzhiyun #endif
1244*4882a593Smuzhiyun }
1245*4882a593Smuzhiyun
rockchip_show_fbbase(ulong fbbase)1246*4882a593Smuzhiyun void rockchip_show_fbbase(ulong fbbase)
1247*4882a593Smuzhiyun {
1248*4882a593Smuzhiyun struct display_state *s;
1249*4882a593Smuzhiyun
1250*4882a593Smuzhiyun list_for_each_entry(s, &rockchip_display_list, head) {
1251*4882a593Smuzhiyun s->logo.mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1252*4882a593Smuzhiyun s->logo.mem = (char *)fbbase;
1253*4882a593Smuzhiyun s->logo.width = DRM_ROCKCHIP_FB_WIDTH;
1254*4882a593Smuzhiyun s->logo.height = DRM_ROCKCHIP_FB_HEIGHT;
1255*4882a593Smuzhiyun s->logo.bpp = 32;
1256*4882a593Smuzhiyun s->logo.ymirror = 0;
1257*4882a593Smuzhiyun
1258*4882a593Smuzhiyun display_logo(s);
1259*4882a593Smuzhiyun }
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun
rockchip_show_bmp(const char * bmp)1262*4882a593Smuzhiyun int rockchip_show_bmp(const char *bmp)
1263*4882a593Smuzhiyun {
1264*4882a593Smuzhiyun struct display_state *s;
1265*4882a593Smuzhiyun int ret = 0;
1266*4882a593Smuzhiyun
1267*4882a593Smuzhiyun if (!bmp) {
1268*4882a593Smuzhiyun list_for_each_entry(s, &rockchip_display_list, head)
1269*4882a593Smuzhiyun display_disable(s);
1270*4882a593Smuzhiyun return -ENOENT;
1271*4882a593Smuzhiyun }
1272*4882a593Smuzhiyun
1273*4882a593Smuzhiyun list_for_each_entry(s, &rockchip_display_list, head) {
1274*4882a593Smuzhiyun s->logo.mode = s->charge_logo_mode;
1275*4882a593Smuzhiyun if (load_bmp_logo(&s->logo, bmp))
1276*4882a593Smuzhiyun continue;
1277*4882a593Smuzhiyun ret = display_logo(s);
1278*4882a593Smuzhiyun }
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun return ret;
1281*4882a593Smuzhiyun }
1282*4882a593Smuzhiyun
rockchip_show_logo(void)1283*4882a593Smuzhiyun int rockchip_show_logo(void)
1284*4882a593Smuzhiyun {
1285*4882a593Smuzhiyun struct display_state *s;
1286*4882a593Smuzhiyun int ret = 0;
1287*4882a593Smuzhiyun
1288*4882a593Smuzhiyun list_for_each_entry(s, &rockchip_display_list, head) {
1289*4882a593Smuzhiyun s->logo.mode = s->logo_mode;
1290*4882a593Smuzhiyun if (load_bmp_logo(&s->logo, s->ulogo_name))
1291*4882a593Smuzhiyun printf("failed to display uboot logo\n");
1292*4882a593Smuzhiyun else
1293*4882a593Smuzhiyun ret = display_logo(s);
1294*4882a593Smuzhiyun
1295*4882a593Smuzhiyun /* Load kernel bmp in rockchip_display_fixup() later */
1296*4882a593Smuzhiyun }
1297*4882a593Smuzhiyun
1298*4882a593Smuzhiyun return ret;
1299*4882a593Smuzhiyun }
1300*4882a593Smuzhiyun
rockchip_vop_dump(const char * cmd)1301*4882a593Smuzhiyun int rockchip_vop_dump(const char *cmd)
1302*4882a593Smuzhiyun {
1303*4882a593Smuzhiyun struct display_state *state;
1304*4882a593Smuzhiyun struct crtc_state *crtc_state;
1305*4882a593Smuzhiyun struct rockchip_crtc *crtc;
1306*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs;
1307*4882a593Smuzhiyun int ret = -EINVAL;
1308*4882a593Smuzhiyun
1309*4882a593Smuzhiyun list_for_each_entry(state, &rockchip_display_list, head) {
1310*4882a593Smuzhiyun if (!state->is_init)
1311*4882a593Smuzhiyun continue;
1312*4882a593Smuzhiyun crtc_state = &state->crtc_state;
1313*4882a593Smuzhiyun crtc = crtc_state->crtc;
1314*4882a593Smuzhiyun crtc_funcs = crtc->funcs;
1315*4882a593Smuzhiyun
1316*4882a593Smuzhiyun if (!cmd)
1317*4882a593Smuzhiyun ret = crtc_funcs->active_regs_dump(state);
1318*4882a593Smuzhiyun else if (!strcmp(cmd, "a") || !strcmp(cmd, "all"))
1319*4882a593Smuzhiyun ret = crtc_funcs->regs_dump(state);
1320*4882a593Smuzhiyun if (!ret)
1321*4882a593Smuzhiyun break;
1322*4882a593Smuzhiyun }
1323*4882a593Smuzhiyun
1324*4882a593Smuzhiyun if (ret)
1325*4882a593Smuzhiyun ret = CMD_RET_USAGE;
1326*4882a593Smuzhiyun
1327*4882a593Smuzhiyun return ret;
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun enum {
1331*4882a593Smuzhiyun PORT_DIR_IN,
1332*4882a593Smuzhiyun PORT_DIR_OUT,
1333*4882a593Smuzhiyun };
1334*4882a593Smuzhiyun
rockchip_of_graph_get_port_by_id(ofnode node,int id)1335*4882a593Smuzhiyun static const struct device_node *rockchip_of_graph_get_port_by_id(ofnode node, int id)
1336*4882a593Smuzhiyun {
1337*4882a593Smuzhiyun ofnode ports, port;
1338*4882a593Smuzhiyun u32 reg;
1339*4882a593Smuzhiyun
1340*4882a593Smuzhiyun ports = ofnode_find_subnode(node, "ports");
1341*4882a593Smuzhiyun if (!ofnode_valid(ports))
1342*4882a593Smuzhiyun return NULL;
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun ofnode_for_each_subnode(port, ports) {
1345*4882a593Smuzhiyun if (ofnode_read_u32(port, "reg", ®))
1346*4882a593Smuzhiyun continue;
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun if (reg == id)
1349*4882a593Smuzhiyun break;
1350*4882a593Smuzhiyun }
1351*4882a593Smuzhiyun
1352*4882a593Smuzhiyun if (reg == id)
1353*4882a593Smuzhiyun return ofnode_to_np(port);
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun return NULL;
1356*4882a593Smuzhiyun }
1357*4882a593Smuzhiyun
rockchip_of_graph_get_port_parent(ofnode port)1358*4882a593Smuzhiyun static const struct device_node *rockchip_of_graph_get_port_parent(ofnode port)
1359*4882a593Smuzhiyun {
1360*4882a593Smuzhiyun ofnode parent;
1361*4882a593Smuzhiyun int is_ports_node;
1362*4882a593Smuzhiyun
1363*4882a593Smuzhiyun parent = ofnode_get_parent(port);
1364*4882a593Smuzhiyun is_ports_node = strstr(ofnode_to_np(parent)->full_name, "ports") ? 1 : 0;
1365*4882a593Smuzhiyun if (is_ports_node)
1366*4882a593Smuzhiyun parent = ofnode_get_parent(parent);
1367*4882a593Smuzhiyun
1368*4882a593Smuzhiyun return ofnode_to_np(parent);
1369*4882a593Smuzhiyun }
1370*4882a593Smuzhiyun
1371*4882a593Smuzhiyun const struct device_node *
rockchip_of_graph_get_endpoint_by_regs(ofnode node,int port,int endpoint)1372*4882a593Smuzhiyun rockchip_of_graph_get_endpoint_by_regs(ofnode node, int port, int endpoint)
1373*4882a593Smuzhiyun {
1374*4882a593Smuzhiyun const struct device_node *port_node;
1375*4882a593Smuzhiyun ofnode ep;
1376*4882a593Smuzhiyun u32 reg;
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun port_node = rockchip_of_graph_get_port_by_id(node, port);
1379*4882a593Smuzhiyun if (!port_node)
1380*4882a593Smuzhiyun return NULL;
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun ofnode_for_each_subnode(ep, np_to_ofnode(port_node)) {
1383*4882a593Smuzhiyun if (ofnode_read_u32(ep, "reg", ®))
1384*4882a593Smuzhiyun break;
1385*4882a593Smuzhiyun if (reg == endpoint)
1386*4882a593Smuzhiyun break;
1387*4882a593Smuzhiyun }
1388*4882a593Smuzhiyun
1389*4882a593Smuzhiyun if (!ofnode_valid(ep))
1390*4882a593Smuzhiyun return NULL;
1391*4882a593Smuzhiyun
1392*4882a593Smuzhiyun return ofnode_to_np(ep);
1393*4882a593Smuzhiyun }
1394*4882a593Smuzhiyun
1395*4882a593Smuzhiyun static const struct device_node *
rockchip_of_graph_get_remote_node(ofnode node,int port,int endpoint)1396*4882a593Smuzhiyun rockchip_of_graph_get_remote_node(ofnode node, int port, int endpoint)
1397*4882a593Smuzhiyun {
1398*4882a593Smuzhiyun const struct device_node *ep_node;
1399*4882a593Smuzhiyun ofnode ep;
1400*4882a593Smuzhiyun uint phandle;
1401*4882a593Smuzhiyun
1402*4882a593Smuzhiyun ep_node = rockchip_of_graph_get_endpoint_by_regs(node, port, endpoint);
1403*4882a593Smuzhiyun if (!ep_node)
1404*4882a593Smuzhiyun return NULL;
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun if (ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle))
1407*4882a593Smuzhiyun return NULL;
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun ep = ofnode_get_by_phandle(phandle);
1410*4882a593Smuzhiyun if (!ofnode_valid(ep))
1411*4882a593Smuzhiyun return NULL;
1412*4882a593Smuzhiyun
1413*4882a593Smuzhiyun return ofnode_to_np(ep);
1414*4882a593Smuzhiyun }
1415*4882a593Smuzhiyun
rockchip_of_find_panel(struct udevice * dev,struct rockchip_panel ** panel)1416*4882a593Smuzhiyun static int rockchip_of_find_panel(struct udevice *dev, struct rockchip_panel **panel)
1417*4882a593Smuzhiyun {
1418*4882a593Smuzhiyun const struct device_node *ep_node, *panel_node;
1419*4882a593Smuzhiyun ofnode panel_ofnode, port;
1420*4882a593Smuzhiyun struct udevice *panel_dev;
1421*4882a593Smuzhiyun int ret = 0;
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun *panel = NULL;
1424*4882a593Smuzhiyun panel_ofnode = dev_read_subnode(dev, "panel");
1425*4882a593Smuzhiyun if (ofnode_valid(panel_ofnode) && ofnode_is_available(panel_ofnode)) {
1426*4882a593Smuzhiyun ret = uclass_get_device_by_ofnode(UCLASS_PANEL, panel_ofnode,
1427*4882a593Smuzhiyun &panel_dev);
1428*4882a593Smuzhiyun if (!ret)
1429*4882a593Smuzhiyun goto found;
1430*4882a593Smuzhiyun }
1431*4882a593Smuzhiyun
1432*4882a593Smuzhiyun ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0);
1433*4882a593Smuzhiyun if (!ep_node)
1434*4882a593Smuzhiyun return -ENODEV;
1435*4882a593Smuzhiyun
1436*4882a593Smuzhiyun port = ofnode_get_parent(np_to_ofnode(ep_node));
1437*4882a593Smuzhiyun if (!ofnode_valid(port))
1438*4882a593Smuzhiyun return -ENODEV;
1439*4882a593Smuzhiyun
1440*4882a593Smuzhiyun panel_node = rockchip_of_graph_get_port_parent(port);
1441*4882a593Smuzhiyun if (!panel_node)
1442*4882a593Smuzhiyun return -ENODEV;
1443*4882a593Smuzhiyun
1444*4882a593Smuzhiyun ret = uclass_get_device_by_ofnode(UCLASS_PANEL, np_to_ofnode(panel_node), &panel_dev);
1445*4882a593Smuzhiyun if (!ret)
1446*4882a593Smuzhiyun goto found;
1447*4882a593Smuzhiyun
1448*4882a593Smuzhiyun return -ENODEV;
1449*4882a593Smuzhiyun
1450*4882a593Smuzhiyun found:
1451*4882a593Smuzhiyun *panel = (struct rockchip_panel *)dev_get_driver_data(panel_dev);
1452*4882a593Smuzhiyun return 0;
1453*4882a593Smuzhiyun }
1454*4882a593Smuzhiyun
rockchip_of_find_bridge(struct udevice * dev,struct rockchip_bridge ** bridge)1455*4882a593Smuzhiyun static int rockchip_of_find_bridge(struct udevice *dev, struct rockchip_bridge **bridge)
1456*4882a593Smuzhiyun {
1457*4882a593Smuzhiyun const struct device_node *ep_node, *bridge_node;
1458*4882a593Smuzhiyun ofnode port;
1459*4882a593Smuzhiyun struct udevice *bridge_dev;
1460*4882a593Smuzhiyun int ret = 0;
1461*4882a593Smuzhiyun
1462*4882a593Smuzhiyun ep_node = rockchip_of_graph_get_remote_node(dev->node, PORT_DIR_OUT, 0);
1463*4882a593Smuzhiyun if (!ep_node)
1464*4882a593Smuzhiyun return -ENODEV;
1465*4882a593Smuzhiyun
1466*4882a593Smuzhiyun port = ofnode_get_parent(np_to_ofnode(ep_node));
1467*4882a593Smuzhiyun if (!ofnode_valid(port))
1468*4882a593Smuzhiyun return -ENODEV;
1469*4882a593Smuzhiyun
1470*4882a593Smuzhiyun bridge_node = rockchip_of_graph_get_port_parent(port);
1471*4882a593Smuzhiyun if (!bridge_node)
1472*4882a593Smuzhiyun return -ENODEV;
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_BRIDGE, np_to_ofnode(bridge_node),
1475*4882a593Smuzhiyun &bridge_dev);
1476*4882a593Smuzhiyun if (!ret)
1477*4882a593Smuzhiyun goto found;
1478*4882a593Smuzhiyun
1479*4882a593Smuzhiyun return -ENODEV;
1480*4882a593Smuzhiyun
1481*4882a593Smuzhiyun found:
1482*4882a593Smuzhiyun *bridge = (struct rockchip_bridge *)dev_get_driver_data(bridge_dev);
1483*4882a593Smuzhiyun return 0;
1484*4882a593Smuzhiyun }
1485*4882a593Smuzhiyun
rockchip_of_find_panel_or_bridge(struct udevice * dev,struct rockchip_panel ** panel,struct rockchip_bridge ** bridge)1486*4882a593Smuzhiyun static int rockchip_of_find_panel_or_bridge(struct udevice *dev, struct rockchip_panel **panel,
1487*4882a593Smuzhiyun struct rockchip_bridge **bridge)
1488*4882a593Smuzhiyun {
1489*4882a593Smuzhiyun int ret = 0;
1490*4882a593Smuzhiyun
1491*4882a593Smuzhiyun if (*panel)
1492*4882a593Smuzhiyun return 0;
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun *panel = NULL;
1495*4882a593Smuzhiyun *bridge = NULL;
1496*4882a593Smuzhiyun
1497*4882a593Smuzhiyun if (panel) {
1498*4882a593Smuzhiyun ret = rockchip_of_find_panel(dev, panel);
1499*4882a593Smuzhiyun if (!ret)
1500*4882a593Smuzhiyun return 0;
1501*4882a593Smuzhiyun }
1502*4882a593Smuzhiyun
1503*4882a593Smuzhiyun if (ret) {
1504*4882a593Smuzhiyun ret = rockchip_of_find_bridge(dev, bridge);
1505*4882a593Smuzhiyun if (!ret)
1506*4882a593Smuzhiyun ret = rockchip_of_find_panel_or_bridge((*bridge)->dev, panel,
1507*4882a593Smuzhiyun &(*bridge)->next_bridge);
1508*4882a593Smuzhiyun }
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun return ret;
1511*4882a593Smuzhiyun }
1512*4882a593Smuzhiyun
rockchip_of_find_phy(struct udevice * dev)1513*4882a593Smuzhiyun static struct rockchip_phy *rockchip_of_find_phy(struct udevice *dev)
1514*4882a593Smuzhiyun {
1515*4882a593Smuzhiyun struct udevice *phy_dev;
1516*4882a593Smuzhiyun int ret;
1517*4882a593Smuzhiyun
1518*4882a593Smuzhiyun ret = uclass_get_device_by_phandle(UCLASS_PHY, dev, "phys", &phy_dev);
1519*4882a593Smuzhiyun if (ret)
1520*4882a593Smuzhiyun return NULL;
1521*4882a593Smuzhiyun
1522*4882a593Smuzhiyun return (struct rockchip_phy *)dev_get_driver_data(phy_dev);
1523*4882a593Smuzhiyun }
1524*4882a593Smuzhiyun
rockchip_of_find_connector_device(ofnode endpoint)1525*4882a593Smuzhiyun static struct udevice *rockchip_of_find_connector_device(ofnode endpoint)
1526*4882a593Smuzhiyun {
1527*4882a593Smuzhiyun ofnode ep, port, ports, conn;
1528*4882a593Smuzhiyun uint phandle;
1529*4882a593Smuzhiyun struct udevice *dev;
1530*4882a593Smuzhiyun int ret;
1531*4882a593Smuzhiyun
1532*4882a593Smuzhiyun if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1533*4882a593Smuzhiyun return NULL;
1534*4882a593Smuzhiyun
1535*4882a593Smuzhiyun ep = ofnode_get_by_phandle(phandle);
1536*4882a593Smuzhiyun if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1537*4882a593Smuzhiyun return NULL;
1538*4882a593Smuzhiyun
1539*4882a593Smuzhiyun port = ofnode_get_parent(ep);
1540*4882a593Smuzhiyun if (!ofnode_valid(port))
1541*4882a593Smuzhiyun return NULL;
1542*4882a593Smuzhiyun
1543*4882a593Smuzhiyun ports = ofnode_get_parent(port);
1544*4882a593Smuzhiyun if (!ofnode_valid(ports))
1545*4882a593Smuzhiyun return NULL;
1546*4882a593Smuzhiyun
1547*4882a593Smuzhiyun conn = ofnode_get_parent(ports);
1548*4882a593Smuzhiyun if (!ofnode_valid(conn) || !ofnode_is_available(conn))
1549*4882a593Smuzhiyun return NULL;
1550*4882a593Smuzhiyun
1551*4882a593Smuzhiyun ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, conn, &dev);
1552*4882a593Smuzhiyun if (ret)
1553*4882a593Smuzhiyun return NULL;
1554*4882a593Smuzhiyun
1555*4882a593Smuzhiyun return dev;
1556*4882a593Smuzhiyun }
1557*4882a593Smuzhiyun
rockchip_of_get_connector(ofnode endpoint)1558*4882a593Smuzhiyun static struct rockchip_connector *rockchip_of_get_connector(ofnode endpoint)
1559*4882a593Smuzhiyun {
1560*4882a593Smuzhiyun struct rockchip_connector *conn;
1561*4882a593Smuzhiyun struct udevice *dev;
1562*4882a593Smuzhiyun int ret;
1563*4882a593Smuzhiyun
1564*4882a593Smuzhiyun dev = rockchip_of_find_connector_device(endpoint);
1565*4882a593Smuzhiyun if (!dev) {
1566*4882a593Smuzhiyun printf("Warn: can't find connect driver\n");
1567*4882a593Smuzhiyun return NULL;
1568*4882a593Smuzhiyun }
1569*4882a593Smuzhiyun
1570*4882a593Smuzhiyun conn = get_rockchip_connector_by_device(dev);
1571*4882a593Smuzhiyun if (!conn)
1572*4882a593Smuzhiyun return NULL;
1573*4882a593Smuzhiyun ret = rockchip_of_find_panel_or_bridge(dev, &conn->panel, &conn->bridge);
1574*4882a593Smuzhiyun if (ret)
1575*4882a593Smuzhiyun debug("Warn: no find panel or bridge\n");
1576*4882a593Smuzhiyun
1577*4882a593Smuzhiyun conn->phy = rockchip_of_find_phy(dev);
1578*4882a593Smuzhiyun
1579*4882a593Smuzhiyun return conn;
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun
rockchip_get_split_connector(struct rockchip_connector * conn)1582*4882a593Smuzhiyun static struct rockchip_connector *rockchip_get_split_connector(struct rockchip_connector *conn)
1583*4882a593Smuzhiyun {
1584*4882a593Smuzhiyun char *conn_name;
1585*4882a593Smuzhiyun struct device_node *split_node;
1586*4882a593Smuzhiyun struct udevice *split_dev;
1587*4882a593Smuzhiyun struct rockchip_connector *split_conn;
1588*4882a593Smuzhiyun bool split_mode;
1589*4882a593Smuzhiyun int ret;
1590*4882a593Smuzhiyun
1591*4882a593Smuzhiyun split_mode = ofnode_read_bool(conn->dev->node, "split-mode");
1592*4882a593Smuzhiyun if (!split_mode)
1593*4882a593Smuzhiyun return NULL;
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun switch (conn->type) {
1596*4882a593Smuzhiyun case DRM_MODE_CONNECTOR_DisplayPort:
1597*4882a593Smuzhiyun conn_name = "dp";
1598*4882a593Smuzhiyun break;
1599*4882a593Smuzhiyun case DRM_MODE_CONNECTOR_eDP:
1600*4882a593Smuzhiyun conn_name = "edp";
1601*4882a593Smuzhiyun break;
1602*4882a593Smuzhiyun case DRM_MODE_CONNECTOR_HDMIA:
1603*4882a593Smuzhiyun conn_name = "hdmi";
1604*4882a593Smuzhiyun break;
1605*4882a593Smuzhiyun default:
1606*4882a593Smuzhiyun return NULL;
1607*4882a593Smuzhiyun }
1608*4882a593Smuzhiyun
1609*4882a593Smuzhiyun split_node = of_alias_get_dev(conn_name, !conn->id);
1610*4882a593Smuzhiyun if (!split_node || !of_device_is_available(split_node))
1611*4882a593Smuzhiyun return NULL;
1612*4882a593Smuzhiyun
1613*4882a593Smuzhiyun ret = uclass_get_device_by_ofnode(UCLASS_DISPLAY, np_to_ofnode(split_node), &split_dev);
1614*4882a593Smuzhiyun if (ret)
1615*4882a593Smuzhiyun return NULL;
1616*4882a593Smuzhiyun
1617*4882a593Smuzhiyun split_conn = get_rockchip_connector_by_device(split_dev);
1618*4882a593Smuzhiyun if (!split_conn)
1619*4882a593Smuzhiyun return NULL;
1620*4882a593Smuzhiyun ret = rockchip_of_find_panel_or_bridge(split_dev, &split_conn->panel, &split_conn->bridge);
1621*4882a593Smuzhiyun if (ret)
1622*4882a593Smuzhiyun debug("Warn: no find panel or bridge\n");
1623*4882a593Smuzhiyun
1624*4882a593Smuzhiyun split_conn->phy = rockchip_of_find_phy(split_dev);
1625*4882a593Smuzhiyun
1626*4882a593Smuzhiyun return split_conn;
1627*4882a593Smuzhiyun }
1628*4882a593Smuzhiyun
rockchip_get_display_path_status(ofnode endpoint)1629*4882a593Smuzhiyun static bool rockchip_get_display_path_status(ofnode endpoint)
1630*4882a593Smuzhiyun {
1631*4882a593Smuzhiyun ofnode ep;
1632*4882a593Smuzhiyun uint phandle;
1633*4882a593Smuzhiyun
1634*4882a593Smuzhiyun if (ofnode_read_u32(endpoint, "remote-endpoint", &phandle))
1635*4882a593Smuzhiyun return false;
1636*4882a593Smuzhiyun
1637*4882a593Smuzhiyun ep = ofnode_get_by_phandle(phandle);
1638*4882a593Smuzhiyun if (!ofnode_valid(ep) || !ofnode_is_available(ep))
1639*4882a593Smuzhiyun return false;
1640*4882a593Smuzhiyun
1641*4882a593Smuzhiyun return true;
1642*4882a593Smuzhiyun }
1643*4882a593Smuzhiyun
1644*4882a593Smuzhiyun #if defined(CONFIG_ROCKCHIP_RK3568)
rockchip_display_fixup_dts(void * blob)1645*4882a593Smuzhiyun static int rockchip_display_fixup_dts(void *blob)
1646*4882a593Smuzhiyun {
1647*4882a593Smuzhiyun ofnode route_node, route_subnode, conn_ep, conn_port;
1648*4882a593Smuzhiyun const struct device_node *route_sub_devnode;
1649*4882a593Smuzhiyun const struct device_node *ep_node, *conn_ep_dev_node;
1650*4882a593Smuzhiyun u32 phandle;
1651*4882a593Smuzhiyun int conn_ep_offset;
1652*4882a593Smuzhiyun const char *route_sub_path, *path;
1653*4882a593Smuzhiyun
1654*4882a593Smuzhiyun /* Don't go further if new variant after
1655*4882a593Smuzhiyun * reading PMUGRF_SOC_CON15
1656*4882a593Smuzhiyun */
1657*4882a593Smuzhiyun if ((readl(0xfdc20100) & GENMASK(15, 14)))
1658*4882a593Smuzhiyun return 0;
1659*4882a593Smuzhiyun
1660*4882a593Smuzhiyun route_node = ofnode_path("/display-subsystem/route");
1661*4882a593Smuzhiyun if (!ofnode_valid(route_node))
1662*4882a593Smuzhiyun return -EINVAL;
1663*4882a593Smuzhiyun
1664*4882a593Smuzhiyun ofnode_for_each_subnode(route_subnode, route_node) {
1665*4882a593Smuzhiyun if (!ofnode_is_available(route_subnode))
1666*4882a593Smuzhiyun continue;
1667*4882a593Smuzhiyun
1668*4882a593Smuzhiyun route_sub_devnode = ofnode_to_np(route_subnode);
1669*4882a593Smuzhiyun route_sub_path = route_sub_devnode->full_name;
1670*4882a593Smuzhiyun if (!strstr(ofnode_get_name(route_subnode), "dsi") &&
1671*4882a593Smuzhiyun !strstr(ofnode_get_name(route_subnode), "edp"))
1672*4882a593Smuzhiyun return 0;
1673*4882a593Smuzhiyun
1674*4882a593Smuzhiyun phandle = ofnode_read_u32_default(route_subnode, "connect", -1);
1675*4882a593Smuzhiyun if (phandle < 0) {
1676*4882a593Smuzhiyun printf("Warn: can't find connect node's handle\n");
1677*4882a593Smuzhiyun continue;
1678*4882a593Smuzhiyun }
1679*4882a593Smuzhiyun
1680*4882a593Smuzhiyun ep_node = of_find_node_by_phandle(phandle);
1681*4882a593Smuzhiyun if (!ofnode_valid(np_to_ofnode(ep_node))) {
1682*4882a593Smuzhiyun printf("Warn: can't find endpoint node from phandle\n");
1683*4882a593Smuzhiyun continue;
1684*4882a593Smuzhiyun }
1685*4882a593Smuzhiyun
1686*4882a593Smuzhiyun ofnode_read_u32(np_to_ofnode(ep_node), "remote-endpoint", &phandle);
1687*4882a593Smuzhiyun conn_ep = ofnode_get_by_phandle(phandle);
1688*4882a593Smuzhiyun if (!ofnode_valid(conn_ep) || !ofnode_is_available(conn_ep))
1689*4882a593Smuzhiyun return -ENODEV;
1690*4882a593Smuzhiyun
1691*4882a593Smuzhiyun conn_port = ofnode_get_parent(conn_ep);
1692*4882a593Smuzhiyun if (!ofnode_valid(conn_port))
1693*4882a593Smuzhiyun return -ENODEV;
1694*4882a593Smuzhiyun
1695*4882a593Smuzhiyun ofnode_for_each_subnode(conn_ep, conn_port) {
1696*4882a593Smuzhiyun conn_ep_dev_node = ofnode_to_np(conn_ep);
1697*4882a593Smuzhiyun path = conn_ep_dev_node->full_name;
1698*4882a593Smuzhiyun ofnode_read_u32(conn_ep, "remote-endpoint", &phandle);
1699*4882a593Smuzhiyun conn_ep_offset = fdt_path_offset(blob, path);
1700*4882a593Smuzhiyun
1701*4882a593Smuzhiyun if (!ofnode_is_available(conn_ep) &&
1702*4882a593Smuzhiyun strstr(ofnode_get_name(conn_ep), "endpoint@0")) {
1703*4882a593Smuzhiyun do_fixup_by_path_u32(blob, route_sub_path,
1704*4882a593Smuzhiyun "connect", phandle, 1);
1705*4882a593Smuzhiyun fdt_status_okay(blob, conn_ep_offset);
1706*4882a593Smuzhiyun
1707*4882a593Smuzhiyun } else if (ofnode_is_available(conn_ep) &&
1708*4882a593Smuzhiyun strstr(ofnode_get_name(conn_ep), "endpoint@1")) {
1709*4882a593Smuzhiyun fdt_status_disabled(blob, conn_ep_offset);
1710*4882a593Smuzhiyun }
1711*4882a593Smuzhiyun }
1712*4882a593Smuzhiyun }
1713*4882a593Smuzhiyun
1714*4882a593Smuzhiyun return 0;
1715*4882a593Smuzhiyun }
1716*4882a593Smuzhiyun #endif
1717*4882a593Smuzhiyun
forlinx_fixup_display(void)1718*4882a593Smuzhiyun __weak int forlinx_fixup_display(void)
1719*4882a593Smuzhiyun {
1720*4882a593Smuzhiyun return 0;
1721*4882a593Smuzhiyun }
1722*4882a593Smuzhiyun
rockchip_display_probe(struct udevice * dev)1723*4882a593Smuzhiyun static int rockchip_display_probe(struct udevice *dev)
1724*4882a593Smuzhiyun {
1725*4882a593Smuzhiyun struct video_priv *uc_priv = dev_get_uclass_priv(dev);
1726*4882a593Smuzhiyun struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
1727*4882a593Smuzhiyun const void *blob = gd->fdt_blob;
1728*4882a593Smuzhiyun int phandle;
1729*4882a593Smuzhiyun struct udevice *crtc_dev;
1730*4882a593Smuzhiyun struct rockchip_crtc *crtc;
1731*4882a593Smuzhiyun struct rockchip_connector *conn, *split_conn;
1732*4882a593Smuzhiyun struct display_state *s;
1733*4882a593Smuzhiyun const char *name;
1734*4882a593Smuzhiyun int ret;
1735*4882a593Smuzhiyun ofnode node, route_node, timing_node;
1736*4882a593Smuzhiyun struct device_node *port_node, *vop_node, *ep_node, *port_parent_node;
1737*4882a593Smuzhiyun struct public_phy_data *data;
1738*4882a593Smuzhiyun bool is_ports_node = false;
1739*4882a593Smuzhiyun
1740*4882a593Smuzhiyun #if defined(CONFIG_ROCKCHIP_RK3568)
1741*4882a593Smuzhiyun rockchip_display_fixup_dts((void *)blob);
1742*4882a593Smuzhiyun #endif
1743*4882a593Smuzhiyun forlinx_fixup_display();
1744*4882a593Smuzhiyun
1745*4882a593Smuzhiyun /* Before relocation we don't need to do anything */
1746*4882a593Smuzhiyun if (!(gd->flags & GD_FLG_RELOC))
1747*4882a593Smuzhiyun return 0;
1748*4882a593Smuzhiyun
1749*4882a593Smuzhiyun data = malloc(sizeof(struct public_phy_data));
1750*4882a593Smuzhiyun if (!data) {
1751*4882a593Smuzhiyun printf("failed to alloc phy data\n");
1752*4882a593Smuzhiyun return -ENOMEM;
1753*4882a593Smuzhiyun }
1754*4882a593Smuzhiyun data->phy_init = false;
1755*4882a593Smuzhiyun
1756*4882a593Smuzhiyun init_display_buffer(plat->base);
1757*4882a593Smuzhiyun
1758*4882a593Smuzhiyun route_node = dev_read_subnode(dev, "route");
1759*4882a593Smuzhiyun if (!ofnode_valid(route_node))
1760*4882a593Smuzhiyun return -ENODEV;
1761*4882a593Smuzhiyun
1762*4882a593Smuzhiyun ofnode_for_each_subnode(node, route_node) {
1763*4882a593Smuzhiyun if (!ofnode_is_available(node))
1764*4882a593Smuzhiyun continue;
1765*4882a593Smuzhiyun phandle = ofnode_read_u32_default(node, "connect", -1);
1766*4882a593Smuzhiyun if (phandle < 0) {
1767*4882a593Smuzhiyun printf("Warn: can't find connect node's handle\n");
1768*4882a593Smuzhiyun continue;
1769*4882a593Smuzhiyun }
1770*4882a593Smuzhiyun ep_node = of_find_node_by_phandle(phandle);
1771*4882a593Smuzhiyun if (!ofnode_valid(np_to_ofnode(ep_node))) {
1772*4882a593Smuzhiyun printf("Warn: can't find endpoint node from phandle\n");
1773*4882a593Smuzhiyun continue;
1774*4882a593Smuzhiyun }
1775*4882a593Smuzhiyun port_node = of_get_parent(ep_node);
1776*4882a593Smuzhiyun if (!ofnode_valid(np_to_ofnode(port_node))) {
1777*4882a593Smuzhiyun printf("Warn: can't find port node from phandle\n");
1778*4882a593Smuzhiyun continue;
1779*4882a593Smuzhiyun }
1780*4882a593Smuzhiyun
1781*4882a593Smuzhiyun port_parent_node = of_get_parent(port_node);
1782*4882a593Smuzhiyun if (!ofnode_valid(np_to_ofnode(port_parent_node))) {
1783*4882a593Smuzhiyun printf("Warn: can't find port parent node from phandle\n");
1784*4882a593Smuzhiyun continue;
1785*4882a593Smuzhiyun }
1786*4882a593Smuzhiyun
1787*4882a593Smuzhiyun is_ports_node = strstr(port_parent_node->full_name, "ports") ? 1 : 0;
1788*4882a593Smuzhiyun if (is_ports_node) {
1789*4882a593Smuzhiyun vop_node = of_get_parent(port_parent_node);
1790*4882a593Smuzhiyun if (!ofnode_valid(np_to_ofnode(vop_node))) {
1791*4882a593Smuzhiyun printf("Warn: can't find crtc node from phandle\n");
1792*4882a593Smuzhiyun continue;
1793*4882a593Smuzhiyun }
1794*4882a593Smuzhiyun } else {
1795*4882a593Smuzhiyun vop_node = port_parent_node;
1796*4882a593Smuzhiyun }
1797*4882a593Smuzhiyun
1798*4882a593Smuzhiyun ret = uclass_get_device_by_ofnode(UCLASS_VIDEO_CRTC,
1799*4882a593Smuzhiyun np_to_ofnode(vop_node),
1800*4882a593Smuzhiyun &crtc_dev);
1801*4882a593Smuzhiyun if (ret) {
1802*4882a593Smuzhiyun printf("Warn: can't find crtc driver %d\n", ret);
1803*4882a593Smuzhiyun continue;
1804*4882a593Smuzhiyun }
1805*4882a593Smuzhiyun crtc = (struct rockchip_crtc *)dev_get_driver_data(crtc_dev);
1806*4882a593Smuzhiyun
1807*4882a593Smuzhiyun conn = rockchip_of_get_connector(np_to_ofnode(ep_node));
1808*4882a593Smuzhiyun if (!conn) {
1809*4882a593Smuzhiyun printf("Warn: can't get connect driver\n");
1810*4882a593Smuzhiyun continue;
1811*4882a593Smuzhiyun }
1812*4882a593Smuzhiyun split_conn = rockchip_get_split_connector(conn);
1813*4882a593Smuzhiyun
1814*4882a593Smuzhiyun s = malloc(sizeof(*s));
1815*4882a593Smuzhiyun if (!s)
1816*4882a593Smuzhiyun continue;
1817*4882a593Smuzhiyun
1818*4882a593Smuzhiyun memset(s, 0, sizeof(*s));
1819*4882a593Smuzhiyun
1820*4882a593Smuzhiyun INIT_LIST_HEAD(&s->head);
1821*4882a593Smuzhiyun ret = ofnode_read_string_index(node, "logo,uboot", 0, &name);
1822*4882a593Smuzhiyun if (!ret)
1823*4882a593Smuzhiyun memcpy(s->ulogo_name, name, strlen(name));
1824*4882a593Smuzhiyun ret = ofnode_read_string_index(node, "logo,kernel", 0, &name);
1825*4882a593Smuzhiyun if (!ret)
1826*4882a593Smuzhiyun memcpy(s->klogo_name, name, strlen(name));
1827*4882a593Smuzhiyun ret = ofnode_read_string_index(node, "logo,mode", 0, &name);
1828*4882a593Smuzhiyun if (!strcmp(name, "fullscreen"))
1829*4882a593Smuzhiyun s->logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1830*4882a593Smuzhiyun else
1831*4882a593Smuzhiyun s->logo_mode = ROCKCHIP_DISPLAY_CENTER;
1832*4882a593Smuzhiyun ret = ofnode_read_string_index(node, "charge_logo,mode", 0, &name);
1833*4882a593Smuzhiyun if (!strcmp(name, "fullscreen"))
1834*4882a593Smuzhiyun s->charge_logo_mode = ROCKCHIP_DISPLAY_FULLSCREEN;
1835*4882a593Smuzhiyun else
1836*4882a593Smuzhiyun s->charge_logo_mode = ROCKCHIP_DISPLAY_CENTER;
1837*4882a593Smuzhiyun
1838*4882a593Smuzhiyun s->force_output = ofnode_read_bool(node, "force-output");
1839*4882a593Smuzhiyun
1840*4882a593Smuzhiyun if (s->force_output) {
1841*4882a593Smuzhiyun timing_node = ofnode_find_subnode(node, "force_timing");
1842*4882a593Smuzhiyun ret = display_get_force_timing_from_dts(timing_node,
1843*4882a593Smuzhiyun &s->force_mode,
1844*4882a593Smuzhiyun &s->conn_state.bus_flags);
1845*4882a593Smuzhiyun if (ofnode_read_u32(node, "force-bus-format", &s->force_bus_format))
1846*4882a593Smuzhiyun s->force_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
1847*4882a593Smuzhiyun }
1848*4882a593Smuzhiyun
1849*4882a593Smuzhiyun s->blob = blob;
1850*4882a593Smuzhiyun s->conn_state.connector = conn;
1851*4882a593Smuzhiyun s->conn_state.secondary = NULL;
1852*4882a593Smuzhiyun s->conn_state.type = conn->type;
1853*4882a593Smuzhiyun if (split_conn) {
1854*4882a593Smuzhiyun s->conn_state.secondary = split_conn;
1855*4882a593Smuzhiyun s->conn_state.output_flags |= ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE;
1856*4882a593Smuzhiyun s->conn_state.output_flags |= conn->id ? ROCKCHIP_OUTPUT_DATA_SWAP : 0;
1857*4882a593Smuzhiyun }
1858*4882a593Smuzhiyun s->conn_state.overscan.left_margin = 100;
1859*4882a593Smuzhiyun s->conn_state.overscan.right_margin = 100;
1860*4882a593Smuzhiyun s->conn_state.overscan.top_margin = 100;
1861*4882a593Smuzhiyun s->conn_state.overscan.bottom_margin = 100;
1862*4882a593Smuzhiyun s->crtc_state.node = np_to_ofnode(vop_node);
1863*4882a593Smuzhiyun s->crtc_state.dev = crtc_dev;
1864*4882a593Smuzhiyun s->crtc_state.crtc = crtc;
1865*4882a593Smuzhiyun s->crtc_state.crtc_id = get_crtc_id(np_to_ofnode(ep_node), is_ports_node);
1866*4882a593Smuzhiyun s->node = node;
1867*4882a593Smuzhiyun
1868*4882a593Smuzhiyun if (is_ports_node) { /* only vop2 will get into here */
1869*4882a593Smuzhiyun ofnode vp_node = np_to_ofnode(port_node);
1870*4882a593Smuzhiyun static bool get_plane_mask_from_dts;
1871*4882a593Smuzhiyun
1872*4882a593Smuzhiyun s->crtc_state.ports_node = port_parent_node;
1873*4882a593Smuzhiyun if (!get_plane_mask_from_dts) {
1874*4882a593Smuzhiyun ofnode vp_sub_node;
1875*4882a593Smuzhiyun int vp_id = 0;
1876*4882a593Smuzhiyun bool vp_enable = false;
1877*4882a593Smuzhiyun
1878*4882a593Smuzhiyun ofnode_for_each_subnode(vp_node, np_to_ofnode(port_parent_node)) {
1879*4882a593Smuzhiyun int cursor_plane = -1;
1880*4882a593Smuzhiyun
1881*4882a593Smuzhiyun vp_id = ofnode_read_u32_default(vp_node, "reg", 0);
1882*4882a593Smuzhiyun
1883*4882a593Smuzhiyun s->crtc_state.crtc->vps[vp_id].xmirror_en =
1884*4882a593Smuzhiyun ofnode_read_bool(vp_node, "xmirror-enable");
1885*4882a593Smuzhiyun
1886*4882a593Smuzhiyun ret = ofnode_read_u32_default(vp_node, "rockchip,plane-mask", 0);
1887*4882a593Smuzhiyun
1888*4882a593Smuzhiyun cursor_plane = ofnode_read_u32_default(vp_node, "cursor-win-id", -1);
1889*4882a593Smuzhiyun s->crtc_state.crtc->vps[vp_id].cursor_plane = cursor_plane;
1890*4882a593Smuzhiyun if (ret) {
1891*4882a593Smuzhiyun s->crtc_state.crtc->vps[vp_id].plane_mask = ret;
1892*4882a593Smuzhiyun s->crtc_state.crtc->assign_plane |= true;
1893*4882a593Smuzhiyun s->crtc_state.crtc->vps[vp_id].primary_plane_id =
1894*4882a593Smuzhiyun ofnode_read_u32_default(vp_node, "rockchip,primary-plane", U8_MAX);
1895*4882a593Smuzhiyun printf("get vp%d plane mask:0x%x, primary id:%d, cursor_plane:%d, from dts\n",
1896*4882a593Smuzhiyun vp_id,
1897*4882a593Smuzhiyun s->crtc_state.crtc->vps[vp_id].plane_mask,
1898*4882a593Smuzhiyun s->crtc_state.crtc->vps[vp_id].primary_plane_id == U8_MAX ? -1 :
1899*4882a593Smuzhiyun s->crtc_state.crtc->vps[vp_id].primary_plane_id,
1900*4882a593Smuzhiyun cursor_plane);
1901*4882a593Smuzhiyun }
1902*4882a593Smuzhiyun
1903*4882a593Smuzhiyun /* To check current vp status */
1904*4882a593Smuzhiyun vp_enable = false;
1905*4882a593Smuzhiyun ofnode_for_each_subnode(vp_sub_node, vp_node)
1906*4882a593Smuzhiyun vp_enable |= rockchip_get_display_path_status(vp_sub_node);
1907*4882a593Smuzhiyun s->crtc_state.crtc->vps[vp_id].enable = vp_enable;
1908*4882a593Smuzhiyun }
1909*4882a593Smuzhiyun get_plane_mask_from_dts = true;
1910*4882a593Smuzhiyun }
1911*4882a593Smuzhiyun }
1912*4882a593Smuzhiyun
1913*4882a593Smuzhiyun get_crtc_mcu_mode(&s->crtc_state, port_node, is_ports_node);
1914*4882a593Smuzhiyun
1915*4882a593Smuzhiyun ret = ofnode_read_u32_default(s->crtc_state.node,
1916*4882a593Smuzhiyun "rockchip,dual-channel-swap", 0);
1917*4882a593Smuzhiyun s->crtc_state.dual_channel_swap = ret;
1918*4882a593Smuzhiyun
1919*4882a593Smuzhiyun if (connector_phy_init(conn, data)) {
1920*4882a593Smuzhiyun printf("Warn: Failed to init phy drivers\n");
1921*4882a593Smuzhiyun free(s);
1922*4882a593Smuzhiyun continue;
1923*4882a593Smuzhiyun }
1924*4882a593Smuzhiyun list_add_tail(&s->head, &rockchip_display_list);
1925*4882a593Smuzhiyun }
1926*4882a593Smuzhiyun
1927*4882a593Smuzhiyun if (list_empty(&rockchip_display_list)) {
1928*4882a593Smuzhiyun debug("Failed to found available display route\n");
1929*4882a593Smuzhiyun return -ENODEV;
1930*4882a593Smuzhiyun }
1931*4882a593Smuzhiyun rockchip_get_baseparameter();
1932*4882a593Smuzhiyun display_pre_init();
1933*4882a593Smuzhiyun
1934*4882a593Smuzhiyun uc_priv->xsize = DRM_ROCKCHIP_FB_WIDTH;
1935*4882a593Smuzhiyun uc_priv->ysize = DRM_ROCKCHIP_FB_HEIGHT;
1936*4882a593Smuzhiyun uc_priv->bpix = VIDEO_BPP32;
1937*4882a593Smuzhiyun
1938*4882a593Smuzhiyun #ifdef CONFIG_DRM_ROCKCHIP_VIDEO_FRAMEBUFFER
1939*4882a593Smuzhiyun rockchip_show_fbbase(plat->base);
1940*4882a593Smuzhiyun video_set_flush_dcache(dev, true);
1941*4882a593Smuzhiyun #endif
1942*4882a593Smuzhiyun
1943*4882a593Smuzhiyun return 0;
1944*4882a593Smuzhiyun }
1945*4882a593Smuzhiyun
rockchip_display_fixup(void * blob)1946*4882a593Smuzhiyun void rockchip_display_fixup(void *blob)
1947*4882a593Smuzhiyun {
1948*4882a593Smuzhiyun const struct rockchip_connector_funcs *conn_funcs;
1949*4882a593Smuzhiyun const struct rockchip_crtc_funcs *crtc_funcs;
1950*4882a593Smuzhiyun struct rockchip_connector *conn;
1951*4882a593Smuzhiyun const struct rockchip_crtc *crtc;
1952*4882a593Smuzhiyun struct display_state *s;
1953*4882a593Smuzhiyun int offset;
1954*4882a593Smuzhiyun int ret;
1955*4882a593Smuzhiyun const struct device_node *np;
1956*4882a593Smuzhiyun const char *path;
1957*4882a593Smuzhiyun const char *cacm_header;
1958*4882a593Smuzhiyun u64 aligned_memory_size;
1959*4882a593Smuzhiyun
1960*4882a593Smuzhiyun if (fdt_node_offset_by_compatible(blob, 0, "rockchip,drm-logo") >= 0) {
1961*4882a593Smuzhiyun list_for_each_entry(s, &rockchip_display_list, head) {
1962*4882a593Smuzhiyun ret = load_bmp_logo(&s->logo, s->klogo_name);
1963*4882a593Smuzhiyun if (ret < 0) {
1964*4882a593Smuzhiyun s->is_klogo_valid = false;
1965*4882a593Smuzhiyun printf("VP%d fail to load kernel logo\n", s->crtc_state.crtc_id);
1966*4882a593Smuzhiyun } else {
1967*4882a593Smuzhiyun s->is_klogo_valid = true;
1968*4882a593Smuzhiyun }
1969*4882a593Smuzhiyun }
1970*4882a593Smuzhiyun
1971*4882a593Smuzhiyun if (!get_display_size())
1972*4882a593Smuzhiyun return;
1973*4882a593Smuzhiyun
1974*4882a593Smuzhiyun aligned_memory_size = (u64)ALIGN(get_display_size(), align_size);
1975*4882a593Smuzhiyun offset = fdt_update_reserved_memory(blob, "rockchip,drm-logo",
1976*4882a593Smuzhiyun (u64)memory_start,
1977*4882a593Smuzhiyun aligned_memory_size);
1978*4882a593Smuzhiyun if (offset < 0)
1979*4882a593Smuzhiyun printf("failed to reserve drm-loader-logo memory\n");
1980*4882a593Smuzhiyun
1981*4882a593Smuzhiyun if (get_cubic_memory_size()) {
1982*4882a593Smuzhiyun aligned_memory_size = (u64)ALIGN(get_cubic_memory_size(), align_size);
1983*4882a593Smuzhiyun offset = fdt_update_reserved_memory(blob, "rockchip,drm-cubic-lut",
1984*4882a593Smuzhiyun (u64)cubic_lut_memory_start,
1985*4882a593Smuzhiyun aligned_memory_size);
1986*4882a593Smuzhiyun if (offset < 0)
1987*4882a593Smuzhiyun printf("failed to reserve drm-cubic-lut memory\n");
1988*4882a593Smuzhiyun }
1989*4882a593Smuzhiyun } else {
1990*4882a593Smuzhiyun printf("can't found rockchip,drm-logo, use rockchip,fb-logo\n");
1991*4882a593Smuzhiyun /* Compatible with rkfb display, only need reserve memory */
1992*4882a593Smuzhiyun offset = fdt_update_reserved_memory(blob, "rockchip,fb-logo",
1993*4882a593Smuzhiyun (u64)memory_start,
1994*4882a593Smuzhiyun MEMORY_POOL_SIZE);
1995*4882a593Smuzhiyun if (offset < 0)
1996*4882a593Smuzhiyun printf("failed to reserve fb-loader-logo memory\n");
1997*4882a593Smuzhiyun else
1998*4882a593Smuzhiyun list_for_each_entry(s, &rockchip_display_list, head)
1999*4882a593Smuzhiyun load_kernel_bmp_logo(&s->logo, s->klogo_name);
2000*4882a593Smuzhiyun return;
2001*4882a593Smuzhiyun }
2002*4882a593Smuzhiyun
2003*4882a593Smuzhiyun list_for_each_entry(s, &rockchip_display_list, head) {
2004*4882a593Smuzhiyun /*
2005*4882a593Smuzhiyun * If plane mask is not set in dts, fixup dts to assign it
2006*4882a593Smuzhiyun * whether crtc is initialized or not.
2007*4882a593Smuzhiyun */
2008*4882a593Smuzhiyun if (s->crtc_state.crtc->funcs->fixup_dts && !s->crtc_state.crtc->assign_plane)
2009*4882a593Smuzhiyun s->crtc_state.crtc->funcs->fixup_dts(s, blob);
2010*4882a593Smuzhiyun
2011*4882a593Smuzhiyun if (!s->is_init || !s->is_klogo_valid)
2012*4882a593Smuzhiyun continue;
2013*4882a593Smuzhiyun
2014*4882a593Smuzhiyun conn = s->conn_state.connector;
2015*4882a593Smuzhiyun if (!conn)
2016*4882a593Smuzhiyun continue;
2017*4882a593Smuzhiyun conn_funcs = conn->funcs;
2018*4882a593Smuzhiyun if (!conn_funcs) {
2019*4882a593Smuzhiyun printf("failed to get exist connector\n");
2020*4882a593Smuzhiyun continue;
2021*4882a593Smuzhiyun }
2022*4882a593Smuzhiyun
2023*4882a593Smuzhiyun if (s->conn_state.secondary) {
2024*4882a593Smuzhiyun s->conn_state.mode.clock *= 2;
2025*4882a593Smuzhiyun s->conn_state.mode.hdisplay *= 2;
2026*4882a593Smuzhiyun }
2027*4882a593Smuzhiyun
2028*4882a593Smuzhiyun crtc = s->crtc_state.crtc;
2029*4882a593Smuzhiyun if (!crtc)
2030*4882a593Smuzhiyun continue;
2031*4882a593Smuzhiyun
2032*4882a593Smuzhiyun crtc_funcs = crtc->funcs;
2033*4882a593Smuzhiyun if (!crtc_funcs) {
2034*4882a593Smuzhiyun printf("failed to get exist crtc\n");
2035*4882a593Smuzhiyun continue;
2036*4882a593Smuzhiyun }
2037*4882a593Smuzhiyun
2038*4882a593Smuzhiyun np = ofnode_to_np(s->node);
2039*4882a593Smuzhiyun path = np->full_name;
2040*4882a593Smuzhiyun fdt_increase_size(blob, 0x400);
2041*4882a593Smuzhiyun #define FDT_SET_U32(name, val) \
2042*4882a593Smuzhiyun do_fixup_by_path_u32(blob, path, name, val, 1);
2043*4882a593Smuzhiyun
2044*4882a593Smuzhiyun offset = s->logo.offset + (u32)(unsigned long)s->logo.mem
2045*4882a593Smuzhiyun - memory_start;
2046*4882a593Smuzhiyun FDT_SET_U32("logo,offset", offset);
2047*4882a593Smuzhiyun FDT_SET_U32("logo,width", s->logo.width);
2048*4882a593Smuzhiyun FDT_SET_U32("logo,height", s->logo.height);
2049*4882a593Smuzhiyun FDT_SET_U32("logo,bpp", s->logo.bpp);
2050*4882a593Smuzhiyun FDT_SET_U32("logo,ymirror", s->logo.ymirror);
2051*4882a593Smuzhiyun FDT_SET_U32("video,clock", s->conn_state.mode.clock);
2052*4882a593Smuzhiyun FDT_SET_U32("video,hdisplay", s->conn_state.mode.hdisplay);
2053*4882a593Smuzhiyun FDT_SET_U32("video,vdisplay", s->conn_state.mode.vdisplay);
2054*4882a593Smuzhiyun FDT_SET_U32("video,crtc_hsync_end", s->conn_state.mode.crtc_hsync_end);
2055*4882a593Smuzhiyun FDT_SET_U32("video,crtc_vsync_end", s->conn_state.mode.crtc_vsync_end);
2056*4882a593Smuzhiyun FDT_SET_U32("video,vrefresh",
2057*4882a593Smuzhiyun drm_mode_vrefresh(&s->conn_state.mode));
2058*4882a593Smuzhiyun FDT_SET_U32("video,flags", s->conn_state.mode.flags);
2059*4882a593Smuzhiyun FDT_SET_U32("video,aspect_ratio", s->conn_state.mode.picture_aspect_ratio);
2060*4882a593Smuzhiyun FDT_SET_U32("overscan,left_margin", s->conn_state.overscan.left_margin);
2061*4882a593Smuzhiyun FDT_SET_U32("overscan,right_margin", s->conn_state.overscan.right_margin);
2062*4882a593Smuzhiyun FDT_SET_U32("overscan,top_margin", s->conn_state.overscan.top_margin);
2063*4882a593Smuzhiyun FDT_SET_U32("overscan,bottom_margin", s->conn_state.overscan.bottom_margin);
2064*4882a593Smuzhiyun
2065*4882a593Smuzhiyun if (s->conn_state.disp_info) {
2066*4882a593Smuzhiyun cacm_header = (const char*)&s->conn_state.disp_info->cacm_header;
2067*4882a593Smuzhiyun
2068*4882a593Smuzhiyun FDT_SET_U32("bcsh,brightness", s->conn_state.disp_info->bcsh_info.brightness);
2069*4882a593Smuzhiyun FDT_SET_U32("bcsh,contrast", s->conn_state.disp_info->bcsh_info.contrast);
2070*4882a593Smuzhiyun FDT_SET_U32("bcsh,saturation", s->conn_state.disp_info->bcsh_info.saturation);
2071*4882a593Smuzhiyun FDT_SET_U32("bcsh,hue", s->conn_state.disp_info->bcsh_info.hue);
2072*4882a593Smuzhiyun
2073*4882a593Smuzhiyun if (!strncasecmp(cacm_header, "CACM", 4)) {
2074*4882a593Smuzhiyun FDT_SET_U32("post_csc,hue",
2075*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.hue);
2076*4882a593Smuzhiyun FDT_SET_U32("post_csc,saturation",
2077*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.saturation);
2078*4882a593Smuzhiyun FDT_SET_U32("post_csc,contrast",
2079*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.contrast);
2080*4882a593Smuzhiyun FDT_SET_U32("post_csc,brightness",
2081*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.brightness);
2082*4882a593Smuzhiyun FDT_SET_U32("post_csc,r_gain",
2083*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.r_gain);
2084*4882a593Smuzhiyun FDT_SET_U32("post_csc,g_gain",
2085*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.g_gain);
2086*4882a593Smuzhiyun FDT_SET_U32("post_csc,b_gain",
2087*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.b_gain);
2088*4882a593Smuzhiyun FDT_SET_U32("post_csc,r_offset",
2089*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.r_offset);
2090*4882a593Smuzhiyun FDT_SET_U32("post_csc,g_offset",
2091*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.g_offset);
2092*4882a593Smuzhiyun FDT_SET_U32("post_csc,b_offset",
2093*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.b_offset);
2094*4882a593Smuzhiyun FDT_SET_U32("post_csc,csc_enable",
2095*4882a593Smuzhiyun s->conn_state.disp_info->csc_info.csc_enable);
2096*4882a593Smuzhiyun }
2097*4882a593Smuzhiyun }
2098*4882a593Smuzhiyun
2099*4882a593Smuzhiyun if (s->conn_state.disp_info->cubic_lut_data.size &&
2100*4882a593Smuzhiyun CONFIG_ROCKCHIP_CUBIC_LUT_SIZE)
2101*4882a593Smuzhiyun FDT_SET_U32("cubic_lut,offset", get_cubic_lut_offset(s->crtc_state.crtc_id));
2102*4882a593Smuzhiyun
2103*4882a593Smuzhiyun #undef FDT_SET_U32
2104*4882a593Smuzhiyun }
2105*4882a593Smuzhiyun }
2106*4882a593Smuzhiyun
rockchip_display_bind(struct udevice * dev)2107*4882a593Smuzhiyun int rockchip_display_bind(struct udevice *dev)
2108*4882a593Smuzhiyun {
2109*4882a593Smuzhiyun struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
2110*4882a593Smuzhiyun
2111*4882a593Smuzhiyun plat->size = DRM_ROCKCHIP_FB_SIZE + MEMORY_POOL_SIZE;
2112*4882a593Smuzhiyun
2113*4882a593Smuzhiyun return 0;
2114*4882a593Smuzhiyun }
2115*4882a593Smuzhiyun
2116*4882a593Smuzhiyun static const struct udevice_id rockchip_display_ids[] = {
2117*4882a593Smuzhiyun { .compatible = "rockchip,display-subsystem" },
2118*4882a593Smuzhiyun { }
2119*4882a593Smuzhiyun };
2120*4882a593Smuzhiyun
2121*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_display) = {
2122*4882a593Smuzhiyun .name = "rockchip_display",
2123*4882a593Smuzhiyun .id = UCLASS_VIDEO,
2124*4882a593Smuzhiyun .of_match = rockchip_display_ids,
2125*4882a593Smuzhiyun .bind = rockchip_display_bind,
2126*4882a593Smuzhiyun .probe = rockchip_display_probe,
2127*4882a593Smuzhiyun };
2128*4882a593Smuzhiyun
do_rockchip_logo_show(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])2129*4882a593Smuzhiyun static int do_rockchip_logo_show(cmd_tbl_t *cmdtp, int flag, int argc,
2130*4882a593Smuzhiyun char *const argv[])
2131*4882a593Smuzhiyun {
2132*4882a593Smuzhiyun if (argc != 1)
2133*4882a593Smuzhiyun return CMD_RET_USAGE;
2134*4882a593Smuzhiyun
2135*4882a593Smuzhiyun rockchip_show_logo();
2136*4882a593Smuzhiyun
2137*4882a593Smuzhiyun return 0;
2138*4882a593Smuzhiyun }
2139*4882a593Smuzhiyun
do_rockchip_show_bmp(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])2140*4882a593Smuzhiyun static int do_rockchip_show_bmp(cmd_tbl_t *cmdtp, int flag, int argc,
2141*4882a593Smuzhiyun char *const argv[])
2142*4882a593Smuzhiyun {
2143*4882a593Smuzhiyun if (argc != 2)
2144*4882a593Smuzhiyun return CMD_RET_USAGE;
2145*4882a593Smuzhiyun
2146*4882a593Smuzhiyun rockchip_show_bmp(argv[1]);
2147*4882a593Smuzhiyun
2148*4882a593Smuzhiyun return 0;
2149*4882a593Smuzhiyun }
2150*4882a593Smuzhiyun
do_rockchip_vop_dump(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])2151*4882a593Smuzhiyun static int do_rockchip_vop_dump(cmd_tbl_t *cmdtp, int flag, int argc,
2152*4882a593Smuzhiyun char *const argv[])
2153*4882a593Smuzhiyun {
2154*4882a593Smuzhiyun int ret;
2155*4882a593Smuzhiyun
2156*4882a593Smuzhiyun if (argc < 1 || argc > 2)
2157*4882a593Smuzhiyun return CMD_RET_USAGE;
2158*4882a593Smuzhiyun
2159*4882a593Smuzhiyun ret = rockchip_vop_dump(argv[1]);
2160*4882a593Smuzhiyun
2161*4882a593Smuzhiyun return ret;
2162*4882a593Smuzhiyun }
2163*4882a593Smuzhiyun
2164*4882a593Smuzhiyun U_BOOT_CMD(
2165*4882a593Smuzhiyun rockchip_show_logo, 1, 1, do_rockchip_logo_show,
2166*4882a593Smuzhiyun "load and display log from resource partition",
2167*4882a593Smuzhiyun NULL
2168*4882a593Smuzhiyun );
2169*4882a593Smuzhiyun
2170*4882a593Smuzhiyun U_BOOT_CMD(
2171*4882a593Smuzhiyun rockchip_show_bmp, 2, 1, do_rockchip_show_bmp,
2172*4882a593Smuzhiyun "load and display bmp from resource partition",
2173*4882a593Smuzhiyun " <bmp_name>"
2174*4882a593Smuzhiyun );
2175*4882a593Smuzhiyun
2176*4882a593Smuzhiyun U_BOOT_CMD(
2177*4882a593Smuzhiyun vop_dump, 2, 1, do_rockchip_vop_dump,
2178*4882a593Smuzhiyun "dump vop regs",
2179*4882a593Smuzhiyun " [a/all]"
2180*4882a593Smuzhiyun );
2181