1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <clk.h>
8*4882a593Smuzhiyun #include <config.h>
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <errno.h>
11*4882a593Smuzhiyun #include <malloc.h>
12*4882a593Smuzhiyun #include <asm/unaligned.h>
13*4882a593Smuzhiyun #include <linux/list.h>
14*4882a593Smuzhiyun #include <dm/device.h>
15*4882a593Smuzhiyun #include <dm.h>
16*4882a593Smuzhiyun #include <dm/device-internal.h>
17*4882a593Smuzhiyun #include <dm/lists.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "rockchip_display.h"
20*4882a593Smuzhiyun #include "rockchip_crtc.h"
21*4882a593Smuzhiyun #include "rockchip_connector.h"
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD
24*4882a593Smuzhiyun static const struct udevice_id rockchip_vp_ids[] = {
25*4882a593Smuzhiyun { .compatible = "rockchip-vp" },
26*4882a593Smuzhiyun { }
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_vp) = {
30*4882a593Smuzhiyun .name = "rockchip-vp",
31*4882a593Smuzhiyun .id = UCLASS_VIDEO_CRTC,
32*4882a593Smuzhiyun .of_match = rockchip_vp_ids,
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun static const struct rockchip_crtc rk3036_vop_data = {
36*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
37*4882a593Smuzhiyun .data = &rk3036_vop,
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static const struct rockchip_crtc rv1106_vop_data = {
41*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
42*4882a593Smuzhiyun .data = &rv1106_vop,
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static const struct rockchip_crtc rv1108_vop_data = {
46*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
47*4882a593Smuzhiyun .data = &rv1108_vop,
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun static const struct rockchip_crtc rv1126_vop_data = {
51*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
52*4882a593Smuzhiyun .data = &rv1126_vop,
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun static const struct rockchip_crtc px30_vop_lit_data = {
56*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
57*4882a593Smuzhiyun .data = &px30_vop_lit,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static const struct rockchip_crtc px30_vop_big_data = {
61*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
62*4882a593Smuzhiyun .data = &px30_vop_big,
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static const struct rockchip_crtc rk3308_vop_data = {
66*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
67*4882a593Smuzhiyun .data = &rk3308_vop,
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun static const struct rockchip_crtc rk1808_vop_data = {
71*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
72*4882a593Smuzhiyun .data = &rk1808_vop,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static const struct rockchip_crtc rk3288_vop_big_data = {
76*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
77*4882a593Smuzhiyun .data = &rk3288_vop_big,
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun static const struct rockchip_crtc rk3288_vop_lit_data = {
81*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
82*4882a593Smuzhiyun .data = &rk3288_vop_lit,
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun static const struct rockchip_crtc rk3368_vop_data = {
86*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
87*4882a593Smuzhiyun .data = &rk3368_vop,
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun static const struct rockchip_crtc rk3366_vop_data = {
91*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
92*4882a593Smuzhiyun .data = &rk3366_vop,
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static const struct rockchip_crtc rk3399_vop_big_data = {
96*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
97*4882a593Smuzhiyun .data = &rk3399_vop_big,
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun static const struct rockchip_crtc rk3399_vop_lit_data = {
101*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
102*4882a593Smuzhiyun .data = &rk3399_vop_lit,
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static const struct rockchip_crtc rk322x_vop_data = {
106*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
107*4882a593Smuzhiyun .data = &rk322x_vop,
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun static const struct rockchip_crtc rk3328_vop_data = {
111*4882a593Smuzhiyun .funcs = &rockchip_vop_funcs,
112*4882a593Smuzhiyun .data = &rk3328_vop,
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun static const struct rockchip_crtc rk3528_vop_data = {
116*4882a593Smuzhiyun .funcs = &rockchip_vop2_funcs,
117*4882a593Smuzhiyun .data = &rk3528_vop,
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun static const struct rockchip_crtc rk3562_vop_data = {
121*4882a593Smuzhiyun .funcs = &rockchip_vop2_funcs,
122*4882a593Smuzhiyun .data = &rk3562_vop,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun static const struct rockchip_crtc rk3568_vop_data = {
126*4882a593Smuzhiyun .funcs = &rockchip_vop2_funcs,
127*4882a593Smuzhiyun .data = &rk3568_vop,
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun static const struct rockchip_crtc rk3588_vop_data = {
131*4882a593Smuzhiyun .funcs = &rockchip_vop2_funcs,
132*4882a593Smuzhiyun .data = &rk3588_vop,
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun static const struct udevice_id rockchip_vop_ids[] = {
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun .compatible = "rockchip,rk3036-vop",
138*4882a593Smuzhiyun .data = (ulong)&rk3036_vop_data,
139*4882a593Smuzhiyun }, {
140*4882a593Smuzhiyun .compatible = "rockchip,rv1108-vop",
141*4882a593Smuzhiyun .data = (ulong)&rv1108_vop_data,
142*4882a593Smuzhiyun }, {
143*4882a593Smuzhiyun .compatible = "rockchip,rv1106-vop",
144*4882a593Smuzhiyun .data = (ulong)&rv1106_vop_data,
145*4882a593Smuzhiyun }, {
146*4882a593Smuzhiyun .compatible = "rockchip,rv1126-vop",
147*4882a593Smuzhiyun .data = (ulong)&rv1126_vop_data,
148*4882a593Smuzhiyun }, {
149*4882a593Smuzhiyun .compatible = "rockchip,rk3126-vop",
150*4882a593Smuzhiyun .data = (ulong)&rk3036_vop_data,
151*4882a593Smuzhiyun }, {
152*4882a593Smuzhiyun .compatible = "rockchip,px30-vop-lit",
153*4882a593Smuzhiyun .data = (ulong)&px30_vop_lit_data,
154*4882a593Smuzhiyun }, {
155*4882a593Smuzhiyun .compatible = "rockchip,px30-vop-big",
156*4882a593Smuzhiyun .data = (ulong)&px30_vop_big_data,
157*4882a593Smuzhiyun }, {
158*4882a593Smuzhiyun .compatible = "rockchip,rk3308-vop",
159*4882a593Smuzhiyun .data = (ulong)&rk3308_vop_data,
160*4882a593Smuzhiyun }, {
161*4882a593Smuzhiyun .compatible = "rockchip,rk1808-vop-lit",
162*4882a593Smuzhiyun .data = (ulong)&rk1808_vop_data,
163*4882a593Smuzhiyun }, {
164*4882a593Smuzhiyun .compatible = "rockchip,rk3288-vop-big",
165*4882a593Smuzhiyun .data = (ulong)&rk3288_vop_big_data,
166*4882a593Smuzhiyun }, {
167*4882a593Smuzhiyun .compatible = "rockchip,rk3288-vop-lit",
168*4882a593Smuzhiyun .data = (ulong)&rk3288_vop_lit_data,
169*4882a593Smuzhiyun }, {
170*4882a593Smuzhiyun .compatible = "rockchip,rk3368-vop",
171*4882a593Smuzhiyun .data = (ulong)&rk3368_vop_data,
172*4882a593Smuzhiyun }, {
173*4882a593Smuzhiyun .compatible = "rockchip,rk3366-vop",
174*4882a593Smuzhiyun .data = (ulong)&rk3366_vop_data,
175*4882a593Smuzhiyun }, {
176*4882a593Smuzhiyun .compatible = "rockchip,rk3399-vop-big",
177*4882a593Smuzhiyun .data = (ulong)&rk3399_vop_big_data,
178*4882a593Smuzhiyun }, {
179*4882a593Smuzhiyun .compatible = "rockchip,rk3399-vop-lit",
180*4882a593Smuzhiyun .data = (ulong)&rk3399_vop_lit_data,
181*4882a593Smuzhiyun }, {
182*4882a593Smuzhiyun .compatible = "rockchip,rk322x-vop",
183*4882a593Smuzhiyun .data = (ulong)&rk322x_vop_data,
184*4882a593Smuzhiyun }, {
185*4882a593Smuzhiyun .compatible = "rockchip,rk3328-vop",
186*4882a593Smuzhiyun .data = (ulong)&rk3328_vop_data,
187*4882a593Smuzhiyun }, {
188*4882a593Smuzhiyun .compatible = "rockchip,rk3528-vop",
189*4882a593Smuzhiyun .data = (ulong)&rk3528_vop_data,
190*4882a593Smuzhiyun }, {
191*4882a593Smuzhiyun .compatible = "rockchip,rk3562-vop",
192*4882a593Smuzhiyun .data = (ulong)&rk3562_vop_data,
193*4882a593Smuzhiyun }, {
194*4882a593Smuzhiyun .compatible = "rockchip,rk3568-vop",
195*4882a593Smuzhiyun .data = (ulong)&rk3568_vop_data,
196*4882a593Smuzhiyun }, {
197*4882a593Smuzhiyun .compatible = "rockchip,rk3588-vop",
198*4882a593Smuzhiyun .data = (ulong)&rk3588_vop_data,
199*4882a593Smuzhiyun }, { }
200*4882a593Smuzhiyun };
201*4882a593Smuzhiyun
rockchip_vop_probe(struct udevice * dev)202*4882a593Smuzhiyun static int rockchip_vop_probe(struct udevice *dev)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun struct udevice *child;
205*4882a593Smuzhiyun int ret;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /* Process 'assigned-{clocks/clock-parents/clock-rates}' properties */
208*4882a593Smuzhiyun ret = clk_set_defaults(dev);
209*4882a593Smuzhiyun if (ret) {
210*4882a593Smuzhiyun dev_err(dev, "%s clk_set_defaults failed %d\n", __func__, ret);
211*4882a593Smuzhiyun return ret;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun for (device_find_first_child(dev, &child);
215*4882a593Smuzhiyun child;
216*4882a593Smuzhiyun device_find_next_child(&child)) {
217*4882a593Smuzhiyun ret = device_probe(child);
218*4882a593Smuzhiyun if (ret)
219*4882a593Smuzhiyun return ret;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun ret = clk_set_defaults(child);
222*4882a593Smuzhiyun if (ret)
223*4882a593Smuzhiyun return ret;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun return 0;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
rockchip_vop_bind(struct udevice * dev)229*4882a593Smuzhiyun static int rockchip_vop_bind(struct udevice *dev)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun ofnode ports, node;
232*4882a593Smuzhiyun int ret;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun ports = dev_read_subnode(dev, "ports");
235*4882a593Smuzhiyun if (!ofnode_valid(ports))
236*4882a593Smuzhiyun return 0;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun ofnode_for_each_subnode(node, ports) {
239*4882a593Smuzhiyun const char *name = ofnode_get_name(node);
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun ret = device_bind_driver_to_node(dev, "rockchip-vp", name,
242*4882a593Smuzhiyun node, NULL);
243*4882a593Smuzhiyun if (ret) {
244*4882a593Smuzhiyun dev_err(dev, "unable to bind vp device node: %d\n", ret);
245*4882a593Smuzhiyun return ret;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun return 0;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun U_BOOT_DRIVER(rockchip_vop) = {
253*4882a593Smuzhiyun .name = "rockchip-vop",
254*4882a593Smuzhiyun .id = UCLASS_VIDEO_CRTC,
255*4882a593Smuzhiyun .of_match = rockchip_vop_ids,
256*4882a593Smuzhiyun .bind = rockchip_vop_bind,
257*4882a593Smuzhiyun .probe = rockchip_vop_probe,
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun UCLASS_DRIVER(rockchip_crtc) = {
261*4882a593Smuzhiyun .id = UCLASS_VIDEO_CRTC,
262*4882a593Smuzhiyun .name = "CRTC",
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun #else
266*4882a593Smuzhiyun static struct rockchip_crtc rk3528_vop_data = {
267*4882a593Smuzhiyun .funcs = &rockchip_vop2_funcs,
268*4882a593Smuzhiyun .data = &rk3528_vop,
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun
rockchip_spl_vop_probe(struct crtc_state * crtc_state)271*4882a593Smuzhiyun int rockchip_spl_vop_probe(struct crtc_state *crtc_state)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun crtc_state->crtc = &rk3528_vop_data;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun return 0;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun #endif
279*4882a593Smuzhiyun
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