xref: /OK3568_Linux_fs/u-boot/drivers/usb/ulpi/ulpi.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2011 Jana Rapava <fermata7@gmail.com>
3*4882a593Smuzhiyun  * Copyright (C) 2011 CompuLab, Ltd. <www.compulab.co.il>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Authors: Jana Rapava <fermata7@gmail.com>
6*4882a593Smuzhiyun  *	    Igor Grinberg <grinberg@compulab.co.il>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Based on:
9*4882a593Smuzhiyun  * linux/drivers/usb/otg/ulpi.c
10*4882a593Smuzhiyun  * Generic ULPI USB transceiver support
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Original Copyright follow:
13*4882a593Smuzhiyun  * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  * Based on sources from
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  *   Sascha Hauer <s.hauer@pengutronix.de>
18*4882a593Smuzhiyun  *   Freescale Semiconductors
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <common.h>
24*4882a593Smuzhiyun #include <exports.h>
25*4882a593Smuzhiyun #include <usb/ulpi.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define ULPI_ID_REGS_COUNT	4
28*4882a593Smuzhiyun #define ULPI_TEST_VALUE		0x55	/* 0x55 == 0b01010101 */
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun static struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
31*4882a593Smuzhiyun 
ulpi_integrity_check(struct ulpi_viewport * ulpi_vp)32*4882a593Smuzhiyun static int ulpi_integrity_check(struct ulpi_viewport *ulpi_vp)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	u32 val, tval = ULPI_TEST_VALUE;
35*4882a593Smuzhiyun 	int err, i;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	/* Use the 'special' test value to check all bits */
38*4882a593Smuzhiyun 	for (i = 0; i < 2; i++, tval <<= 1) {
39*4882a593Smuzhiyun 		err = ulpi_write(ulpi_vp, &ulpi->scratch, tval);
40*4882a593Smuzhiyun 		if (err)
41*4882a593Smuzhiyun 			return err;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 		val = ulpi_read(ulpi_vp, &ulpi->scratch);
44*4882a593Smuzhiyun 		if (val != tval) {
45*4882a593Smuzhiyun 			printf("ULPI integrity check failed\n");
46*4882a593Smuzhiyun 			return val;
47*4882a593Smuzhiyun 		}
48*4882a593Smuzhiyun 	}
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun 
ulpi_init(struct ulpi_viewport * ulpi_vp)53*4882a593Smuzhiyun int ulpi_init(struct ulpi_viewport *ulpi_vp)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun 	u32 val, id = 0;
56*4882a593Smuzhiyun 	u8 *reg = &ulpi->product_id_high;
57*4882a593Smuzhiyun 	int i;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	/* Assemble ID from four ULPI ID registers (8 bits each). */
60*4882a593Smuzhiyun 	for (i = 0; i < ULPI_ID_REGS_COUNT; i++) {
61*4882a593Smuzhiyun 		val = ulpi_read(ulpi_vp, reg - i);
62*4882a593Smuzhiyun 		if (val == ULPI_ERROR)
63*4882a593Smuzhiyun 			return val;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 		id = (id << 8) | val;
66*4882a593Smuzhiyun 	}
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	/* Split ID into vendor and product ID. */
69*4882a593Smuzhiyun 	debug("ULPI transceiver ID 0x%04x:0x%04x\n", id >> 16, id & 0xffff);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	return ulpi_integrity_check(ulpi_vp);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
ulpi_select_transceiver(struct ulpi_viewport * ulpi_vp,unsigned speed)74*4882a593Smuzhiyun int ulpi_select_transceiver(struct ulpi_viewport *ulpi_vp, unsigned speed)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun 	u32 tspeed = ULPI_FC_FULL_SPEED;
77*4882a593Smuzhiyun 	u32 val;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	switch (speed) {
80*4882a593Smuzhiyun 	case ULPI_FC_HIGH_SPEED:
81*4882a593Smuzhiyun 	case ULPI_FC_FULL_SPEED:
82*4882a593Smuzhiyun 	case ULPI_FC_LOW_SPEED:
83*4882a593Smuzhiyun 	case ULPI_FC_FS4LS:
84*4882a593Smuzhiyun 		tspeed = speed;
85*4882a593Smuzhiyun 		break;
86*4882a593Smuzhiyun 	default:
87*4882a593Smuzhiyun 		printf("ULPI: %s: wrong transceiver speed specified: %u, "
88*4882a593Smuzhiyun 			"falling back to full speed\n", __func__, speed);
89*4882a593Smuzhiyun 	}
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	val = ulpi_read(ulpi_vp, &ulpi->function_ctrl);
92*4882a593Smuzhiyun 	if (val == ULPI_ERROR)
93*4882a593Smuzhiyun 		return val;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	/* clear the previous speed setting */
96*4882a593Smuzhiyun 	val = (val & ~ULPI_FC_XCVRSEL_MASK) | tspeed;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	return ulpi_write(ulpi_vp, &ulpi->function_ctrl, val);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun 
ulpi_set_vbus(struct ulpi_viewport * ulpi_vp,int on,int ext_power)101*4882a593Smuzhiyun int ulpi_set_vbus(struct ulpi_viewport *ulpi_vp, int on, int ext_power)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	u32 flags = ULPI_OTG_DRVVBUS;
104*4882a593Smuzhiyun 	u8 *reg = on ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	if (ext_power)
107*4882a593Smuzhiyun 		flags |= ULPI_OTG_DRVVBUS_EXT;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	return ulpi_write(ulpi_vp, reg, flags);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
ulpi_set_vbus_indicator(struct ulpi_viewport * ulpi_vp,int external,int passthu,int complement)112*4882a593Smuzhiyun int ulpi_set_vbus_indicator(struct ulpi_viewport *ulpi_vp, int external,
113*4882a593Smuzhiyun 			int passthu, int complement)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	u32 flags, val;
116*4882a593Smuzhiyun 	u8 *reg;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	reg = external ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
119*4882a593Smuzhiyun 	val = ulpi_write(ulpi_vp, reg, ULPI_OTG_EXTVBUSIND);
120*4882a593Smuzhiyun 	if (val)
121*4882a593Smuzhiyun 		return val;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	flags = passthu ? ULPI_IFACE_PASSTHRU : 0;
124*4882a593Smuzhiyun 	flags |= complement ? ULPI_IFACE_EXTVBUS_COMPLEMENT : 0;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	val = ulpi_read(ulpi_vp, &ulpi->iface_ctrl);
127*4882a593Smuzhiyun 	if (val == ULPI_ERROR)
128*4882a593Smuzhiyun 		return val;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	val = val & ~(ULPI_IFACE_PASSTHRU & ULPI_IFACE_EXTVBUS_COMPLEMENT);
131*4882a593Smuzhiyun 	val |= flags;
132*4882a593Smuzhiyun 	val = ulpi_write(ulpi_vp, &ulpi->iface_ctrl, val);
133*4882a593Smuzhiyun 	if (val)
134*4882a593Smuzhiyun 		return val;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun 
ulpi_set_pd(struct ulpi_viewport * ulpi_vp,int enable)139*4882a593Smuzhiyun int ulpi_set_pd(struct ulpi_viewport *ulpi_vp, int enable)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	u32 val = ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN;
142*4882a593Smuzhiyun 	u8 *reg = enable ? &ulpi->otg_ctrl_set : &ulpi->otg_ctrl_clear;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	return ulpi_write(ulpi_vp, reg, val);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
ulpi_opmode_sel(struct ulpi_viewport * ulpi_vp,unsigned opmode)147*4882a593Smuzhiyun int ulpi_opmode_sel(struct ulpi_viewport *ulpi_vp, unsigned opmode)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun 	u32 topmode = ULPI_FC_OPMODE_NORMAL;
150*4882a593Smuzhiyun 	u32 val;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	switch (opmode) {
153*4882a593Smuzhiyun 	case ULPI_FC_OPMODE_NORMAL:
154*4882a593Smuzhiyun 	case ULPI_FC_OPMODE_NONDRIVING:
155*4882a593Smuzhiyun 	case ULPI_FC_OPMODE_DISABLE_NRZI:
156*4882a593Smuzhiyun 	case ULPI_FC_OPMODE_NOSYNC_NOEOP:
157*4882a593Smuzhiyun 		topmode = opmode;
158*4882a593Smuzhiyun 		break;
159*4882a593Smuzhiyun 	default:
160*4882a593Smuzhiyun 		printf("ULPI: %s: wrong OpMode specified: %u, "
161*4882a593Smuzhiyun 			"falling back to OpMode Normal\n", __func__, opmode);
162*4882a593Smuzhiyun 	}
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	val = ulpi_read(ulpi_vp, &ulpi->function_ctrl);
165*4882a593Smuzhiyun 	if (val == ULPI_ERROR)
166*4882a593Smuzhiyun 		return val;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	/* clear the previous opmode setting */
169*4882a593Smuzhiyun 	val = (val & ~ULPI_FC_OPMODE_MASK) | topmode;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	return ulpi_write(ulpi_vp, &ulpi->function_ctrl, val);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
ulpi_serial_mode_enable(struct ulpi_viewport * ulpi_vp,unsigned smode)174*4882a593Smuzhiyun int ulpi_serial_mode_enable(struct ulpi_viewport *ulpi_vp, unsigned smode)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun 	switch (smode) {
177*4882a593Smuzhiyun 	case ULPI_IFACE_6_PIN_SERIAL_MODE:
178*4882a593Smuzhiyun 	case ULPI_IFACE_3_PIN_SERIAL_MODE:
179*4882a593Smuzhiyun 		break;
180*4882a593Smuzhiyun 	default:
181*4882a593Smuzhiyun 		printf("ULPI: %s: unrecognized Serial Mode specified: %u\n",
182*4882a593Smuzhiyun 			__func__, smode);
183*4882a593Smuzhiyun 		return ULPI_ERROR;
184*4882a593Smuzhiyun 	}
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	return ulpi_write(ulpi_vp, &ulpi->iface_ctrl_set, smode);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
ulpi_suspend(struct ulpi_viewport * ulpi_vp)189*4882a593Smuzhiyun int ulpi_suspend(struct ulpi_viewport *ulpi_vp)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	int err;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	err = ulpi_write(ulpi_vp, &ulpi->function_ctrl_clear,
194*4882a593Smuzhiyun 			ULPI_FC_SUSPENDM);
195*4882a593Smuzhiyun 	if (err)
196*4882a593Smuzhiyun 		printf("ULPI: %s: failed writing the suspend bit\n", __func__);
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	return err;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun /*
202*4882a593Smuzhiyun  * Wait for ULPI PHY reset to complete.
203*4882a593Smuzhiyun  * Actual wait for reset must be done in a view port specific way,
204*4882a593Smuzhiyun  * because it involves checking the DIR line.
205*4882a593Smuzhiyun  */
__ulpi_reset_wait(struct ulpi_viewport * ulpi_vp)206*4882a593Smuzhiyun static int __ulpi_reset_wait(struct ulpi_viewport *ulpi_vp)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun 	u32 val;
209*4882a593Smuzhiyun 	int timeout = CONFIG_USB_ULPI_TIMEOUT;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	/* Wait for the RESET bit to become zero */
212*4882a593Smuzhiyun 	while (--timeout) {
213*4882a593Smuzhiyun 		/*
214*4882a593Smuzhiyun 		 * This function is generic and suppose to work
215*4882a593Smuzhiyun 		 * with any viewport, so we cheat here and don't check
216*4882a593Smuzhiyun 		 * for the error of ulpi_read(), if there is one, then
217*4882a593Smuzhiyun 		 * there will be a timeout.
218*4882a593Smuzhiyun 		 */
219*4882a593Smuzhiyun 		val = ulpi_read(ulpi_vp, &ulpi->function_ctrl);
220*4882a593Smuzhiyun 		if (!(val & ULPI_FC_RESET))
221*4882a593Smuzhiyun 			return 0;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 		udelay(1);
224*4882a593Smuzhiyun 	}
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	printf("ULPI: %s: reset timed out\n", __func__);
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	return ULPI_ERROR;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun int ulpi_reset_wait(struct ulpi_viewport *ulpi_vp)
231*4882a593Smuzhiyun 	__attribute__((weak, alias("__ulpi_reset_wait")));
232*4882a593Smuzhiyun 
ulpi_reset(struct ulpi_viewport * ulpi_vp)233*4882a593Smuzhiyun int ulpi_reset(struct ulpi_viewport *ulpi_vp)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun 	int err;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	err = ulpi_write(ulpi_vp,
238*4882a593Smuzhiyun 			&ulpi->function_ctrl_set, ULPI_FC_RESET);
239*4882a593Smuzhiyun 	if (err) {
240*4882a593Smuzhiyun 		printf("ULPI: %s: failed writing reset bit\n", __func__);
241*4882a593Smuzhiyun 		return err;
242*4882a593Smuzhiyun 	}
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	return ulpi_reset_wait(ulpi_vp);
245*4882a593Smuzhiyun }
246