1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * TI's Davinci platform specific USB wrapper functions. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2008 Texas Instruments 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Author: Thomas Abraham t-abraham@ti.com, Texas Instruments 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __DAVINCI_USB_H__ 12*4882a593Smuzhiyun #define __DAVINCI_USB_H__ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <asm/arch/hardware.h> 15*4882a593Smuzhiyun #include "musb_core.h" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* Base address of DAVINCI usb0 wrapper */ 18*4882a593Smuzhiyun #define DAVINCI_USB0_BASE 0x01C64000 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* Base address of DAVINCI musb core */ 21*4882a593Smuzhiyun #define MENTOR_USB0_BASE (DAVINCI_USB0_BASE+0x400) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* 24*4882a593Smuzhiyun * Davinci platform USB wrapper register overlay. Note: Only the required 25*4882a593Smuzhiyun * registers are included in this structure. It can be expanded as required. 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun struct davinci_usb_regs { 28*4882a593Smuzhiyun u32 version; 29*4882a593Smuzhiyun u32 ctrlr; 30*4882a593Smuzhiyun u32 reserved[0x20]; 31*4882a593Smuzhiyun u32 intclrr; 32*4882a593Smuzhiyun u32 intmskr; 33*4882a593Smuzhiyun u32 intmsksetr; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #define DAVINCI_USB_TX_ENDPTS_MASK 0x1f /* ep0 + 4 tx */ 37*4882a593Smuzhiyun #define DAVINCI_USB_RX_ENDPTS_MASK 0x1e /* 4 rx */ 38*4882a593Smuzhiyun #define DAVINCI_USB_USBINT_SHIFT 16 39*4882a593Smuzhiyun #define DAVINCI_USB_TXINT_SHIFT 0 40*4882a593Smuzhiyun #define DAVINCI_USB_RXINT_SHIFT 8 41*4882a593Smuzhiyun #define DAVINCI_INTR_DRVVBUS 0x0100 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define DAVINCI_USB_USBINT_MASK 0x01ff0000 /* 8 Mentor, DRVVBUS */ 44*4882a593Smuzhiyun #define DAVINCI_USB_TXINT_MASK \ 45*4882a593Smuzhiyun (DAVINCI_USB_TX_ENDPTS_MASK << DAVINCI_USB_TXINT_SHIFT) 46*4882a593Smuzhiyun #define DAVINCI_USB_RXINT_MASK \ 47*4882a593Smuzhiyun (DAVINCI_USB_RX_ENDPTS_MASK << DAVINCI_USB_RXINT_SHIFT) 48*4882a593Smuzhiyun #define MGC_BUSCTL_OFFSET(_bEnd, _bOffset) \ 49*4882a593Smuzhiyun (0x80 + (8*(_bEnd)) + (_bOffset)) 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* Integrated highspeed/otg PHY */ 52*4882a593Smuzhiyun #define USBPHY_CTL_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x34) 53*4882a593Smuzhiyun #define USBPHY_PHY24MHZ (1 << 13) 54*4882a593Smuzhiyun #define USBPHY_PHYCLKGD (1 << 8) 55*4882a593Smuzhiyun #define USBPHY_SESNDEN (1 << 7) /* v(sess_end) comparator */ 56*4882a593Smuzhiyun #define USBPHY_VBDTCTEN (1 << 6) /* v(bus) comparator */ 57*4882a593Smuzhiyun #define USBPHY_PHYPLLON (1 << 4) /* override pll suspend */ 58*4882a593Smuzhiyun #define USBPHY_CLKO1SEL (1 << 3) 59*4882a593Smuzhiyun #define USBPHY_OSCPDWN (1 << 2) 60*4882a593Smuzhiyun #define USBPHY_PHYPDWN (1 << 0) 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* Timeout for Davinci USB module */ 63*4882a593Smuzhiyun #define DAVINCI_USB_TIMEOUT 0x3FFFFFF 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* IO Expander I2C address and VBUS enable mask */ 66*4882a593Smuzhiyun #define IOEXP_I2C_ADDR 0x3A 67*4882a593Smuzhiyun #define IOEXP_VBUSEN_MASK 1 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun /* extern functions */ 70*4882a593Smuzhiyun extern void lpsc_on(unsigned int id); 71*4882a593Smuzhiyun extern int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 72*4882a593Smuzhiyun extern int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 73*4882a593Smuzhiyun extern void enable_vbus(void); 74*4882a593Smuzhiyun #endif /* __DAVINCI_USB_H__ */ 75