1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * am35x.c - TI's AM35x platform specific usb wrapper functions.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Based on drivers/usb/musb/da8xx.c
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (c) 2010 Texas Instruments Incorporated
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "am35x.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /* MUSB platform configuration */
18*4882a593Smuzhiyun struct musb_config musb_cfg = {
19*4882a593Smuzhiyun .regs = (struct musb_regs *)AM35X_USB_OTG_CORE_BASE,
20*4882a593Smuzhiyun .timeout = AM35X_USB_OTG_TIMEOUT,
21*4882a593Smuzhiyun .musb_speed = 0,
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun * Enable the USB phy
26*4882a593Smuzhiyun */
phy_on(void)27*4882a593Smuzhiyun static u8 phy_on(void)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun u32 devconf2;
30*4882a593Smuzhiyun u32 timeout;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun devconf2 = readl(&am35x_scm_general_regs->devconf2);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun devconf2 &= ~(DEVCONF2_RESET | DEVCONF2_PHYPWRDN | DEVCONF2_OTGPWRDN |
35*4882a593Smuzhiyun DEVCONF2_OTGMODE | DEVCONF2_REFFREQ |
36*4882a593Smuzhiyun DEVCONF2_PHY_GPIOMODE);
37*4882a593Smuzhiyun devconf2 |= DEVCONF2_SESENDEN | DEVCONF2_VBDTCTEN | DEVCONF2_PHY_PLLON |
38*4882a593Smuzhiyun DEVCONF2_REFFREQ_13MHZ | DEVCONF2_DATPOL;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun writel(devconf2, &am35x_scm_general_regs->devconf2);
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* wait until the USB phy is turned on */
43*4882a593Smuzhiyun timeout = musb_cfg.timeout;
44*4882a593Smuzhiyun while (timeout--)
45*4882a593Smuzhiyun if (readl(&am35x_scm_general_regs->devconf2) & DEVCONF2_PHYCKGD)
46*4882a593Smuzhiyun return 1;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /* USB phy was not turned on */
49*4882a593Smuzhiyun return 0;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /*
53*4882a593Smuzhiyun * Disable the USB phy
54*4882a593Smuzhiyun */
phy_off(void)55*4882a593Smuzhiyun static void phy_off(void)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun u32 devconf2;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /*
60*4882a593Smuzhiyun * Power down the on-chip PHY.
61*4882a593Smuzhiyun */
62*4882a593Smuzhiyun devconf2 = readl(&am35x_scm_general_regs->devconf2);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun devconf2 &= ~DEVCONF2_PHY_PLLON;
65*4882a593Smuzhiyun devconf2 |= DEVCONF2_PHYPWRDN | DEVCONF2_OTGPWRDN;
66*4882a593Smuzhiyun writel(devconf2, &am35x_scm_general_regs->devconf2);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /*
70*4882a593Smuzhiyun * This function performs platform specific initialization for usb0.
71*4882a593Smuzhiyun */
musb_platform_init(void)72*4882a593Smuzhiyun int musb_platform_init(void)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun u32 revision;
75*4882a593Smuzhiyun u32 sw_reset;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* global usb reset */
78*4882a593Smuzhiyun sw_reset = readl(&am35x_scm_general_regs->ip_sw_reset);
79*4882a593Smuzhiyun sw_reset |= (1 << 0);
80*4882a593Smuzhiyun writel(sw_reset, &am35x_scm_general_regs->ip_sw_reset);
81*4882a593Smuzhiyun sw_reset &= ~(1 << 0);
82*4882a593Smuzhiyun writel(sw_reset, &am35x_scm_general_regs->ip_sw_reset);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* reset the controller */
85*4882a593Smuzhiyun writel(0x1, &am35x_usb_regs->control);
86*4882a593Smuzhiyun udelay(5000);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* start the on-chip usb phy and its pll */
89*4882a593Smuzhiyun if (phy_on() == 0)
90*4882a593Smuzhiyun return -1;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /* Returns zero if e.g. not clocked */
93*4882a593Smuzhiyun revision = readl(&am35x_usb_regs->revision);
94*4882a593Smuzhiyun if (revision == 0)
95*4882a593Smuzhiyun return -1;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun return 0;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /*
101*4882a593Smuzhiyun * This function performs platform specific deinitialization for usb0.
102*4882a593Smuzhiyun */
musb_platform_deinit(void)103*4882a593Smuzhiyun void musb_platform_deinit(void)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun /* Turn off the phy */
106*4882a593Smuzhiyun phy_off();
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /*
110*4882a593Smuzhiyun * This function reads data from endpoint fifo for AM35x
111*4882a593Smuzhiyun * which supports only 32bit read operation.
112*4882a593Smuzhiyun *
113*4882a593Smuzhiyun * ep - endpoint number
114*4882a593Smuzhiyun * length - number of bytes to read from FIFO
115*4882a593Smuzhiyun * fifo_data - pointer to data buffer into which data is read
116*4882a593Smuzhiyun */
117*4882a593Smuzhiyun __attribute__((weak))
read_fifo(u8 ep,u32 length,void * fifo_data)118*4882a593Smuzhiyun void read_fifo(u8 ep, u32 length, void *fifo_data)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun u8 *data = (u8 *)fifo_data;
121*4882a593Smuzhiyun u32 val;
122*4882a593Smuzhiyun int i;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* select the endpoint index */
125*4882a593Smuzhiyun writeb(ep, &musbr->index);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun if (length > 4) {
128*4882a593Smuzhiyun for (i = 0; i < (length >> 2); i++) {
129*4882a593Smuzhiyun val = readl(&musbr->fifox[ep]);
130*4882a593Smuzhiyun memcpy(data, &val, 4);
131*4882a593Smuzhiyun data += 4;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun length %= 4;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun if (length > 0) {
136*4882a593Smuzhiyun val = readl(&musbr->fifox[ep]);
137*4882a593Smuzhiyun memcpy(data, &val, length);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun }
140