1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Allwinner SUNXI "glue layer"
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright © 2015 Hans de Goede <hdegoede@redhat.com>
5*4882a593Smuzhiyun * Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on the sw_usb "Allwinner OTG Dual Role Controller" code.
8*4882a593Smuzhiyun * Copyright 2007-2012 (C) Allwinner Technology Co., Ltd.
9*4882a593Smuzhiyun * javen <javen@allwinnertech.com>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Based on the DA8xx "glue layer" code.
12*4882a593Smuzhiyun * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
13*4882a593Smuzhiyun * Copyright (C) 2005-2006 by Texas Instruments
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * This file is part of the Inventra Controller Driver for Linux.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun #include <common.h>
20*4882a593Smuzhiyun #include <dm.h>
21*4882a593Smuzhiyun #include <asm/arch/cpu.h>
22*4882a593Smuzhiyun #include <asm/arch/clock.h>
23*4882a593Smuzhiyun #include <asm/arch/gpio.h>
24*4882a593Smuzhiyun #include <asm/arch/usb_phy.h>
25*4882a593Smuzhiyun #include <asm-generic/gpio.h>
26*4882a593Smuzhiyun #include <dm/lists.h>
27*4882a593Smuzhiyun #include <dm/root.h>
28*4882a593Smuzhiyun #include <linux/usb/musb.h>
29*4882a593Smuzhiyun #include "linux-compat.h"
30*4882a593Smuzhiyun #include "musb_core.h"
31*4882a593Smuzhiyun #include "musb_uboot.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /******************************************************************************
34*4882a593Smuzhiyun ******************************************************************************
35*4882a593Smuzhiyun * From the Allwinner driver
36*4882a593Smuzhiyun ******************************************************************************
37*4882a593Smuzhiyun ******************************************************************************/
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /******************************************************************************
40*4882a593Smuzhiyun * From include/sunxi_usb_bsp.h
41*4882a593Smuzhiyun ******************************************************************************/
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* reg offsets */
44*4882a593Smuzhiyun #define USBC_REG_o_ISCR 0x0400
45*4882a593Smuzhiyun #define USBC_REG_o_PHYCTL 0x0404
46*4882a593Smuzhiyun #define USBC_REG_o_PHYBIST 0x0408
47*4882a593Smuzhiyun #define USBC_REG_o_PHYTUNE 0x040c
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define USBC_REG_o_VEND0 0x0043
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* Interface Status and Control */
52*4882a593Smuzhiyun #define USBC_BP_ISCR_VBUS_VALID_FROM_DATA 30
53*4882a593Smuzhiyun #define USBC_BP_ISCR_VBUS_VALID_FROM_VBUS 29
54*4882a593Smuzhiyun #define USBC_BP_ISCR_EXT_ID_STATUS 28
55*4882a593Smuzhiyun #define USBC_BP_ISCR_EXT_DM_STATUS 27
56*4882a593Smuzhiyun #define USBC_BP_ISCR_EXT_DP_STATUS 26
57*4882a593Smuzhiyun #define USBC_BP_ISCR_MERGED_VBUS_STATUS 25
58*4882a593Smuzhiyun #define USBC_BP_ISCR_MERGED_ID_STATUS 24
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define USBC_BP_ISCR_ID_PULLUP_EN 17
61*4882a593Smuzhiyun #define USBC_BP_ISCR_DPDM_PULLUP_EN 16
62*4882a593Smuzhiyun #define USBC_BP_ISCR_FORCE_ID 14
63*4882a593Smuzhiyun #define USBC_BP_ISCR_FORCE_VBUS_VALID 12
64*4882a593Smuzhiyun #define USBC_BP_ISCR_VBUS_VALID_SRC 10
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define USBC_BP_ISCR_HOSC_EN 7
67*4882a593Smuzhiyun #define USBC_BP_ISCR_VBUS_CHANGE_DETECT 6
68*4882a593Smuzhiyun #define USBC_BP_ISCR_ID_CHANGE_DETECT 5
69*4882a593Smuzhiyun #define USBC_BP_ISCR_DPDM_CHANGE_DETECT 4
70*4882a593Smuzhiyun #define USBC_BP_ISCR_IRQ_ENABLE 3
71*4882a593Smuzhiyun #define USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN 2
72*4882a593Smuzhiyun #define USBC_BP_ISCR_ID_CHANGE_DETECT_EN 1
73*4882a593Smuzhiyun #define USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN 0
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /******************************************************************************
76*4882a593Smuzhiyun * From usbc/usbc.c
77*4882a593Smuzhiyun ******************************************************************************/
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun struct sunxi_glue {
80*4882a593Smuzhiyun struct musb_host_data mdata;
81*4882a593Smuzhiyun struct sunxi_ccm_reg *ccm;
82*4882a593Smuzhiyun struct device dev;
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun #define to_sunxi_glue(d) container_of(d, struct sunxi_glue, dev)
85*4882a593Smuzhiyun
USBC_WakeUp_ClearChangeDetect(u32 reg_val)86*4882a593Smuzhiyun static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun u32 temp = reg_val;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun temp &= ~(1 << USBC_BP_ISCR_VBUS_CHANGE_DETECT);
91*4882a593Smuzhiyun temp &= ~(1 << USBC_BP_ISCR_ID_CHANGE_DETECT);
92*4882a593Smuzhiyun temp &= ~(1 << USBC_BP_ISCR_DPDM_CHANGE_DETECT);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun return temp;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
USBC_EnableIdPullUp(__iomem void * base)97*4882a593Smuzhiyun static void USBC_EnableIdPullUp(__iomem void *base)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun u32 reg_val;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun reg_val = musb_readl(base, USBC_REG_o_ISCR);
102*4882a593Smuzhiyun reg_val |= (1 << USBC_BP_ISCR_ID_PULLUP_EN);
103*4882a593Smuzhiyun reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
104*4882a593Smuzhiyun musb_writel(base, USBC_REG_o_ISCR, reg_val);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
USBC_EnableDpDmPullUp(__iomem void * base)107*4882a593Smuzhiyun static void USBC_EnableDpDmPullUp(__iomem void *base)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun u32 reg_val;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun reg_val = musb_readl(base, USBC_REG_o_ISCR);
112*4882a593Smuzhiyun reg_val |= (1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
113*4882a593Smuzhiyun reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
114*4882a593Smuzhiyun musb_writel(base, USBC_REG_o_ISCR, reg_val);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
USBC_ForceIdToLow(__iomem void * base)117*4882a593Smuzhiyun static void USBC_ForceIdToLow(__iomem void *base)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun u32 reg_val;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun reg_val = musb_readl(base, USBC_REG_o_ISCR);
122*4882a593Smuzhiyun reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
123*4882a593Smuzhiyun reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
124*4882a593Smuzhiyun reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
125*4882a593Smuzhiyun musb_writel(base, USBC_REG_o_ISCR, reg_val);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
USBC_ForceIdToHigh(__iomem void * base)128*4882a593Smuzhiyun static void USBC_ForceIdToHigh(__iomem void *base)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun u32 reg_val;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun reg_val = musb_readl(base, USBC_REG_o_ISCR);
133*4882a593Smuzhiyun reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
134*4882a593Smuzhiyun reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
135*4882a593Smuzhiyun reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
136*4882a593Smuzhiyun musb_writel(base, USBC_REG_o_ISCR, reg_val);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
USBC_ForceVbusValidToLow(__iomem void * base)139*4882a593Smuzhiyun static void USBC_ForceVbusValidToLow(__iomem void *base)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun u32 reg_val;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun reg_val = musb_readl(base, USBC_REG_o_ISCR);
144*4882a593Smuzhiyun reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
145*4882a593Smuzhiyun reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID);
146*4882a593Smuzhiyun reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
147*4882a593Smuzhiyun musb_writel(base, USBC_REG_o_ISCR, reg_val);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
USBC_ForceVbusValidToHigh(__iomem void * base)150*4882a593Smuzhiyun static void USBC_ForceVbusValidToHigh(__iomem void *base)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun u32 reg_val;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun reg_val = musb_readl(base, USBC_REG_o_ISCR);
155*4882a593Smuzhiyun reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
156*4882a593Smuzhiyun reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
157*4882a593Smuzhiyun reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
158*4882a593Smuzhiyun musb_writel(base, USBC_REG_o_ISCR, reg_val);
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
USBC_ConfigFIFO_Base(void)161*4882a593Smuzhiyun static void USBC_ConfigFIFO_Base(void)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun u32 reg_value;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /* config usb fifo, 8kb mode */
166*4882a593Smuzhiyun reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
167*4882a593Smuzhiyun reg_value &= ~(0x03 << 0);
168*4882a593Smuzhiyun reg_value |= (1 << 0);
169*4882a593Smuzhiyun writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun /******************************************************************************
173*4882a593Smuzhiyun * Needed for the DFU polling magic
174*4882a593Smuzhiyun ******************************************************************************/
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun static u8 last_int_usb;
177*4882a593Smuzhiyun
dfu_usb_get_reset(void)178*4882a593Smuzhiyun bool dfu_usb_get_reset(void)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun return !!(last_int_usb & MUSB_INTR_RESET);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /******************************************************************************
184*4882a593Smuzhiyun * MUSB Glue code
185*4882a593Smuzhiyun ******************************************************************************/
186*4882a593Smuzhiyun
sunxi_musb_interrupt(int irq,void * __hci)187*4882a593Smuzhiyun static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun struct musb *musb = __hci;
190*4882a593Smuzhiyun irqreturn_t retval = IRQ_NONE;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* read and flush interrupts */
193*4882a593Smuzhiyun musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
194*4882a593Smuzhiyun last_int_usb = musb->int_usb;
195*4882a593Smuzhiyun if (musb->int_usb)
196*4882a593Smuzhiyun musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
197*4882a593Smuzhiyun musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
198*4882a593Smuzhiyun if (musb->int_tx)
199*4882a593Smuzhiyun musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
200*4882a593Smuzhiyun musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
201*4882a593Smuzhiyun if (musb->int_rx)
202*4882a593Smuzhiyun musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (musb->int_usb || musb->int_tx || musb->int_rx)
205*4882a593Smuzhiyun retval |= musb_interrupt(musb);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun return retval;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun /* musb_core does not call enable / disable in a balanced manner <sigh> */
211*4882a593Smuzhiyun static bool enabled = false;
212*4882a593Smuzhiyun
sunxi_musb_enable(struct musb * musb)213*4882a593Smuzhiyun static int sunxi_musb_enable(struct musb *musb)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun int ret;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun pr_debug("%s():\n", __func__);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun musb_ep_select(musb->mregs, 0);
220*4882a593Smuzhiyun musb_writeb(musb->mregs, MUSB_FADDR, 0);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun if (enabled)
223*4882a593Smuzhiyun return 0;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* select PIO mode */
226*4882a593Smuzhiyun musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun if (is_host_enabled(musb)) {
229*4882a593Smuzhiyun ret = sunxi_usb_phy_vbus_detect(0);
230*4882a593Smuzhiyun if (ret == 1) {
231*4882a593Smuzhiyun printf("A charger is plugged into the OTG: ");
232*4882a593Smuzhiyun return -ENODEV;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun ret = sunxi_usb_phy_id_detect(0);
235*4882a593Smuzhiyun if (ret == 1) {
236*4882a593Smuzhiyun printf("No host cable detected: ");
237*4882a593Smuzhiyun return -ENODEV;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun sunxi_usb_phy_power_on(0); /* port power on */
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun USBC_ForceVbusValidToHigh(musb->mregs);
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun enabled = true;
245*4882a593Smuzhiyun return 0;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
sunxi_musb_disable(struct musb * musb)248*4882a593Smuzhiyun static void sunxi_musb_disable(struct musb *musb)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun pr_debug("%s():\n", __func__);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun if (!enabled)
253*4882a593Smuzhiyun return;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun if (is_host_enabled(musb))
256*4882a593Smuzhiyun sunxi_usb_phy_power_off(0); /* port power off */
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun USBC_ForceVbusValidToLow(musb->mregs);
259*4882a593Smuzhiyun mdelay(200); /* Wait for the current session to timeout */
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun enabled = false;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
sunxi_musb_init(struct musb * musb)264*4882a593Smuzhiyun static int sunxi_musb_init(struct musb *musb)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun pr_debug("%s():\n", __func__);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun musb->isr = sunxi_musb_interrupt;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun setbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
273*4882a593Smuzhiyun #ifdef CONFIG_SUNXI_GEN_SUN6I
274*4882a593Smuzhiyun setbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
275*4882a593Smuzhiyun #endif
276*4882a593Smuzhiyun sunxi_usb_phy_init(0);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun USBC_ConfigFIFO_Base();
279*4882a593Smuzhiyun USBC_EnableDpDmPullUp(musb->mregs);
280*4882a593Smuzhiyun USBC_EnableIdPullUp(musb->mregs);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun if (is_host_enabled(musb)) {
283*4882a593Smuzhiyun /* Host mode */
284*4882a593Smuzhiyun USBC_ForceIdToLow(musb->mregs);
285*4882a593Smuzhiyun } else {
286*4882a593Smuzhiyun /* Peripheral mode */
287*4882a593Smuzhiyun USBC_ForceIdToHigh(musb->mregs);
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun USBC_ForceVbusValidToHigh(musb->mregs);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun return 0;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun static const struct musb_platform_ops sunxi_musb_ops = {
295*4882a593Smuzhiyun .init = sunxi_musb_init,
296*4882a593Smuzhiyun .enable = sunxi_musb_enable,
297*4882a593Smuzhiyun .disable = sunxi_musb_disable,
298*4882a593Smuzhiyun };
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun static struct musb_hdrc_config musb_config = {
301*4882a593Smuzhiyun .multipoint = 1,
302*4882a593Smuzhiyun .dyn_fifo = 1,
303*4882a593Smuzhiyun .num_eps = 6,
304*4882a593Smuzhiyun .ram_bits = 11,
305*4882a593Smuzhiyun };
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun static struct musb_hdrc_platform_data musb_plat = {
308*4882a593Smuzhiyun #if defined(CONFIG_USB_MUSB_HOST)
309*4882a593Smuzhiyun .mode = MUSB_HOST,
310*4882a593Smuzhiyun #else
311*4882a593Smuzhiyun .mode = MUSB_PERIPHERAL,
312*4882a593Smuzhiyun #endif
313*4882a593Smuzhiyun .config = &musb_config,
314*4882a593Smuzhiyun .power = 250,
315*4882a593Smuzhiyun .platform_ops = &sunxi_musb_ops,
316*4882a593Smuzhiyun };
317*4882a593Smuzhiyun
musb_usb_probe(struct udevice * dev)318*4882a593Smuzhiyun static int musb_usb_probe(struct udevice *dev)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun struct sunxi_glue *glue = dev_get_priv(dev);
321*4882a593Smuzhiyun struct musb_host_data *host = &glue->mdata;
322*4882a593Smuzhiyun struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
323*4882a593Smuzhiyun void *base = dev_read_addr_ptr(dev);
324*4882a593Smuzhiyun int ret;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun if (!base)
327*4882a593Smuzhiyun return -EINVAL;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
330*4882a593Smuzhiyun if (IS_ERR(glue->ccm))
331*4882a593Smuzhiyun return PTR_ERR(glue->ccm);
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun priv->desc_before_addr = true;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun #ifdef CONFIG_USB_MUSB_HOST
336*4882a593Smuzhiyun host->host = musb_init_controller(&musb_plat, &glue->dev, base);
337*4882a593Smuzhiyun if (!host->host)
338*4882a593Smuzhiyun return -EIO;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun ret = musb_lowlevel_init(host);
341*4882a593Smuzhiyun if (!ret)
342*4882a593Smuzhiyun printf("Allwinner mUSB OTG (Host)\n");
343*4882a593Smuzhiyun #else
344*4882a593Smuzhiyun ret = musb_register(&musb_plat, &glue->dev, base);
345*4882a593Smuzhiyun if (!ret)
346*4882a593Smuzhiyun printf("Allwinner mUSB OTG (Peripheral)\n");
347*4882a593Smuzhiyun #endif
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun return ret;
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun
musb_usb_remove(struct udevice * dev)352*4882a593Smuzhiyun static int musb_usb_remove(struct udevice *dev)
353*4882a593Smuzhiyun {
354*4882a593Smuzhiyun struct sunxi_glue *glue = dev_get_priv(dev);
355*4882a593Smuzhiyun struct musb_host_data *host = &glue->mdata;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun musb_stop(host->host);
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun sunxi_usb_phy_exit(0);
360*4882a593Smuzhiyun #ifdef CONFIG_SUNXI_GEN_SUN6I
361*4882a593Smuzhiyun clrbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
362*4882a593Smuzhiyun #endif
363*4882a593Smuzhiyun clrbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun free(host->host);
366*4882a593Smuzhiyun host->host = NULL;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun return 0;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun static const struct udevice_id sunxi_musb_ids[] = {
372*4882a593Smuzhiyun { .compatible = "allwinner,sun4i-a10-musb" },
373*4882a593Smuzhiyun { .compatible = "allwinner,sun6i-a31-musb" },
374*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-a33-musb" },
375*4882a593Smuzhiyun { .compatible = "allwinner,sun8i-h3-musb" },
376*4882a593Smuzhiyun { }
377*4882a593Smuzhiyun };
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun U_BOOT_DRIVER(usb_musb) = {
380*4882a593Smuzhiyun .name = "sunxi-musb",
381*4882a593Smuzhiyun #ifdef CONFIG_USB_MUSB_HOST
382*4882a593Smuzhiyun .id = UCLASS_USB,
383*4882a593Smuzhiyun #else
384*4882a593Smuzhiyun .id = UCLASS_USB_GADGET_GENERIC,
385*4882a593Smuzhiyun #endif
386*4882a593Smuzhiyun .of_match = sunxi_musb_ids,
387*4882a593Smuzhiyun .probe = musb_usb_probe,
388*4882a593Smuzhiyun .remove = musb_usb_remove,
389*4882a593Smuzhiyun #ifdef CONFIG_USB_MUSB_HOST
390*4882a593Smuzhiyun .ops = &musb_usb_ops,
391*4882a593Smuzhiyun #endif
392*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct usb_platdata),
393*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct sunxi_glue),
394*4882a593Smuzhiyun };
395