1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2015, Google, Inc
3*4882a593Smuzhiyun * Written by Simon Glass <sjg@chromium.org>
4*4882a593Smuzhiyun * All rights reserved.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <dm.h>
11*4882a593Smuzhiyun #include <pci.h>
12*4882a593Smuzhiyun #include <usb.h>
13*4882a593Smuzhiyun #include <usb/xhci.h>
14*4882a593Smuzhiyun
xhci_pci_init(struct udevice * dev,struct xhci_hccr ** ret_hccr,struct xhci_hcor ** ret_hcor)15*4882a593Smuzhiyun static void xhci_pci_init(struct udevice *dev, struct xhci_hccr **ret_hccr,
16*4882a593Smuzhiyun struct xhci_hcor **ret_hcor)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun struct xhci_hccr *hccr;
19*4882a593Smuzhiyun struct xhci_hcor *hcor;
20*4882a593Smuzhiyun u32 cmd;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun hccr = (struct xhci_hccr *)dm_pci_map_bar(dev,
23*4882a593Smuzhiyun PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
24*4882a593Smuzhiyun hcor = (struct xhci_hcor *)((uintptr_t) hccr +
25*4882a593Smuzhiyun HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun debug("XHCI-PCI init hccr %p and hcor %p hc_length %d\n",
28*4882a593Smuzhiyun hccr, hcor, (u32)HC_LENGTH(xhci_readl(&hccr->cr_capbase)));
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun *ret_hccr = hccr;
31*4882a593Smuzhiyun *ret_hcor = hcor;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* enable busmaster */
34*4882a593Smuzhiyun dm_pci_read_config32(dev, PCI_COMMAND, &cmd);
35*4882a593Smuzhiyun cmd |= PCI_COMMAND_MASTER;
36*4882a593Smuzhiyun dm_pci_write_config32(dev, PCI_COMMAND, cmd);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
xhci_pci_probe(struct udevice * dev)39*4882a593Smuzhiyun static int xhci_pci_probe(struct udevice *dev)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct xhci_hccr *hccr;
42*4882a593Smuzhiyun struct xhci_hcor *hcor;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun xhci_pci_init(dev, &hccr, &hcor);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun return xhci_register(dev, hccr, hcor);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun static const struct udevice_id xhci_pci_ids[] = {
50*4882a593Smuzhiyun { .compatible = "xhci-pci" },
51*4882a593Smuzhiyun { }
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun U_BOOT_DRIVER(xhci_pci) = {
55*4882a593Smuzhiyun .name = "xhci_pci",
56*4882a593Smuzhiyun .id = UCLASS_USB,
57*4882a593Smuzhiyun .probe = xhci_pci_probe,
58*4882a593Smuzhiyun .remove = xhci_deregister,
59*4882a593Smuzhiyun .of_match = xhci_pci_ids,
60*4882a593Smuzhiyun .ops = &xhci_usb_ops,
61*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct usb_platdata),
62*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct xhci_ctrl),
63*4882a593Smuzhiyun .flags = DM_FLAG_ALLOC_PRIV_DMA,
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static struct pci_device_id xhci_pci_supported[] = {
67*4882a593Smuzhiyun { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0) },
68*4882a593Smuzhiyun {},
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun U_BOOT_PCI_DEVICE(xhci_pci, xhci_pci_supported);
72